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Author SHA1 Message Date
Brian
4f9d29cd4e tweak point rast to fix conform failure 2007-09-27 10:39:01 -06:00
Xiang, Haihao
3ee6a77e97 i965: handle all unfilled mode in clip stage. fix bug #12453 2007-09-27 16:14:57 +08:00
Xiang, Haihao
6254be9b71 mesa: make sure the gotten value isn't greater than the 
max depth buffer value on 64bit system. fix bug #12095
 2007-09-27 15:52:01 +08:00
Zou Nan hai
aa88d11e7d fix ppracer and bzflag issue with clip optimization 2007-09-27 13:49:35 +08:00
Dave Airlie
67f6449743 i915/i965 merge serer directories along lines for radeon/r200 2007-09-27 11:15:42 +10:00
Xiang, Haihao
175db68db5 i965: The cube map texture coordinates must be devided by the 
component with the largest absolute value before they are
delivered. fix bug #12421
 2007-09-26 16:42:50 +08:00
Zou Nan hai
395b3bf6f9 fix a bug in 965 ARB_occlusion_query, 
fd.o bug #12132
 2007-09-26 10:00:41 +08:00
Dave Airlie
f388d62b39 drm: update bufmgr code to reflect changes in drm interface 2007-09-25 16:22:00 +10:00
Roland Bär
919709af6b [i965] Bug #11812: Fix fwrite return value checks in AUB file code. 2007-09-24 13:47:26 -07:00
Eric Anholt
c8cb87d356 Remove leftover code for i915_texprog.c noticed in crossbar review. 2007-09-24 13:36:56 -07:00
Eric Anholt
56af8fd00f Fix progs/tests/ build with BSD make. 2007-09-24 10:26:56 -07:00
Eric Anholt
b74140db66 Update .gitignore for tests and xdemos. 2007-09-24 10:26:40 -07:00
Eric Anholt
9bb0d628b8 Just use stddef.h to get ptrdiff_t instead of obsolete malloc.h. 2007-09-24 10:22:31 -07:00
Eric Anholt
8cf9085bc7 Move i915tex driver into place as just i915. 2007-09-24 10:03:25 -07:00
Eric Anholt
8fba8d2018 Remove the old i915 driver now that i915tex works without TTM. 2007-09-24 09:56:40 -07:00
Zou Nan hai
439fa79578 fix fd.o bug #12217, recalcuate urb when clip plane size change 2007-09-24 16:48:55 +08:00
Brian
ef5935bc94 fix DrawRangeElements error msg 2007-09-23 13:58:18 -06:00
Eric Anholt
39c709c0f6 Merge branch 'i915-unification' 
This branch replaces the DRM pool interface used by i915tex with a "dri_bufmgr"
interface in dri/common which may be set up to use either TTM or traditional
static memory management according to what is available.  The i915tex TTM
code now requires an updated DDX which provides proper buffer objects for the
static front/back/depth, instead of using fake buffers.  The driver is now
built as i915_dri.so, and should replace the old i915 driver shortly.
 2007-09-21 17:13:20 -07:00
Eric Anholt
d0350dadaa Fix buffer/fence reference counting due to Destroy vs Unreference difference. 
While here, remove the unnecessary fence type saving for the wait ioctl, as
a 0 argument for type means "use your other saved copy".
 2007-09-21 16:18:21 -07:00
Brian
6016de689f fix -D_BSD_SOURC 2007-09-20 18:42:47 -06:00
Brian
a5467fbdd9 fixes for bluegene-xlc-osmesa config 2007-09-20 15:11:14 -06:00
Brian
58484dc00a Added bluegene-xlc-osmesa config (Alexander Neundorf) 2007-09-20 15:09:57 -06:00
Eric Anholt
c1ecc38320 Uniquely validate the batchbuffer-referenced buffers. 
Otherwise, for multiple references by the batchbuffer, the kernel would see
the buffer already on the unfenced list and wait for it to leave the list
before continuing, leading to hanging and eventual -EBUSY.
 2007-09-20 11:41:25 -07:00
Eric Anholt
7591259674 Add disabled-by-default tracing of TTM bufmgr operations. 2007-09-20 11:38:32 -07:00
Eric Anholt
b7fd06a871 Fix flipped sign to strerror. 2007-09-20 09:20:48 -07:00
Eric Anholt
4f1c9f7e51 Merge branch 'master' into i915-unification 
Conflicts:

	src/mesa/drivers/dri/common/dri_drmpool.c
	src/mesa/drivers/dri/i915tex/i915_vtbl.c
	src/mesa/drivers/dri/i915tex/intel_batchbuffer.c
	src/mesa/drivers/dri/i915tex/intel_context.c
 2007-09-20 09:04:20 -07:00
Xiang, Haihao
2c88bfeaa4 i965: fix an error in brw_vs_tnl.c 
if the state of TEXMAT is changed, the VS isn't updated.
 2007-09-20 17:42:13 +08:00
Xiang, Haihao
8fc1a6808d fix memory access error in vbo_bind_vertex_list 2007-09-20 17:37:04 +08:00
Dave Airlie
6f2ca13f90 nouveau: add GeForce 7300 SE to card list 2007-09-20 13:36:31 +10:00
Matthieu Castet
0759e0999b nouveau : nv1x use OUT_RING_CACHE_FORCE for NV10_TCL_PRIMITIVE_3D_PROJECTION_MATRIX as strange results 
appear when the matrix is partialy updated.
 2007-09-19 23:22:39 +02:00
Matthieu Castet
3b582dff8c nouveau : add OUT_RING_CACHE_FORCE* to add stuff in the cache even if the value didn't change 2007-09-19 23:20:13 +02:00
Matthieu Castet
1310f02dee nouveau : add GL_FOG_COLOR + fix a compil error 2007-09-19 19:58:48 +02:00
Eric Anholt
45899a494c Update .gitignore for demos. 2007-09-19 10:51:07 -07:00
Eric Anholt
eecec25478 Add missing -g in FreeBSD OPT_CFLAGS 2007-09-19 10:51:07 -07:00
Eric Anholt
b91791a85c Replace i915tex batchbuffer printout with a pretty-printed version. 2007-09-19 10:51:07 -07:00
Eric Anholt
f843dcb844 Enable building the debug (env INTEL_DEBUG=list) code by default. 2007-09-19 10:50:19 -07:00
Eric Anholt
9070e6b997 i915: Quiet valgrind by initializing the seq value the kernel writes into. 
Also, add a couple of comments to the wait/emit IRQ functions.
 2007-09-19 10:50:19 -07:00
Patrice Mandin
3800599bd4 nouveau: nv10: color logic op only for nv11+ 2007-09-19 19:08:56 +02:00
Eric Anholt
e3745dac59 Add some error reporting and a couple of assertions to TTM bufmgr. 2007-09-18 15:46:16 -07:00
Xiang, Haihao
e21d2c6ef3 mesa: Always use the original mask to update stencil buffer 
in stencil_and_ztest_pixels. fix #12263
 2007-09-18 09:32:44 +08:00
Matthieu Castet
c29886718a nouveau : avoid vertex_size / 4 for each vertex ops 2007-09-16 23:33:10 +02:00
Matthieu Castet
7cc4d31ed9 nouveau : use GLfloat instead of uint32_t. After all, our vertex attributes are float. 2007-09-16 23:19:22 +02:00
Matthieu Castet
7356dac1b6 nouveau : implement nv10_render_points 2007-09-16 23:01:56 +02:00
Matthieu Castet
2616b20689 nouveau : fix nv10_render functions 
use _tnl_RenderClipped helper functions that will call the right driver callback
clean nv10_render_generic_primitive_elts to match nv10_render style
 2007-09-16 19:37:27 +02:00
Matthieu Castet
e605f2828f nouveau : opps I introduce a bug when cleaning vertex pos attribute swap patch 2007-09-16 18:57:03 +02:00
Matthieu Castet
3d17cdf55a revert a956184f70 2007-09-16 16:15:13 +02:00
Matthieu Castet
d42d5fdba0 nouveau : nv1x pos vertex attribute need to be the first in mesa. 
Swap it latter in order it match hw format.
 2007-09-16 16:13:55 +02:00
Matthieu Castet
8d9d990cb2 nouveau : use new nouveau_reg.h with correct Bracket in macro 2007-09-15 00:25:09 +02:00
Matthieu Castet
5e78356259 nouveau : check for nmesa->state_cache.atoms overflow 2007-09-14 22:13:52 +02:00
Matthieu Castet
63147344e4 nouveau : fix NV10_TCL_PRIMITIVE_3D_CLIP_PLANE 2007-09-14 22:07:34 +02:00