Commit graph

71684 commits

Author SHA1 Message Date
Marta Lofstedt
4f8e4a95db mesa/es3.1: Allow GL_SAMPLE_MASK
GLES 3.1 should be allowed to enable GL_SAMPLE_MASK.

Signed-off-by: Marta Lofstedt <marta.lofstedt@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
2015-08-03 12:30:50 +03:00
Marta Lofstedt
2e0179e2b3 mesa/es3.1: Allow binding GL_DRAW_INDIRECT_BUFFER with gles 3.1
Signed-off-by: Marta Lofstedt <marta.lofstedt@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
2015-08-03 12:18:08 +03:00
Marek Olšák
de59a40f68 r600g: re-enable single-sample fast clear
Fixed by the CB_SHADER_MASK fix.

Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Reviewed-by: Dave Airlie <airlied@redhat.com>
2015-08-03 00:18:41 +02:00
Marek Olšák
d4ad4c2061 r600g: fix the CB_SHADER_MASK setup
This fixes the single-sample fast clear hang.

Cc: 10.6 <mesa-stable@lists.freedesktop.org>
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Reviewed-by: Dave Airlie <airlied@redhat.com>
2015-08-03 00:18:41 +02:00
Marek Olšák
828d20bdb7 r600g: fix the single-sample fast clear setup
No effect, but this is what we should be doing.

Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Reviewed-by: Dave Airlie <airlied@redhat.com>
2015-08-03 00:18:41 +02:00
Marek Olšák
08fd736a45 radeonsi: flush if the memory usage for an IB is too high
Picked from the amdgpu branch.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-08-02 22:03:33 +02:00
Igor Gnatenko
4d7e0fa8c7 opencl: use versioned .so in mesa.icd
We must have versioned library in mesa.icd, because ICD loader would
fail if the mesa-devel package wasn't installed.

Cc: "10.6" <mesa-stable@lists.freedesktop.org>
Reported-by: Fabian Deutsch <fabian.deutsch@gmx.de>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=73512
Signed-off-by: Igor Gnatenko <i.gnatenko.brain@gmail.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Acked-by: Michel Dänzer <michel.daenzer@amd.com>
2015-08-01 17:14:02 +01:00
Emil Velikov
2b831334e9 includes/GL: remove duplicated extension declarations from glx.h
All three of GLX_NV_float_buffer, GLX_EXT_texture_from_pixmap and
GLX_MESA_query_renderer have been in glxext.h for a while now.

As such we can drop this workaround/hack from the header.

v2: Remove the comment about GLX_NV_float_buffer.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com> (v1)
2015-08-01 15:47:55 +01:00
Emil Velikov
6f2d88927a docs: rename/bump 10.7.0 release notes to 11.0.0
Recently a few drivers have grown OpenGL 4+ support so we might as
well go all the way to... 11 ;-)

v2: Don't forget to update the version file (Ilia)

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-08-01 15:45:43 +01:00
Emil Velikov
1307be519b winsys/radeon: don't leak the fd when it is 0
Earlier commit added an extra dup(fd) to fix a ZaphodHeads issue.
Although it did not consider the (very unlikely) case where we might end
up with the valid fd == 0.

Fixes: 28dda47ae4d(winsys/radeon: Use dup fd as key in drm-winsys hash
table to fix ZaphodHeads.)

Cc: 10.6 <mesa-stable@lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Mario Kleiner <mario.kleiner.de@gmail.com>
2015-08-01 15:44:17 +01:00
Emil Velikov
eb3e2562a4 configure.ac: check for mkostemp()
We can make use of it over mkstemp + fcntl in the egl/wayland code.

Cc: Axel Davy <axel.davy@ens.fr>
Suggested-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-08-01 15:41:45 +01:00
Emil Velikov
175d975279 egl/wayland: use drmGetNodeTypeFromFd helper instead of opencoding it
Cc: Axel Davy <axel.davy@ens.fr>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Acked-by: Boyan Ding <boyan.j.ding@gmail.com>
2015-08-01 15:41:45 +01:00
Emil Velikov
5567494403 egl/wayland: use designated initializers
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Thomas Helland <thomashelland90@gmail.com>
2015-08-01 15:41:23 +01:00
Emil Velikov
720125ff99 egl: remove ifdef $(egl_extension) compile guards
All of these are already defined in the headers provided.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-08-01 15:41:23 +01:00
Emil Velikov
fa109d02dd egl/wayland: libdrm is a hard requirement, treat it as such
Prompt at configure time if it's missing otherwise we'll fail later on
in the build. Remove ambiguous HAVE_LIBDRM guard.

Cc: 10.6 <mesa-stable@lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-08-01 15:41:23 +01:00
Emil Velikov
57c670a823 egl: consolidate ifdef HAVE_LIBDRM blocks
Move the code around rather than having it scattered. No functional
change.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Thomas Helland <thomashelland90@gmail.com>
2015-08-01 15:41:19 +01:00
Emil Velikov
b0a9299603 configure.ac: null,android,gdi are not valid egl-platforms
... and update the documentation to reflect reality.
null and gdi are gone, and surfaceless is a recent addition.

v2: s/platforms/platform/ (spotted by Thomas)

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Thomas Helland <thomashelland90@gmail.com>
2015-08-01 15:40:44 +01:00
Marek Olšák
5d29eaef85 Revert "gallium/radeon: re-enable unsafe math for graphics shaders"
This reverts commit 8559f6ce62.

It causes hangs in DOTA 2 Reborn.
2015-08-01 00:52:05 +02:00
EdB
a40179f47b clover: make dispatch matches functions def
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
2015-07-31 14:48:30 -07:00
Vinson Lee
8477dd7c2e gallivm: Fix GCC unused-variable warning.
lp_bld_tgsi_soa.c: In function 'lp_emit_immediate_soa':
lp_bld_tgsi_soa.c:3065:18: warning: unused variable 'size' [-Wunused-variable]
       const uint size = imm->Immediate.NrTokens - 1;
                  ^

Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Brian Paul <brianp@vmware.com>
2015-07-31 14:43:11 -07:00
Adam Jackson
bafdafa7b2 glx: Fix missing bit decl for EXT_texture_integer
Missing from:

    commit b15aba940a
    Author: Adam Jackson <ajax@redhat.com>
    Date:   Tue Jul 21 11:43:42 2015 -0400

	glx: Fix image size computation for EXT_texture_integer (v2)

Signed-off-by: Adam Jackson <ajax@redhat.com>
2015-07-31 13:37:19 -04:00
Matt Turner
616355160d glsl: Initialize parse-state in constructor of lower_subroutine.
Static analysis tools don't like partial object initializations.

Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
2015-07-31 10:33:03 -07:00
Adam Jackson
b15aba940a glx: Fix image size computation for EXT_texture_integer (v2)
Without this this extension basically can't work in indirect contexts,
TexImage2D will compute the image size as 0 and we'll send no image data
to the server.

v2: Add EXT_texture_integer to the client extension list too (Ian)

Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Adam Jackson <ajax@redhat.com>
2015-07-31 12:32:16 -04:00
Marek Olšák
3050978864 radeonsi: copy *8_SNORM bits exactly in resource_copy_region
Disabling the FP16 mode didn't help.

If needed, we can use this trick for blits too, but not for scaled blits.

+ 4 piglits

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-07-31 16:49:17 +02:00
Marek Olšák
64d3130994 r600g: early exit in r600_clear if there's nothing to do
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-07-31 16:49:17 +02:00
Marek Olšák
f9c4953f99 radeonsi: early exit in si_clear if there's nothing to do
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-07-31 16:49:17 +02:00
Marek Olšák
190a40580f radeonsi: fix a regression since the resource_copy_region cleanup
Broken since:
    46b2b3b - radeonsi: don't change pipe_resource in resource_copy_region

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=91444

Reviewed-and-Tested-by: Michel Dänzer <michel.daenzer@amd.com>
2015-07-31 16:49:17 +02:00
Marek Olšák
3ca2132058 radeonsi: fix broken st/nine from merging tessellation
st/nine uses GENERIC slots greater than 60.
2015-07-31 16:49:17 +02:00
Marek Olšák
2d3ae154ba radeonsi: move CP DMA functions to their own file
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-07-31 16:49:17 +02:00
Marek Olšák
3063c5e3d3 radeonsi: add a debug flag that disables printing ISA in shader dumps 2015-07-31 16:49:17 +02:00
Marek Olšák
2dcbd427da radeonsi: add a debug flag that disables printing TGSI in shader dumps
Reviewed-by: Dave Airlie <airlied@redhat.com>
2015-07-31 16:49:17 +02:00
Marek Olšák
ac19a896d3 radeonsi: add a debug flag that disables printing the LLVM IR in shader dumps
This is for shader-db and should reduce size of shader dumps.
2015-07-31 16:49:17 +02:00
Marek Olšák
7dd1f45bc4 radeonsi: store shader disassemblies in memory for future users
This will be used by the new ddebug pipe. I'm including it now to avoid
conflicts with other patches.
2015-07-31 16:49:16 +02:00
Marek Olšák
1bbe408363 radeonsi: don't use llvm.AMDIL.fraction for FRC and DFRAC
There are 2 reasons for this:
- LLVM optimization passes can work with floor
- there are patterns to select v_fract from floor anyway

There is no change in the generated code.
2015-07-31 16:49:16 +02:00
Marek Olšák
8559f6ce62 gallium/radeon: re-enable unsafe math for graphics shaders
This reverts commit 4db985a5fa.

The grass no longer disappears, which was the reason the commit was reverted.
This might affect tessellation. We'll see.

Totals from affected shaders:
SGPRS: 151672 -> 150232 (-0.95 %)
VGPRS: 90620 -> 89776 (-0.93 %)
Code Size: 3980472 -> 3920836 (-1.50 %) bytes
LDS: 67 -> 67 (0.00 %) blocks
Scratch: 1357824 -> 1202176 (-11.46 %) bytes per wave

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
2015-07-31 16:49:16 +02:00
Marek Olšák
12a197b2d5 gallium/radeon: don't use rsq_action
Reviewed-by: Dave Airlie <airlied@redhat.com>
2015-07-31 16:49:16 +02:00
Marek Olšák
681dbcf690 gallium/radeon: move r600-specific code to r600g
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
2015-07-31 16:49:16 +02:00
Marek Olšák
9a4c57afe4 gallium/radeon: remove unused variables and old comments
Reviewed-by: Dave Airlie <airlied@redhat.com>
2015-07-31 16:49:16 +02:00
Marek Olšák
b9dad585e6 gallium/radeon: remove build_intrinsic and build_tgsi_intrinsic
duplicated now

Reviewed-by: Dave Airlie <airlied@redhat.com>
2015-07-31 16:49:16 +02:00
Marek Olšák
0c805b6240 gallivm: add LLVMAttribute parameter to lp_build_intrinsic
This will help remove some duplicated code from radeon.

Reviewed-by: Dave Airlie <airlied@redhat.com>
2015-07-31 16:49:16 +02:00
Marek Olšák
488a83637f gallium/util: clear up that debug_get_flags_option returns a 64-bit mask
Reviewed-by: Kai Wasserbäch <kai@dev.carbon-project.org>
2015-07-31 16:49:16 +02:00
Marek Olšák
b0528118df radeonsi: completely rework updating descriptors without CP DMA
The patch has a better explanation. Just a summary here:
- The CPU always uploads a whole descriptor array to previously-unused memory.
- CP DMA isn't used.
- No caches need to be flushed.
- All descriptors are always up-to-date in memory even after a hang, because
  CP DMA doesn't serve as a middle man to update them.

This should bring:
- better hang recovery (descriptors are always up-to-date)
- better GPU performance (no KCACHE and TC flushes)
- worse CPU performance for partial updates (only whole arrays are uploaded)
- less used IB space (no CP_DMA and WRITE_DATA packets)
- simpler code
- hopefully, some of the corruption issues with SI cards will go away.
  If not, we'll know the issue is not here.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-07-31 16:49:16 +02:00
Francisco Jerez
781dc7c0e1 i965/fs: Fix regression with SIMD8 VS since b5f1a48e23.
With num_direct_uniforms == 0 there's no space allocated in the
param_size array for the one block of direct uniforms -- On the FS
stage this would be a harmless no-op because it would simply re-set
one of the param_size entries allocated for the sampler units to zero,
but on the VS stage it has been reported to cause memory corruption
followed by a crash -- Surprising how a full piglit run on Gen8 didn't
catch it.

Reported-and-reviewed-by: "Lofstedt, Marta" <marta.lofstedt@intel.com>
2015-07-31 16:20:52 +03:00
Ben Widawsky
383558c564 i965/gen9: Add hs, ds, and cs thread + urb info
For SKL: These are the production values.

For BXT: These are low estimates to enable platforms.

This patch was originally part of
i965/skl: Add production thread counts and URB size
but was split out at Jordan's request (which I found to be reasonable).

Note on stable inclusion: 10.6 does not care about hs, and ds. It does care
about cs, but since Jordan was the one that asked me to extract it, I'll leave
it up to him to deal with a backport to stable is required.

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2015-07-30 22:39:11 -07:00
Ben Widawsky
3cb5801003 i965/bxt: Use more conservative thread counts
Since we really do not know what may occur in the future, pick a more
conservative value for thread counts until we know better what values are
correct. As far as I can tell, the old values will work fine, but some of the
registers seem to indicate that going even lower is possible and the purpose of
having early support is to enable as many configurations that can possibly
exist (we can trim things down after platforms begin shipping later).

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2015-07-30 22:39:11 -07:00
Ben Widawsky
7eaacc1678 i965/skl: Add production thread counts and URB size
This patch adjusts the SKL values to the best known values we have.

v2: Remove HS/DS/CS fields. Adding this makes most sense to add to the
GEN9_FEATURES macro, however, doing that would require updating BXT values, and
Jordan requested I not do that. Conveniently, this request makes a lot of sense
wrt to stable backport as HS, and DS do not even exist there.

Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2015-07-30 22:39:11 -07:00
Eric Anholt
7830e465a5 vc4: Lower uniform loads to scalar in NIR.
This also moves the vec4-to-byte-addressing math into NIR, so that
algebraic has a chance at it.
2015-07-30 15:47:12 -07:00
Eric Anholt
5a8c57b522 vc4: Move some FS input lowering into NIR. 2015-07-30 15:47:12 -07:00
Eric Anholt
13ddd48b97 vc4: Move program keys to the header file.
I want to be able to inspect them from other files for lowering passes in
NIR.
2015-07-30 15:47:12 -07:00
Eric Anholt
27f728cdc5 vc4: Lower NIR inputs to scalar as well.
For now this is just scalarizing, but it also means we'll get to dump a
bunch of QIR-based lowering in a moment.
2015-07-30 15:47:12 -07:00