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radeonsi: add a debug flag that disables printing the LLVM IR in shader dumps

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This is for shader-db and should reduce size of shader dumps.
This commit is contained in:
Marek Olšák 2015-07-25 16:15:48 +02:00
parent 7dd1f45bc4
commit ac19a896d3
6 changed files with 29 additions and 29 deletions
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2
src/gallium/drivers/r600/r600_llvm.c
View file

@ -1028,7 +1028,7 @@ unsigned r600_llvm_compile(
const char * gpu_family = r600_get_llvm_processor_name(family);
memset(&binary, 0, sizeof(struct radeon_shader_binary));
r = radeon_llvm_compile(mod, &binary, gpu_family, dump, NULL);
r = radeon_llvm_compile(mod, &binary, gpu_family, dump, dump, NULL);
r = r600_create_shader(bc, &binary, use_kill);

1
src/gallium/drivers/radeon/r600_pipe_common.c
View file

@ -335,6 +335,7 @@ static const struct debug_named_value common_debug_options[] = {
{ "cs", DBG_CS, "Print compute shaders" },
{ "tcs", DBG_TCS, "Print tessellation control shaders" },
{ "tes", DBG_TES, "Print tessellation evaluation shaders" },
{ "noir", DBG_NO_IR, "Don't print the LLVM IR"},
/* features */
{ "nodma", DBG_NO_ASYNC_DMA, "Disable asynchronous DMA" },

23
src/gallium/drivers/radeon/r600_pipe_common.h
View file

@ -81,17 +81,18 @@
#define DBG_CS (1 << 9)
#define DBG_TCS (1 << 10)
#define DBG_TES (1 << 11)
#define DBG_NO_IR (1 << 12)
/* Bits 21-31 are reserved for the r600g driver. */
/* features */
#define DBG_NO_ASYNC_DMA (1 << 12)
#define DBG_NO_HYPERZ (1 << 13)
#define DBG_NO_DISCARD_RANGE (1 << 14)
#define DBG_NO_2D_TILING (1 << 15)
#define DBG_NO_TILING (1 << 16)
#define DBG_SWITCH_ON_EOP (1 << 17)
#define DBG_FORCE_DMA (1 << 18)
#define DBG_PRECOMPILE (1 << 19)
#define DBG_INFO (1 << 20)
/* The maximum allowed bit is 20. */
#define DBG_NO_ASYNC_DMA (1llu << 32)
#define DBG_NO_HYPERZ (1llu << 33)
#define DBG_NO_DISCARD_RANGE (1llu << 34)
#define DBG_NO_2D_TILING (1llu << 35)
#define DBG_NO_TILING (1llu << 36)
#define DBG_SWITCH_ON_EOP (1llu << 37)
#define DBG_FORCE_DMA (1llu << 38)
#define DBG_PRECOMPILE (1llu << 39)
#define DBG_INFO (1llu << 40)
#define R600_MAP_BUFFER_ALIGNMENT 64
@ -272,7 +273,7 @@ struct r600_common_screen {
enum chip_class chip_class;
struct radeon_info info;
struct r600_tiling_info tiling_info;
unsigned debug_flags;
uint64_t debug_flags;
bool has_cp_dma;
bool has_streamout;

9
src/gallium/drivers/radeon/radeon_llvm_emit.c
View file

@ -148,7 +148,8 @@ static void radeonDiagnosticHandler(LLVMDiagnosticInfoRef di, void *context)
* @returns 0 for success, 1 for failure
*/
unsigned radeon_llvm_compile(LLVMModuleRef M, struct radeon_shader_binary *binary,
const char *gpu_family, unsigned dump, LLVMTargetMachineRef tm)
const char *gpu_family, bool dump_ir, bool dump_asm,
LLVMTargetMachineRef tm)
{
char cpu[CPU_STRING_LEN];
@ -171,17 +172,15 @@ unsigned radeon_llvm_compile(LLVMModuleRef M, struct radeon_shader_binary *binar
}
strncpy(cpu, gpu_family, CPU_STRING_LEN);
memset(fs, 0, sizeof(fs));
if (dump) {
if (dump_asm)
strncpy(fs, "+DumpCode", FS_STRING_LEN);
}
tm = LLVMCreateTargetMachine(target, triple, cpu, fs,
LLVMCodeGenLevelDefault, LLVMRelocDefault,
LLVMCodeModelDefault);
dispose_tm = true;
}
if (dump) {
if (dump_ir)
LLVMDumpModule(M);
}
/* Setup Diagnostic Handler*/
llvm_ctx = LLVMGetModuleContext(M);

10
src/gallium/drivers/radeon/radeon_llvm_emit.h
View file

@ -29,6 +29,7 @@
#include <llvm-c/Core.h>
#include <llvm-c/TargetMachine.h>
#include <stdbool.h>
struct radeon_shader_binary;
@ -36,11 +37,8 @@ void radeon_llvm_shader_type(LLVMValueRef F, unsigned type);
LLVMTargetRef radeon_llvm_get_r600_target(const char *triple);
unsigned radeon_llvm_compile(
LLVMModuleRef M,
struct radeon_shader_binary *binary,
const char * gpu_family,
unsigned dump,
LLVMTargetMachineRef tm);
unsigned radeon_llvm_compile(LLVMModuleRef M, struct radeon_shader_binary *binary,
const char *gpu_family, bool dump_ir, bool dump_asm,
LLVMTargetMachineRef tm);
#endif /* RADEON_LLVM_EMIT_H */

13
src/gallium/drivers/radeonsi/si_shader.c
View file

@ -3836,14 +3836,15 @@ int si_compile_llvm(struct si_screen *sscreen, struct si_shader *shader,
LLVMTargetMachineRef tm, LLVMModuleRef mod)
{
int r = 0;
bool dump = r600_can_dump_shader(&sscreen->b,
shader->selector ? shader->selector->tokens : NULL);
r = radeon_llvm_compile(mod, &shader->binary,
r600_get_llvm_processor_name(sscreen->b.family), dump, tm);
bool dump_asm = r600_can_dump_shader(&sscreen->b,
shader->selector ? shader->selector->tokens : NULL);
bool dump_ir = dump_asm && !(sscreen->b.debug_flags & DBG_NO_IR);
if (r) {
r = radeon_llvm_compile(mod, &shader->binary,
r600_get_llvm_processor_name(sscreen->b.family), dump_ir, dump_asm, tm);
if (r)
return r;
}
r = si_shader_binary_read(sscreen, shader);
FREE(shader->binary.config);