Commit graph

200067 commits

Author SHA1 Message Date
Lionel Landwerlin
4e8a25cf6f anv: remove use of emit_apply_pipe_flushes() in various helpers
For a bunch of workarounds and special cases we want PIPE_CONTROL not
RESOURCE_BARRIER. We want emit_apply_pipe_flushes() to be mostly for
application barriers.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38707>
2025-12-15 08:25:31 +00:00
Lionel Landwerlin
d37a888a9b anv: remove unused gpu_memcpy function
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38707>
2025-12-15 08:25:31 +00:00
Mel Henning
01cf905c71 nak: Set variable_latency=0 for !needs_scoreboard
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This simplifies usage of estimate_variable_latency a little in that we
can just use it directly in our max() expressions instead of guarding it
with an if.

Reviewed-by: Mary Guillemard <mary@mary.zone>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38939>
2025-12-13 16:29:18 +00:00
Mel Henning
b4bac84d3b nak: Add a Dst::file() helper function
Reviewed-by: Mary Guillemard <mary@mary.zone>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38939>
2025-12-13 16:29:18 +00:00
Mel Henning
f5f89407f6 nak: Handle CS2R latencies in SSA form
Reviewed-by: Mary Guillemard <mary@mary.zone>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38939>
2025-12-13 16:29:18 +00:00
Georg Lehmann
fee87679bf radv/nir: fix front_face_fsign opt
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If front facing primitives are culled, there are only back facing fragments left.

Fixes: 0fe8250bf4 ("radv: optimize known front_face_fsign too")
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38937>
2025-12-13 10:22:21 +01:00
Marek Olšák
d17d1f53bd nir/opt_cse: update potential future plans merging copy propagation with CSE
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This matches my current understanding of nir_opt_copy_prop, including that
nir_opt_copy_prop always replaces movs with vecN.

Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38916>
2025-12-13 06:41:59 +00:00
Marek Olšák
9ac8e643d6 nir/lower_io: explain properly how nir_lower_io_lower_64bit_to_32* options work
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38916>
2025-12-13 06:41:59 +00:00
Marek Olšák
41d127b9e8 nir/lower_io: remove unused option nir_lower_io_lower_64bit_float_to_32
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38916>
2025-12-13 06:41:59 +00:00
Marek Olšák
09b2325877 nir/print: print tex->sampler_dim
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38916>
2025-12-13 06:41:58 +00:00
Marek Olšák
4d976a5787 nir: fix the value of nir_io_use_frag_result_dual_src_blend
Due to rebasing not recognizing it as a conflict, it ended up having
the same value as nir_io_assign_color_input_bases_after_all_other_inputs.

Fixes: 9a2f1be814 - nir: add FRAG_RESULT_DUAL_SRC_BLEND and an option to use it

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38916>
2025-12-13 06:41:58 +00:00
Caio Oliveira
375e9d1094 intel/mda: Handle better processing a lot of archives
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Keep only the metadata when initially parsing the files.  Then re-load
the relevant archives again when necessary.

The old code was just keeping everything in memory, which was slow when
looking at a directory containing archives resulted from processing
a large fossil file.

Extra care is taken with `search` commands to ensure we don't keep
unnecessary contents around.  At some point we could reorganize so
find_all is not used here, but for now this should be fine.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38228>
2025-12-13 01:21:08 +00:00
Caio Oliveira
5474e9bfdc intel/mda: Use function to read content of objects
Preparation for a later patch that will make the content be loaded
on-demand.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38228>
2025-12-13 01:21:08 +00:00
Job Noorman
29f8277952 ir3/legalize: schedule (eq) more accurately
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Instructions that calculate derivatives (whether implicitly or
explicitly) don't actually need helpers enabled as long as helpers were
enabled while their coordinates were calculated. We currently don't
track this and leave helpers enabled until the derivative instructions
themselves.

Improve this by adding a backwards data-flow analysis which tracks the
last instruction that wrote the coordinates so that helpers can be
disabled after that.

Totals from 38306 (23.26% of 164705) affected shaders:
Instrs: 19635952 -> 19647753 (+0.06%); split: -0.03%, +0.09%
CodeSize: 40465212 -> 40489860 (+0.06%); split: -0.03%, +0.09%
NOPs: 3493898 -> 3505699 (+0.34%); split: -0.16%, +0.49%
(ss)-stall: 1755983 -> 1755365 (-0.04%); split: -0.04%, +0.01%
(sy)-stall: 5345890 -> 5350570 (+0.09%); split: -0.03%, +0.12%
Last helper: 8754510 -> 6313744 (-27.88%); split: -27.89%, +0.01%
Cat0: 3821218 -> 3833019 (+0.31%); split: -0.14%, +0.45%

Signed-off-by: Job Noorman <jnoorman@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36410>
2025-12-13 00:01:02 +00:00
Job Noorman
54cde77163 ir3: print eq and needs_helpers instruction flags
Signed-off-by: Job Noorman <jnoorman@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36410>
2025-12-13 00:01:02 +00:00
Collabora's Gfx CI Team
db30011663 Uprev Piglit to 2842979ebe03b99c33c3e49af5960c69be6c6d46
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5309e3401d...2842979ebe

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38333>
2025-12-12 21:45:24 +00:00
Sergi Blanch Torne
b40fe92b73 ci,piglit: update expectations from piglit nightly
Some expectation updates in the piglit uprev come from results we already see
in the nightly runs. Updating xfiles with those results before the uprev
commit, shows better the origin of the changes.

Signed-off-by: Sergi Blanch Torne <sergi.blanch.torne@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38333>
2025-12-12 21:45:24 +00:00
Ian Forbes
d75f5e0add svga: Don't crash if only one of Depth or Stencil buffer is present
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This piglit test arb_clear_texture-depth was crashing because we assume
we always have stencil and depth buffer.

Signed-off-by: Ian Forbes <ian.forbes@broadcom.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38836>
2025-12-12 19:41:42 +00:00
Nanley Chery
d2f336c108 intel/isl: Only assert surface addresses on gfx9+
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Restrict the surface address assertions to platforms with soft-pin. We
technically could check for (gfx8+ && !CHV), but we choose to use the
simpler condition instead.

Fixes: 8e96b516ca ("intel/isl: Assert alignments of surface addresses")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11331
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38905>
2025-12-12 18:06:16 +00:00
Georg Lehmann
17e597093d radv: eliminate unused FS output channels
For formats that don't have all color channels, there is no reason to
output all of them.
Games often write to R only or RGB formats with non trivial remaining channels.

Foz-DB Navi21:
Totals from 10270 (10.55% of 97347) affected shaders:
MaxWaves: 249166 -> 250950 (+0.72%); split: +0.73%, -0.01%
Instrs: 8442016 -> 8354715 (-1.03%); split: -1.05%, +0.01%
CodeSize: 45939644 -> 45487156 (-0.98%); split: -1.01%, +0.02%
VGPRs: 472584 -> 463784 (-1.86%); split: -1.98%, +0.12%
SpillSGPRs: 1502 -> 1448 (-3.60%)
LDS: 6024192 -> 6011904 (-0.20%)
Inputs: 42463 -> 41773 (-1.62%)
Outputs: 24601 -> 23955 (-2.63%)
Latency: 78011745 -> 77653907 (-0.46%); split: -0.56%, +0.10%
InvThroughput: 19767826 -> 19274046 (-2.50%); split: -2.53%, +0.03%
VClause: 177891 -> 176681 (-0.68%); split: -0.80%, +0.12%
SClause: 236784 -> 235324 (-0.62%); split: -0.72%, +0.10%
Copies: 621048 -> 616096 (-0.80%); split: -1.03%, +0.23%
Branches: 202608 -> 201811 (-0.39%); split: -0.44%, +0.05%
PreSGPRs: 441032 -> 437698 (-0.76%); split: -0.77%, +0.01%
PreVGPRs: 378067 -> 369564 (-2.25%); split: -2.26%, +0.01%
VALU: 5906415 -> 5833179 (-1.24%); split: -1.25%, +0.01%
SALU: 973428 -> 968088 (-0.55%); split: -0.61%, +0.06%
VMEM: 298277 -> 296504 (-0.59%); split: -0.61%, +0.01%
SMEM: 402244 -> 399612 (-0.65%); split: -0.71%, +0.06%

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38853>
2025-12-12 17:00:51 +00:00
Georg Lehmann
5d2f3065fd radv: gather color0_written with scalar io correctly
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38853>
2025-12-12 17:00:51 +00:00
Georg Lehmann
18013e3281 radv: consider dual src blend for when epilog needs alpha
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38853>
2025-12-12 17:00:51 +00:00
Georg Lehmann
a1fbf91ff2 radv/nir: fix radv_nir_remap_color_attachment progress
And switch to SPDX header.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38853>
2025-12-12 17:00:51 +00:00
Georg Lehmann
da197c3d55 ac/nir/lower_ps_late: remove gfx6 mrtz writemask workaround
This is now done in the backends.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38853>
2025-12-12 17:00:51 +00:00
Georg Lehmann
6a7ff2204b ac/llvm/gfx6: move mrtz writemask workaround to ac_build_export
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38853>
2025-12-12 17:00:51 +00:00
Georg Lehmann
072815e5cb aco/gfx6: move mrtz writemask workaround to assembler and handle all mrt
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38853>
2025-12-12 17:00:51 +00:00
Rhys Perry
b5cf3b1628 ac/nir: fix check for increasing size of non-descriptor loads
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In the previous version, "end" could have been zero, which would have
allowed an increase of "mul" bytes, when it should not not be increased at all.

For example:
- align_offset=4
- mul=4
- unaligned_new_size=96
- aligned_new_size=128
This would have loaded a dword which was not loaded previously.

fossil-db (gfx1201):
Totals from 115 (0.14% of 79839) affected shaders:
Instrs: 286697 -> 287097 (+0.14%); split: -0.16%, +0.30%
CodeSize: 1477728 -> 1481256 (+0.24%); split: -0.13%, +0.37%
SpillSGPRs: 1662 -> 1658 (-0.24%); split: -0.42%, +0.18%
Latency: 2288612 -> 2290248 (+0.07%); split: -0.04%, +0.11%
InvThroughput: 467307 -> 467602 (+0.06%); split: -0.03%, +0.10%
VClause: 3689 -> 3691 (+0.05%)
SClause: 5052 -> 5064 (+0.24%); split: -0.20%, +0.44%
Copies: 34837 -> 35103 (+0.76%); split: -0.80%, +1.56%
Branches: 7402 -> 7401 (-0.01%)
PreSGPRs: 9147 -> 9143 (-0.04%); split: -0.44%, +0.39%
VALU: 159333 -> 159372 (+0.02%); split: -0.01%, +0.04%
SALU: 52047 -> 52276 (+0.44%); split: -0.55%, +0.99%
SMEM: 9556 -> 9697 (+1.48%)

fossil-db (navi31):
Totals from 238 (0.30% of 79825) affected shaders:
Instrs: 484480 -> 485105 (+0.13%); split: -0.05%, +0.17%
CodeSize: 2514012 -> 2517928 (+0.16%); split: -0.06%, +0.22%
SpillSGPRs: 1064 -> 1059 (-0.47%)
Latency: 3941121 -> 3944670 (+0.09%); split: -0.04%, +0.13%
InvThroughput: 897483 -> 898090 (+0.07%); split: -0.04%, +0.11%
VClause: 7101 -> 7098 (-0.04%)
SClause: 9036 -> 9052 (+0.18%); split: -0.44%, +0.62%
Copies: 42790 -> 43096 (+0.72%); split: -0.30%, +1.01%
PreSGPRs: 14357 -> 14342 (-0.10%); split: -0.37%, +0.26%
VALU: 298325 -> 298347 (+0.01%); split: -0.01%, +0.02%
SALU: 57288 -> 57577 (+0.50%); split: -0.20%, +0.70%
SMEM: 18768 -> 18967 (+1.06%); split: -0.01%, +1.07%

fossil-db (navi21):
Totals from 239 (0.30% of 79825) affected shaders:
Instrs: 444783 -> 445177 (+0.09%); split: -0.07%, +0.15%
CodeSize: 2371776 -> 2373136 (+0.06%); split: -0.13%, +0.19%
Latency: 4226478 -> 4219221 (-0.17%); split: -0.24%, +0.07%
InvThroughput: 1430962 -> 1428445 (-0.18%); split: -0.23%, +0.06%
SClause: 9357 -> 9398 (+0.44%); split: -0.20%, +0.64%
Copies: 42742 -> 42927 (+0.43%); split: -0.53%, +0.96%
Branches: 12975 -> 12970 (-0.04%); split: -0.05%, +0.02%
PreSGPRs: 14368 -> 14312 (-0.39%); split: -0.47%, +0.08%
VALU: 306642 -> 306720 (+0.03%); split: -0.02%, +0.05%
SALU: 63702 -> 63790 (+0.14%); split: -0.31%, +0.45%
SMEM: 20030 -> 20231 (+1.00%); split: -0.00%, +1.01%

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/14458
Backport-to: 25.3
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38903>
2025-12-12 13:58:42 +00:00
Rhys Perry
49d923078f ac/nir: fix calculation of aligned_new_size
This should consider nir_round_up_components().

fossil-db (gfx1201):
Totals from 90 (0.11% of 79839) affected shaders:
MaxWaves: 1829 -> 1901 (+3.94%)
Instrs: 410780 -> 411825 (+0.25%); split: -0.02%, +0.27%
CodeSize: 2227956 -> 2234464 (+0.29%); split: -0.02%, +0.31%
VGPRs: 6952 -> 6760 (-2.76%); split: -3.11%, +0.35%
Latency: 3071765 -> 3073960 (+0.07%); split: -0.00%, +0.07%
InvThroughput: 766201 -> 767322 (+0.15%); split: -0.00%, +0.15%
VClause: 7887 -> 7898 (+0.14%); split: -0.08%, +0.22%
Copies: 48189 -> 48324 (+0.28%); split: -0.05%, +0.33%
PreVGPRs: 6605 -> 6595 (-0.15%); split: -0.18%, +0.03%
VALU: 237272 -> 238147 (+0.37%); split: -0.01%, +0.37%
SALU: 48987 -> 49003 (+0.03%)
VMEM: 15542 -> 15560 (+0.12%)
VOPD: 188 -> 200 (+6.38%)

fossil-db (navi31):
Totals from 89 (0.11% of 79825) affected shaders:
MaxWaves: 1811 -> 1883 (+3.98%)
Instrs: 403695 -> 404691 (+0.25%); split: -0.01%, +0.26%
CodeSize: 2150612 -> 2154860 (+0.20%); split: -0.03%, +0.23%
VGPRs: 6892 -> 6676 (-3.13%)
Latency: 3306107 -> 3310010 (+0.12%); split: -0.01%, +0.13%
InvThroughput: 813092 -> 814382 (+0.16%); split: -0.00%, +0.16%
VClause: 7999 -> 8010 (+0.14%); split: -0.06%, +0.20%
Copies: 50089 -> 50210 (+0.24%); split: -0.05%, +0.29%
PreVGPRs: 6596 -> 6586 (-0.15%); split: -0.18%, +0.03%
VALU: 239617 -> 240392 (+0.32%); split: -0.01%, +0.33%
SALU: 45349 -> 45363 (+0.03%)
VMEM: 15762 -> 15780 (+0.11%)
VOPD: 258 -> 262 (+1.55%)

fossil-db (navi21):
Totals from 89 (0.11% of 79825) affected shaders:
Instrs: 345634 -> 346426 (+0.23%); split: -0.00%, +0.23%
CodeSize: 1895616 -> 1900156 (+0.24%); split: -0.00%, +0.24%
Latency: 3043334 -> 3046859 (+0.12%); split: -0.01%, +0.13%
InvThroughput: 928236 -> 929626 (+0.15%); split: -0.01%, +0.16%
VClause: 7894 -> 7905 (+0.14%); split: -0.06%, +0.20%
Copies: 48694 -> 48785 (+0.19%); split: -0.03%, +0.22%
PreVGPRs: 6580 -> 6570 (-0.15%); split: -0.18%, +0.03%
VALU: 228323 -> 229072 (+0.33%); split: -0.01%, +0.33%
SALU: 47202 -> 47216 (+0.03%)
VMEM: 16546 -> 16564 (+0.11%)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Gitlab: https://gitlab.freedesktop.org/mesa/mesa/-/issues/14458
Backport-to: 25.3
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38903>
2025-12-12 13:58:42 +00:00
Hyunjun Ko
c50474ac6f anv/video: clean up VP9 picture state setup
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Signed-off-by: Hyunjun Ko <zzoon@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38904>
2025-12-12 13:37:44 +00:00
Hyunjun Ko
2fe09217a1 anv/video: fix VP9 chroma subsampling format detection
Fixes: 314de7af ("anv: Initial support for VP9 decoding")
Signed-off-by: Hyunjun Ko <zzoon@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38904>
2025-12-12 13:37:44 +00:00
Boris Brezillon
c0d982751c panvk: Use WB mappings for the global RW and executable memory pools
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This implies relying on all users of these pools to do the flushing
explicitly.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Christoph Pillmayer <christoph.pillmayer@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36385>
2025-12-12 10:15:41 +01:00
Faith Ekstrand
2dd27c647b panvk: Use WB maps for command buffer memory
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Christoph Pillmayer <christoph.pillmayer@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36385>
2025-12-12 10:15:41 +01:00
Faith Ekstrand
f860c7bdf1 panvk: Use write-back maps for descriptor sets
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Christoph Pillmayer <christoph.pillmayer@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36385>
2025-12-12 10:15:41 +01:00
Faith Ekstrand
e84f804a6d panvk: Add a write_desc_data() helper
This centralizes things so that we only ever write to the descriptor
buffer in write_desc_data(). get_desc_slot_ptr() now returns a const
void * so we don't write to it.

Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Christoph Pillmayer <christoph.pillmayer@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36385>
2025-12-12 10:15:41 +01:00
Faith Ekstrand
3b711d687b panvk: Map our standalone private BOs writeback when it makes sense
We can used CPU cached mappings for our private BOs being updated by
the CPU. We make the printf BO an exception to avoid having to
invalidate it every time we check the queue status.

Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Christoph Pillmayer <christoph.pillmayer@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36385>
2025-12-12 10:15:41 +01:00
Faith Ekstrand
5095e125c5 panvk: Add various flush/invalidate helpers for internal BOs
Those will be used as we progressively transition some of our
internal buffers to writeback CPU mappings.

Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Christoph Pillmayer <christoph.pillmayer@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36385>
2025-12-12 10:15:41 +01:00
Boris Brezillon
f60d2aa545 panvk: Force a cacheline alignment when allocating objects from WB shared pools
When allocating individual objects from a shared pool, we don't want
objects to share cachelines, otherwise cache maintenance operations on
individual objects might corrupt other objects.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Reviewed-by: Christoph Pillmayer <christoph.pillmayer@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36385>
2025-12-12 10:15:41 +01:00
Faith Ekstrand
1c7793ea0b panvk: Advertise a HOST_CACHED memory type if we have WC maps
If the GPU is IO coherent, we expose one memory type that's both
host-coherent and host-cached. Otherwise we expose one type that's
host-uncached and host-coherent, and one that's host-cached and
host-noncoherent.

By default, we advertise <cached,non-coherent> before
<non-cached,coherent> because that's the combination providing the
best perfs in situations where the user knows how to deal with the
non-coherent nature of the GPU.

Unfortunately, the CTS has a few bugs (missing or incorrect flush/inval
calls) forcing us to re-order things. We might drop the flag at some
point (some fixes have been submitted, others are on their way).

Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Christoph Pillmayer <christoph.pillmayer@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36385>
2025-12-12 10:15:41 +01:00
Faith Ekstrand
2afef24d3f panvk: Base memoryTypeBits on phys_dev->type_count
Stop hard-coding 1 and just advertise everything on the physical device.

Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Christoph Pillmayer <christoph.pillmayer@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36385>
2025-12-12 10:15:41 +01:00
Faith Ekstrand
ba293b1e49 panvk: Store the memory heaps/types in the physical device
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Christoph Pillmayer <christoph.pillmayer@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36385>
2025-12-12 10:15:41 +01:00
Faith Ekstrand
c7ca8950f2 panvk: Sync CPU maps around host image copies
This is a little annoying.  We probably don't want to call into the
kernel once for every Z slice or array layer we touch.  But at the same
time if we can flush from userspace we don't want to flush/invalidate
more than necessary.  So we have two sets of flushes, a more precise one
which we do based for userspace flushing and a coarse-grained one for
kernel flushing.

Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Christoph Pillmayer <christoph.pillmayer@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36385>
2025-12-12 10:15:41 +01:00
Faith Ekstrand
a32eb87a5d panvk: Implement Flush/InvalidateMappedMemoryRanges()
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Christoph Pillmayer <christoph.pillmayer@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36385>
2025-12-12 10:15:41 +01:00
Boris Brezillon
1e6ea0697a panvk: Flush pending map syncs before submission
Flush deferred CPU sync ops so we can make CPU changes visible to the GPU.
This is currently a NOP because we haven't enabled cached mappings in
panvk yet, but we need to prepare for that before we progressively
switch each relevant buffer to use writeback CPU mappings.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Reviewed-by: Christoph Pillmayer <christoph.pillmayer@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36385>
2025-12-12 10:15:41 +01:00
Boris Brezillon
3ae96f3cfd panvk: Add a debug flag to force CPU map syncs through the kernel
Useful for debugging.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Reviewed-by: Christoph Pillmayer <christoph.pillmayer@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36385>
2025-12-12 10:15:41 +01:00
Boris Brezillon
4bee7f0003 panvk: Add a debug flag to force CPU-uncached mappings
Useful to debug stuff.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Reviewed-by: Christoph Pillmayer <christoph.pillmayer@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36385>
2025-12-12 10:15:41 +01:00
Faith Ekstrand
a670956b7a panvk: Mask off BO_FLAG_WB_MMAP in adjust_bo_flags()
This makes it easier to say we want WB maps various places.

Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Christoph Pillmayer <christoph.pillmayer@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36385>
2025-12-12 10:15:41 +01:00
Boris Brezillon
aebd71cc8d panvk: Rely on supported_bo_flags to mask PAN_KMOD_BO_FLAG_GPU_UNCACHED
Now that we have it hooked up at the props level, we can filter
this flag out in panvk_device_adjust_bo_flags() and use this helper
when creating our uncached mempool.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Reviewed-by: Christoph Pillmayer <christoph.pillmayer@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36385>
2025-12-12 10:15:41 +01:00
Boris Brezillon
76bb8e1a39 panvk: Add a panvk_priv_mem_check_alloc() helper and use it
Stop checking allocation success with panvk_priv_mem_{dev,host}_addr().

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Reviewed-by: Christoph Pillmayer <christoph.pillmayer@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36385>
2025-12-12 10:15:41 +01:00
Boris Brezillon
c9e94f92a0 panvk: Don't allocate memory for a buffer descriptor in CreateBufferView()
The buffer descriptor is copied to the descriptor set, and there's no
side-band data to allocate in GPU memory.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Christoph Pillmayer <christoph.pillmayer@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36385>
2025-12-12 10:15:41 +01:00
Faith Ekstrand
b5e47ba894 pan/kmod: Add new helpers to sync BO CPU mappings
pan_kmod_flush_bo_map_syncs() queues CPU-sync operations, and
pan_kmod_flush_bo_map_syncs_locked() ensures all queued
operations are flushed/executed. Those will be used when we start
adding support for CPU-cached mappings.

Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Christoph Pillmayer <christoph.pillmayer@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36385>
2025-12-12 10:15:41 +01:00