Commit graph

70315 commits

Author SHA1 Message Date
Faith Ekstrand
4bf135bc6d gallium/dri3: Drop loader_dri3_buffer::size
It's never set outside of the automatic zero from calloc().  Having it
in there is decpetive.

Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36014>
2025-07-14 18:31:47 +00:00
Faith Ekstrand
4e88f02ab4 egl,glx,kopper: Switch back to DRIkopperLoaderExtension::GetDrawableInfo
This decouples Kopper and swrast.  With this change, dri/kopper.c no
longer references DRIswrastLoaderEsxtension at all.

Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36014>
2025-07-14 18:31:46 +00:00
Faith Ekstrand
1f263aaef9 kopper: Dead code get_image() and get_image_shm()
Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36014>
2025-07-14 18:31:46 +00:00
Faith Ekstrand
8d9675520f zink/kopper: Don't recycle unused acquire semaphores
Fixes: e9f18f64b9 ("zink: also cache swapchain semaphores")
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36014>
2025-07-14 18:31:46 +00:00
Mike Blumenkrantz
475c43cf8a zink: translate intensity formats
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Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36031>
2025-07-14 16:37:25 +00:00
Mike Blumenkrantz
eacb167375 aux/trace: sanitize draws
if a draw isn't indexed, don't trace index_bias since this is a garbage value

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36045>
2025-07-14 16:10:35 +00:00
Patrick Lerda
5bee7c0b12 r600: fix rv770 border color
The border color of the rv770 gpu behaves the same way as
the evergreen border color. This change updates the software
accordingly.

This change is enabled for all the pre-evergreen gpus.

This change fixes 120 piglit tests. The rv770 ci is updated
as well.

Cc: mesa-stable
Signed-off-by: Patrick Lerda <patrick9876@free.fr>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34502>
2025-07-14 11:56:03 +00:00
Patrick Lerda
d9baadcfb5 r600: set never as the depth compare function when depth compare is disabled
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This is the backport of 0c0b978938 "radeonsi: set NEVER as
the depth compare func if depth compare is disabled".

The function r600_tex_compare arguments are updated with the "const"
keyword.

This change fixes the test below which was broken after 0c6e56c391:
khr-gl4[5-6]/incomplete_texture_access/sampler: fail pass

Fixes: 0c6e56c391 ("mesa: (more) correctly handle incomplete depth textures")
Signed-off-by: Patrick Lerda <patrick9876@free.fr>
Acked-by: Vitaliy Triang3l Kuzmin <triang3l@yandex.ru>
Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35968>
2025-07-14 11:07:18 +00:00
Valentine Burley
94a2e0a48d zink/ci: Add a performance traces job on ADL
Add a new `zink-anv-adl-traces-performance` job, which runs the same set
of traces as the `iris-anv-adl-traces-performance` job.

Signed-off-by: Valentine Burley <valentine.burley@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36074>
2025-07-14 08:15:25 +00:00
Caio Oliveira
887642b0f2 intel: Add INTEL_DEBUG=no-vrt
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Add support for disabling the VRT (Variable Register Thread) feature.
The strategy here is to force the old BRW_MAX_GRF limit for the
register allocator (locks the upper limit) and make sure
ptl_register_blocks() always return that amount of blocks (locks
the lower limit).

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35781>
2025-07-13 21:11:02 +00:00
Caio Oliveira
636c37990a iris: Refactor BRW_KEY_INIT to get an iris_prog_base_key
Avoids passing individual fields of that key repeatedly in
the call-sites.

Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35781>
2025-07-13 21:11:00 +00:00
Yogesh Mohan Marimuthu
9fa192ea22 radeonsi: submit cs_preamble_state to as first job in userqueue
Also any other new context's cs_preamble_state will not be submitted.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35106>
2025-07-13 20:05:27 +00:00
Yogesh Mohan Marimuthu
0186977988 ac, radeonsi: prepare cs_preamble_state for userq reg shadowing
register shadowing has to be enabled in CONTEXT_CONTROL packet
in cs_preamble_state for user queue.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35106>
2025-07-13 20:05:27 +00:00
Yogesh Mohan Marimuthu
aab890644b radeonsi: reorder if condition in si_init_cp_reg_shadowing() function
cs_preamble_state can be created before initializing register shadowing
since register shadowing failure means driver failed now.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35106>
2025-07-13 20:05:27 +00:00
Yogesh Mohan Marimuthu
1cb0af6308 radeonsi: add uses_kernelq_reg_shadowing in struct si_context
sctx->uses_kernelq_reg_shadowing instead of sctx->shadowing.registers
for register shadowing enable check.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35106>
2025-07-13 20:05:27 +00:00
Yogesh Mohan Marimuthu
b55ee5f335 radeonsi: rename sctx->has_graphics to sctx->is_gfx_queue
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35106>
2025-07-13 20:05:26 +00:00
Yogesh Mohan Marimuthu
761496b49e radeonsi: has_kernelq_reg_shadowing failure means driver failed
If register shadowing enabling failed, then driver ctx init will
fail instead of disabling register shadowing.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35106>
2025-07-13 20:05:26 +00:00
Yogesh Mohan Marimuthu
0068dbd76b ac: enable kernelq reg shadowing only when userq is disabled
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35106>
2025-07-13 20:05:25 +00:00
Yogesh Mohan Marimuthu
1000ee3d2f ac,radeonsi,radv: rename register_shadowing_required
rename register_shadowing_required to has_kernelq_reg_shadowing

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35106>
2025-07-13 20:05:25 +00:00
Asahi Lina
067d820c9d asahi: Mark KMS exported resource BOs as shared
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Fixes: #13524

Signed-off-by: Asahi Lina <lina@asahilina.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36097>
2025-07-13 17:43:06 +00:00
Asahi Lina
a8f33c35f9 asahi: Add BO handles to resource debug
Signed-off-by: Asahi Lina <lina@asahilina.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36097>
2025-07-13 17:43:06 +00:00
Rob Clark
09936883a4 freedreno: dump layout in import path as well
Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36075>
2025-07-13 17:16:54 +00:00
Rob Clark
65931bfc7f freedreno: Move layout to layout_resource_for_handle()
This is already done for a6xx.  For everyone else move it out of the
common code path and into fd_layout_resource_for_handle().

Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36075>
2025-07-13 17:16:54 +00:00
Rob Clark
329a022894 freedreno/a6xx: Use metadata to resolve INVALID modifier
Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36075>
2025-07-13 17:16:53 +00:00
Rob Clark
b4b1573258 freedreno/a6xx: Refactor handle import
Explicitly layout the resource in all cases, rather than depending on
the partial/incomplete layout that is done in fd_resource_from_handle()
(which will be going away).

Now that we are not YOLOing the layout, it turns up some questionable
assumptions in piglit.  Just mark those xfails for now.

Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36075>
2025-07-13 17:16:53 +00:00
Rob Clark
27b0f64b3e freedreno/a6xx: Use handle for explicit layout
Use the winsys_handle to get the fdl_explicit_layout params rather than
relying on pre-populated layout params.

Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36075>
2025-07-13 17:16:53 +00:00
Rob Clark
eb7e6a567e freedreno: Pass handle down to layout_resource_for_modifier
And rename it to layout_resource_for_handle.  The handle contains
additional information such as the pitch/offset for the imported
buffer.

Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36075>
2025-07-13 17:16:53 +00:00
Rob Clark
e55c6c5f25 freedreno/a6xx: Convert to fdl6_layout_image
Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36075>
2025-07-13 17:16:52 +00:00
Rob Clark
b6e27a9f57 freedreno/a5xx: Convert to fdl5_layout_image
Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36075>
2025-07-13 17:16:52 +00:00
Rob Clark
617969d8a2 freedreno: Move layout init to backends
Export the existing helper, and call it from the legacy backends which
are not using fdl.

This moves all the layout initialization to the backends (and eventually
to fdl for the backends using that).

Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36075>
2025-07-13 17:16:52 +00:00
Rob Clark
4d4745764c freedreno: Pass layout type to backend
Pass the layout type to setup_slices, renamed to layout_resource, to
move some of the partial layout initialization to the gen specific
backend.

Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36075>
2025-07-13 17:16:51 +00:00
Rob Clark
34153d92b5 freedreno: Add helper to initialize layout params
No point in duplicating this in many places.

Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36075>
2025-07-13 17:16:51 +00:00
Rob Clark
43bd9082fa freedreno: Don't call setup_slices for buffers
We already use fdl_layout_buffer() when the resource is allocated.  But
it was missed to convert fd_resource_resize().  Convert it so there is
no path into ->setup_slices() with something that is a buffer.

Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36075>
2025-07-13 17:16:51 +00:00
Rob Clark
52f79561e3 freedreno: Misc whitespace cleanups
Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36075>
2025-07-13 17:16:50 +00:00
M Henning
ee3d6aa87d nv50_ir: Remove dead variable
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Nothing ever read from fixedReg, so drop it.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24541>
2025-07-13 15:27:33 +00:00
M Henning
e573440a5d nv50_ir_ra: Don't coalesce mixed constraints
It's difficult to handle nodes that have both fixed reg constraints and
compMasks. We may be able to handle some of these in the future, but
skip them for now.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24541>
2025-07-13 15:27:33 +00:00
M Henning
b920ff26ee nv50_ir_ra: Use propagated compMask for reg offset
Previously, we would only offset register ids for LValues that are
directly used in a merge/split instruction, but this is incorrect.
We instead need to apply the offset to all LValues that compMask
has been propagated to. By calcuating this from compMask instead
of figuring it out a second time, we fix that issue and also manage
to simplify the code a bit.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24541>
2025-07-13 15:27:32 +00:00
M Henning
a46942ce04 nv50_ir_ra: Add constraint movs for split-of-split
This handles this case similarly to the merge-of-merge fix from c86563c2

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24541>
2025-07-13 15:27:32 +00:00
M Henning
7e653b2eb1 nv50_ir_ra: Remove an assign to lval->compMask
This code previously stored two rather different masks in compMask:
 1. from merge/splits (calculated in makeCompound), and
 2. in the join root for whatever register was assigned

Since we were already calculating the second type as intfMask where it
is used in checkInterference(), change that function to unconditionally
use intfMask and only use compMask for the first type.

This is functionally equavalent and keeps the types of masks separate.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24541>
2025-07-13 15:27:31 +00:00
Karol Herbst
facb048cdb nouveau: move util_framebuffer_init into the driver
It will get cleaned up later. Maybe.

Also stop setting the context or the reference. It's all dead code now.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35806>
2025-07-13 15:12:48 +00:00
Karol Herbst
5a91e04fa4 nvc0: remove dead surface tracking code
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35806>
2025-07-13 15:12:48 +00:00
Karol Herbst
2a8779f06f nv50,nvc0: Set the texture for 3D blitter surfaces
This fixes accesses to unitialized data inside pipe_surface_width.

Fixes: 2eb45daa9c ("gallium: de-pointerize pipe_surface")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35806>
2025-07-13 15:12:48 +00:00
Gert Wollny
5d4f59a3ed r600/sfn: catch remaining indirect inputs when lowering GS input arrays
Some checks are pending
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Lowering IO to temps leads to problems with RA with piglit
   spec@glsl-1.50@execution@geometry@max-input-component

Not doing so results in an assertion failure with piglit
   spec@glsl-1.50@execution@geometry@dynamic_input_array_index

because not all indirect IO access is lowered. Using
nir_lower_indirect_derefs works around this limitations.

v2: Fix formatting (Patrick Lerda)

Fixes: 1186c73c6 (r600: implement gs indirect load_per_vertex_input)

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36051>
2025-07-12 20:58:29 +00:00
Gert Wollny
00b752565c r600/sfn: Add support for indirect VS input read
I've overlooked that unconditionallowering of indirect VS
inputs had been dropped. Since VS inputs are stored in
consecutive registers one can implement the indirect access
without additional lowering, it just needs a proper declararion
of the registers forming the array.

v2: - Fix formatting (Patrick Lerda)
    - Use allocator for std::map to avvoid menory leak
      (Patrick Lerda)

Fixes: a43bfffe1e
    r600: Correct nir_indirect_supported_mask

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36051>
2025-07-12 20:58:29 +00:00
Loïc Molinari
a9a3ee3719 panfrost: Get AFBC-P payload layout on the CPU
The AFBC-P payload layout is currently retrieved in 2 steps starting
with the payload sizes retrieval using a CS job on the GPU followed by
a CPU pass to set the payload offsets. This commit proposes to do both
steps on the CPU at once using a new utility function
pan_afbc_payload_layout_packed().

A new utility function pan_afbc_payload_uncompressed_size() is added
to help retrieve the uncompressed size from a pipe_format and
modifier. Both the CPU and GPU versions use it now.

A new AFBC-P driconf option "pan_afbcp_gpu_payload_sizes" is added to
fallback to the original payload sizes retrieval on the GPU.

Signed-off-by: Loïc Molinari <loic.molinari@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Acked-by: Eric R. Smith <eric.smith@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35001>
2025-07-12 11:58:14 +00:00
Loïc Molinari
f750620982 panfrost: Improve AFBC header block accesses
Add an AFBC header block structure pan_afbc_headerblock to improve
readability when accessing header blocks. get_superblock_size(), which
will be used for AFBC packing in the next commits, has been moved to
pan_afbc.h and renamed to pan_afbc_payload_size() so that it can be
tested. Other utility functions pan_afbc_header_subblock_size() and
pan_afbc_header_subblock_uncompressed_size() hasve been added to help
retrieve the compressed or uncompressed size of a subblock from a
header. This commit also fixes a few issues like arch handling.

Signed-off-by: Loïc Molinari <loic.molinari@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Acked-by: Eric R. Smith <eric.smith@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35001>
2025-07-12 11:58:14 +00:00
Loïc Molinari
a0bdbcbae6 panfrost: Async AFBC packing debug info
Print the AFBC-P state of a resource along its asynchronous packing
process when PAN_MESA_DEBUG=forcepack. There's no need to prevent
tiling in that case now that packing maintains the tiling state.

Signed-off-by: Loïc Molinari <loic.molinari@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Acked-by: Eric R. Smith <eric.smith@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35001>
2025-07-12 11:58:14 +00:00
Loïc Molinari
91aa7c4f8d panfrost: Async AFBC packing
Pack AFBC resources asynchronously in order to prevent stalls at
texture upload waiting for 1) the AFBC staging blit (sparse encoding)
to complete and 2) the AFBC payload sizes retrieval.

After a texture upload, an AFBC resource is now progressively packed
at each read access once consecutively accessed a certain number of
times without a write access. This allows to prevent most stalls by
making AFBC packing a progressive async background process.

A useful side effect is that consecutive glTexSubImage*() calls on the
same texture (for texture atlases for instance) don't uselessly
respawn packing.

A new AFBC-P driconf option "pan_afbcp_reads_threshold" is added to
tweak the consecutive reads threshold.

Signed-off-by: Loïc Molinari <loic.molinari@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Reviewed-by: Ashley Smith <ashley.smith@collabora.com>
Acked-by: Eric R. Smith <eric.smith@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35001>
2025-07-12 11:58:13 +00:00
Loïc Molinari
df0e7e964d panfrost: Make panfrost_pack_afbc() static
It isn't used outside of pan_resource.c.

Signed-off-by: Loïc Molinari <loic.molinari@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Eric R. Smith <eric.smith@collabora.com>
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35001>
2025-07-12 11:58:13 +00:00
Loïc Molinari
42c305def3 panfrost: Test mipmap chain validity in panfrost_should_pack_afbc()
Signed-off-by: Loïc Molinari <loic.molinari@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Eric R. Smith <eric.smith@collabora.com>
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35001>
2025-07-12 11:58:13 +00:00