fdo-mirrors/mesa
1
0
Fork 0
mirror of https://gitlab.freedesktop.org/mesa/mesa.git synced 2026-05-27 07:58:14 +02:00
Code Issues Projects Releases Packages Wiki Activity Actions 3
208770 commits 66 branches 936 tags 948 MiB
Commit graph

61 commits

Author SHA1 Message Date
Georg Lehmann
d672737372 nir,aco: add byte_perm_amd 
Acked-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36115>
 2025-07-16 11:46:52 +00:00
Natalie Vock
ac96594b86 aco/isel: Use vector-aligned operands for ds_stack_push8_pop1_rtn_b32
Some checks are pending
macOS-CI / macOS-CI (dri) (push) Waiting to run
Details
macOS-CI / macOS-CI (xlib) (push) Waiting to run
Details 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35269>
 2025-07-15 21:34:40 +00:00
Natalie Vock
ea66a8d1c5 aco,nir: Add support for GFX12 ds_bvh_stack_push8_pop1_rtn_b32 instruction 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35269>
 2025-07-15 21:34:40 +00:00
Natalie Vock
9707b30965 nir,aco: Add ds_bvh_stack_rtn 
This is a ds instruction that also overwrites its first input, so
introduce a new ds format with two outputs.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35269>
 2025-07-15 21:34:39 +00:00
Natalie Vock
c515f1fd58 aco: Use vector-aligned operands for image_bvh8_intersect_ray 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35269>
 2025-07-15 21:34:38 +00:00
Natalie Vock
f17fe05e32 aco/isel: Improve vector splits for image_bvh8_intersect_ray 
Using split_vector to split everything into scalars allows copy-prop to
eliminate the final p_create_vector. Considerably reduces copies and
register thrashing.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35269>
 2025-07-15 21:34:38 +00:00
Marek Olšák
d12bc87dda aco: implement upcasting 16-bit types for 32-bit color buffers in PS epilog 
This was missed when implementing the change for LLVM.

Fixes: fbbf029529 - radeonsi: enable 16-bit mediump IO for PS outputs only, and VS->PS with env var

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36112>
 2025-07-15 18:28:30 +00:00
Marek Olšák
5ded4f3c7d aco: remove unused aco_symbol_lds_ngg_gs_out_vertex_base 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35529>
 2025-07-12 10:28:21 +00:00
Georg Lehmann
92d433c54a aco: vectorize conversions from 8bit to 16bit 
Massively helps emulated fp8 performance.

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35854>
 2025-07-12 08:39:15 +00:00
Georg Lehmann
7fece5592c aco: vectorize 16bit extracts 
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35854>
 2025-07-12 08:39:14 +00:00
Rhys Perry
3b9a1ce4ca aco: remove RegClass::as_subdword 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35465>
 2025-07-11 12:15:09 +00:00
Rhys Perry
9c55b0ca20 aco: use MUBUF for global access with SGPR address on GFX7/8 
This should be better than using FLAT, which only supports a VGPR address.

fossil-db (polaris10):
Totals from 159 (0.26% of 62070) affected shaders:
MaxWaves: 789 -> 803 (+1.77%)
Instrs: 234284 -> 230557 (-1.59%); split: -1.71%, +0.12%
CodeSize: 1212324 -> 1186716 (-2.11%); split: -2.23%, +0.11%
SGPRs: 10504 -> 10712 (+1.98%)
VGPRs: 10556 -> 10236 (-3.03%); split: -3.37%, +0.34%
SpillSGPRs: 579 -> 577 (-0.35%)
Latency: 3903056 -> 3875625 (-0.70%); split: -0.87%, +0.16%
InvThroughput: 3139443 -> 3114426 (-0.80%); split: -0.86%, +0.07%
VClause: 4205 -> 4433 (+5.42%); split: -0.43%, +5.85%
SClause: 4461 -> 4445 (-0.36%); split: -0.43%, +0.07%
Copies: 30889 -> 31507 (+2.00%); split: -0.29%, +2.29%
PreSGPRs: 7370 -> 7609 (+3.24%)
PreVGPRs: 8339 -> 8193 (-1.75%)
VALU: 175025 -> 170232 (-2.74%); split: -2.77%, +0.03%
SALU: 27269 -> 28532 (+4.63%); split: -0.01%, +4.64%

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35465>
 2025-07-11 12:15:08 +00:00
Rhys Perry
6396a82695 aco: return a format in lower_global_address 
No fossil-db changes (navi10, pitcairn).

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35465>
 2025-07-11 12:15:07 +00:00
Rhys Perry
89c2c94147 aco: increase global constant offset limit slightly 
Before, this wasn't actually the maximum value plus one.

fossil-db (navi10):
Totals from 4 (0.01% of 63207) affected shaders:
(no stat changes)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35465>
 2025-07-11 12:15:07 +00:00
Rhys Perry
d7dcd81c77 aco/gfx6: allow both constant and gpr offset for global with sgpr address 
fossil-db (pitcairn):
Totals from 81 (0.13% of 62069) affected shaders:
MaxWaves: 332 -> 335 (+0.90%)
Instrs: 150087 -> 149737 (-0.23%); split: -0.30%, +0.06%
CodeSize: 754636 -> 752712 (-0.25%); split: -0.31%, +0.06%
SGPRs: 6128 -> 6184 (+0.91%)
VGPRs: 7220 -> 7208 (-0.17%); split: -0.28%, +0.11%
SpillSGPRs: 288 -> 287 (-0.35%)
Latency: 2199197 -> 2198338 (-0.04%); split: -0.20%, +0.17%
InvThroughput: 1613474 -> 1614303 (+0.05%); split: -0.07%, +0.12%
VClause: 2905 -> 2862 (-1.48%); split: -2.34%, +0.86%
SClause: 2366 -> 2378 (+0.51%); split: -0.17%, +0.68%
Copies: 17312 -> 17264 (-0.28%); split: -1.03%, +0.76%
PreSGPRs: 5080 -> 5004 (-1.50%)
PreVGPRs: 5656 -> 5640 (-0.28%)
VALU: 114097 -> 113831 (-0.23%); split: -0.31%, +0.07%
SALU: 16004 -> 15944 (-0.37%); split: -0.41%, +0.04%

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35465>
 2025-07-11 12:15:06 +00:00
Rhys Perry
684943bd1f aco/gfx6: allow vgpr offset for global access with sgpr address 
No reason why we can't use offen like normal buffer loads.

fossil-db (pitcairn):
Totals from 122 (0.20% of 62069) affected shaders:
MaxWaves: 521 -> 525 (+0.77%)
Instrs: 238341 -> 237228 (-0.47%); split: -0.57%, +0.10%
CodeSize: 1196260 -> 1188076 (-0.68%); split: -0.78%, +0.09%
SGPRs: 8752 -> 8760 (+0.09%); split: -0.64%, +0.73%
VGPRs: 10456 -> 10440 (-0.15%); split: -0.88%, +0.73%
Latency: 3958385 -> 3946186 (-0.31%); split: -0.38%, +0.07%
InvThroughput: 3097193 -> 3084417 (-0.41%); split: -0.42%, +0.01%
VClause: 4058 -> 4500 (+10.89%); split: -0.02%, +10.92%
SClause: 4511 -> 4500 (-0.24%); split: -0.42%, +0.18%
Copies: 31228 -> 31718 (+1.57%); split: -0.38%, +1.95%
PreSGPRs: 7211 -> 7461 (+3.47%)
PreVGPRs: 8174 -> 8147 (-0.33%); split: -0.34%, +0.01%
VALU: 174779 -> 173294 (-0.85%); split: -0.87%, +0.02%
SALU: 29138 -> 29641 (+1.73%); split: -0.09%, +1.82%

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35465>
 2025-07-11 12:15:05 +00:00
Rhys Perry
09a5af121f aco: simplify the load callback 
We can put these parameters in the LoadEmitInfo instead.

No fossil-db changes (navi10, pitcairn).

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35465>
 2025-07-11 12:15:04 +00:00
Rhys Perry
101d0b791f aco: add too-large constant offset to the address instead of the offset 
In case the addition with the offset overflows.

No fossil-db changes (navi10, pitcairn).

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35465>
 2025-07-11 12:15:03 +00:00
Rhys Perry
bd9a9a77fe aco: use addition helper in emit_load 
No fossil-db changes (navi10, pitcairn).

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35465>
 2025-07-11 12:15:03 +00:00
Rhys Perry
8defd1bc16 aco/gfx6: disallow global access with sgpr address and two offsets 
No fossil-db changes (navi10, pitcairn).

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35465>
 2025-07-11 12:15:03 +00:00
Georg Lehmann
d45f375a9d aco: only insert fp mode when needed
Some checks are pending
macOS-CI / macOS-CI (dri) (push) Waiting to run
Details
macOS-CI / macOS-CI (xlib) (push) Waiting to run
Details 
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35746>
 2025-07-10 13:48:50 +00:00
Daniel Schürmann
610a19cf31 aco/isel: allow to select SGPR defs for vectorized bcsel and logical operations
Some checks are pending
macOS-CI / macOS-CI (dri) (push) Waiting to run
Details
macOS-CI / macOS-CI (xlib) (push) Waiting to run
Details 
No fossil changes.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35784>
 2025-07-09 14:10:37 +00:00
Daniel Schürmann
d7477111d2 aco: split vectorized bcsel and bitwise logic VGPR definitions 
This has a slightly negative effect on parallel-rdp, but positively affects FSR4.

Totals from 14 (0.02% of 79839) affected shaders: (Navi48)

Instrs: 63543 -> 63646 (+0.16%); split: -0.01%, +0.17%
CodeSize: 352888 -> 353608 (+0.20%); split: -0.02%, +0.23%
Latency: 1822354 -> 1825036 (+0.15%)
InvThroughput: 364683 -> 365738 (+0.29%); split: -0.04%, +0.32%
Copies: 9299 -> 9363 (+0.69%); split: -0.11%, +0.80%
PreVGPRs: 1381 -> 1394 (+0.94%)
VALU: 34511 -> 34575 (+0.19%); split: -0.03%, +0.21%
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35784>
 2025-07-09 14:10:36 +00:00
Daniel Schürmann
764ee3a834 radv: don't lower subdword phis to scalar 
Totals from 193 (0.24% of 79839) affected shaders: (Navi48)

MaxWaves: 6004 -> 6024 (+0.33%)
Instrs: 169276 -> 166784 (-1.47%); split: -3.01%, +1.53%
CodeSize: 940608 -> 915768 (-2.64%); split: -4.29%, +1.64%
VGPRs: 8012 -> 7716 (-3.69%); split: -3.99%, +0.30%
SpillVGPRs: 185 -> 0 (-inf%)
Scratch: 13568 -> 0 (-inf%)
Latency: 2159787 -> 2147084 (-0.59%); split: -2.86%, +2.28%
InvThroughput: 664022 -> 395859 (-40.38%); split: -42.59%, +2.21%
VClause: 2998 -> 2880 (-3.94%); split: -4.27%, +0.33%
SClause: 3117 -> 3120 (+0.10%)
Copies: 21290 -> 16278 (-23.54%); split: -24.74%, +1.20%
Branches: 4757 -> 4760 (+0.06%); split: -0.34%, +0.40%
PreSGPRs: 7369 -> 7378 (+0.12%); split: -0.11%, +0.23%
PreVGPRs: 4257 -> 3859 (-9.35%); split: -9.94%, +0.59%
VALU: 83173 -> 79804 (-4.05%); split: -5.68%, +1.63%
SALU: 36672 -> 37318 (+1.76%); split: -0.02%, +1.78%
VMEM: 4012 -> 3762 (-6.23%); split: -6.83%, +0.60%
SMEM: 4300 -> 4303 (+0.07%)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35784>
 2025-07-09 14:10:36 +00:00
Daniel Schürmann
fc2fcac04e aco: allow vectorized nir_op_mov 
nir_lower_phis_to_scalar() can create these with the next commit.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35784>
 2025-07-09 14:10:36 +00:00
Daniel Schürmann
3f35b1329e aco: allow subdword vector-definitions on some VALU instructions 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35784>
 2025-07-09 14:10:36 +00:00
Daniel Schürmann
025306a95d aco/isel: refactor emission of bitwise logical operations 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35784>
 2025-07-09 14:10:36 +00:00
Georg Lehmann
82af226690 aco: remove unused swap_srcs from emit_vop3p_instruction 
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35825>
 2025-07-09 07:23:09 +00:00
Georg Lehmann
96793fb0c1 aco/isel: implement 16bit vec2 shifts 
The source bit size mismatch is a bit annoying, but it's still worth it to
vectorize these.

Foz-DB Navi48:
Totals from 85 (0.11% of 80251) affected shaders:
Instrs: 119073 -> 118827 (-0.21%); split: -0.21%, +0.00%
CodeSize: 669604 -> 667552 (-0.31%); split: -0.31%, +0.00%
VGPRs: 4796 -> 4736 (-1.25%)
Latency: 1907685 -> 1901983 (-0.30%); split: -0.32%, +0.02%
InvThroughput: 642603 -> 640680 (-0.30%); split: -0.33%, +0.03%
VClause: 2088 -> 2091 (+0.14%)
Copies: 18300 -> 18394 (+0.51%); split: -0.01%, +0.52%
Branches: 3452 -> 3440 (-0.35%)
VALU: 63378 -> 63144 (-0.37%); split: -0.37%, +0.00%
SALU: 23065 -> 23076 (+0.05%); split: -0.00%, +0.05%

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35825>
 2025-07-09 07:23:08 +00:00
Daniel Schürmann
2c51a8870d nir: add nir_vectorize_cb callback parameter to nir_lower_phis_to_scalar()
Some checks are pending
macOS-CI / macOS-CI (dri) (push) Waiting to run
Details
macOS-CI / macOS-CI (xlib) (push) Waiting to run
Details 
Similar to nir_lower_alu_width(), the callback can return the
desired number of components for a phi, or 0 for no lowering.

The previous behavior of nir_lower_phis_to_scalar() with lower_all=true
can be elicited via nir_lower_all_phis_to_scalar() while the previous
behavior with lower_all=false now corresponds to nir_lower_phis_to_scalar()
with NULL callback.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Mel Henning <mhenning@darkrefraction.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35783>
 2025-07-08 15:33:59 +00:00
Marek Olšák
4263b49778 ac/nir: remove ngg_scratch LDS ABI, allocate it in the lowering pass 
This is a cleanup.

Old gs LDS layout: [es outputs][gs outputs][scratch]
Old nogs LDS layout: [xfb/cull][scratch]

New gs LDS layout: [es outputs][scratch|gs outputs]
New nogs LDS layout: [scratch|xfb/cull]

The LDS scratch is moved to the beginning of the preceding buffer in LDS,
while the addresses in that LDS buffer are offset by the scratch size.
It effectively merges the LDS scratch with the preceding buffer in LDS.
Thanks to that, we no longer need the ngg_scratch ABI and the offset
in a user SGPR.

The lowering passes now return the LDS scratch size, which is used
by the drivers to determine the final LDS size.

The ngg_lds_layout SGPR is now unused without GS in RADV.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35352>
 2025-07-02 20:27:41 +00:00
Alyssa Rosenzweig
67237b6f1b treewide: use nir_break_if 
Via Coccinelle patch:

    @@
    expression builder, condition;
    @@

    -nir_push_if(builder, condition);
    -{
    -nir_jump(builder, nir_jump_break);
    -}
    -nir_pop_if(builder, NULL);
    +nir_break_if(builder, condition);

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Mel Henning <mhenning@darkrefraction.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35794>
 2025-06-30 14:51:24 -04:00
Natalie Vock
e006f68b11 aco/isel: Don't add scratch offset as gfx8- soffset if no offsets exist 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35031>
 2025-06-26 11:02:53 +00:00
Natalie Vock
a5eba11657 aco/isel: Use stack pointer parameter in load/store_scratch 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35031>
 2025-06-26 11:02:53 +00:00
Natalie Vock
4a62b342f3 aco: Add common utility to load scratch descriptor 
Also modifies the scratch descriptor to take the stack pointer into
account.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35031>
 2025-06-26 11:02:52 +00:00
Samuel Pitoiset
e91029c82d aco: consider that nir_tex_src_{coord,ddx} can be the first source 
Only -1 means it's not found, but 0 is still valid.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35736>
 2025-06-25 17:20:02 +00:00
Georg Lehmann
001cd632ee aco: select float8 to fp32 conversions 
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35434>
 2025-06-23 07:59:27 +00:00
Georg Lehmann
19ca4be6b0 aco/isel: fix get_alu_src with 8bit vec2 source 
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35434>
 2025-06-23 07:59:27 +00:00
Georg Lehmann
f047a67fba nir,aco: optimize FP16_OFVL pattern created by vkd3d-proton 
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35434>
 2025-06-23 07:59:27 +00:00
Georg Lehmann
9e6adcbca0 aco: select fp32 to float8 conversions 
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35434>
 2025-06-23 07:59:26 +00:00
Georg Lehmann
65650cfef8 aco: emit float8 wmma 
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35434>
 2025-06-23 07:59:25 +00:00
Georg Lehmann
88753ddd1d aco: allow nir divergence to be printed again 
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32990>
 2025-06-19 07:02:20 +00:00
Samuel Pitoiset
d23de4918e aco: add support for image f32 atomic add 
It's supported on GFX12.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35493>
 2025-06-13 08:47:59 +00:00
Pierre-Eric Pelloux-Prayer
3bcbd11a33 aco/isel: fix visit_tex handling of is_sparse 
For cases when less than 4 components are read, the original code
would compute an incorrect dmask. eg: with a single component + is_sparse,
the dmask was 0x13:
  - 0x 3 = coming from nir_def_components_read
  - 0x10 = the sparse bit
While it should have at 2 bits set (1 for the color/depth, 1 for tfe).

This caused problem when expand_vector() used the dmask to generate
the final results, because the value for the sparse component was
read from the wrong index.

So after the call to emit_mimg() dmask needs to be adjusted
because the components will be stored in order, so if mask is 0x11
the tfe value would be stored at invalid index=5 (while it should
be at index=1).

This fixes KHR-GL46.sparse_texture_clamp_tests.SparseTextureClampLookupResidency_texture_2d_depth_component16
and KHR-GL46.sparse_texture2_tests.SparseTexture2Lookup_texture_2d_depth_component16
with ACO.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35206>
 2025-06-11 12:11:28 +00:00
Georg Lehmann
d95e90ab5f aco: do not use v_cvt_pk_u8_f32 for f2u8 
The ISA docs don't mention this, but instead of always truncating
like other integer conversions, this opcode actually uses the single
precision rounding mode.

We could continue to use the opcode and set the rounding mode to rtz
in lower_to_hw_instrs, but I think I should just concede that f2u8
isn't worth the effort.

Fixes: 9bb10b58 ("aco: use v_cvt_pk_u8_f32 for f2u8")

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35391>
 2025-06-10 07:32:04 +00:00
Marek Olšák
80236f2367 ac/nir/tess: add if/endif for HS threads in NIR instead of ACO/LLVM 
This just removes the if/endif wrapping for LLVM, and hopefully the ACO
change does the same thing.

ACO had redundant code in endif_merged_wave_info, which is removed here.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34780>
 2025-06-07 16:29:38 +00:00
Georg Lehmann
a6675f35b2 aco: clamp exponent of 16bit ldexp 
The hw uses only a 16bit int, but NIR's src is 32bit.

Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34073>
 2025-06-03 06:34:18 +00:00
Samuel Pitoiset
9692ef41a3 aco: implement bitfield_extract for 8-bit/16-bit
Some checks are pending
macOS-CI / macOS-CI (dri) (push) Waiting to run
Details
macOS-CI / macOS-CI (xlib) (push) Waiting to run
Details 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35199>
 2025-05-29 12:24:59 +00:00
Samuel Pitoiset
8596150ae8 aco: implement bitfield_reverse for types other than 32-bits 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34583>
 2025-05-28 09:52:12 +00:00
Daniel Schürmann
5b4d284493 aco/isel: use vector-aligned operands for image_bvh64_intersect_ray 
Totals from 93 (0.12% of 79377) affected shaders: (Navi48)
MaxWaves: 1376 -> 1368 (-0.58%)
Instrs: 3583500 -> 3581861 (-0.05%); split: -0.05%, +0.00%
CodeSize: 18792300 -> 18785296 (-0.04%); split: -0.04%, +0.00%
VGPRs: 8652 -> 8592 (-0.69%); split: -1.25%, +0.55%
Latency: 20861347 -> 20834407 (-0.13%); split: -0.17%, +0.04%
InvThroughput: 4032604 -> 4028020 (-0.11%); split: -0.14%, +0.03%
VClause: 90507 -> 90525 (+0.02%); split: -0.01%, +0.03%
Copies: 279429 -> 277839 (-0.57%); split: -0.58%, +0.01%
Branches: 100260 -> 100251 (-0.01%)
PreVGPRs: 8949 -> 8771 (-1.99%)
VALU: 1955635 -> 1954053 (-0.08%); split: -0.08%, +0.00%
SALU: 477347 -> 477329 (-0.00%); split: -0.01%, +0.01%
VOPD: 69 -> 61 (-11.59%)

Totals from 93 (0.12% of 79377) affected shaders: (Navi31)

MaxWaves: 1376 -> 1374 (-0.15%)
Instrs: 3442606 -> 3440344 (-0.07%); split: -0.07%, +0.00%
CodeSize: 17801008 -> 17790476 (-0.06%); split: -0.07%, +0.01%
VGPRs: 8652 -> 8556 (-1.11%); split: -1.25%, +0.14%
Latency: 20590943 -> 20542279 (-0.24%); split: -0.27%, +0.03%
InvThroughput: 3978133 -> 3969497 (-0.22%); split: -0.25%, +0.03%
VClause: 91784 -> 91769 (-0.02%); split: -0.05%, +0.03%
Copies: 277177 -> 275263 (-0.69%); split: -0.70%, +0.01%
Branches: 100098 -> 100092 (-0.01%); split: -0.02%, +0.01%
PreVGPRs: 9021 -> 8843 (-1.97%)
VALU: 2001794 -> 1999893 (-0.09%); split: -0.10%, +0.00%
SALU: 419504 -> 419559 (+0.01%); split: -0.01%, +0.02%
VOPD: 77 -> 64 (-16.88%)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34359>
 2025-05-28 09:24:17 +00:00