Commit graph

219525 commits

Author SHA1 Message Date
Connor Abbott
4b87df29b3 tu: Implement subsampled images
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39868>
2026-03-06 21:26:46 +00:00
Connor Abbott
cc710283a7 tu: Multiply bin size by GMEM extent
When emitting the bin size, take into account per-view bin merging we
may have done that expands the size of the bin in GMEM by reusing the
right eye data for the left eye.

This fixes resolves getting clipped by the smaller bin size when using
the resolve engine. Before now we weren't using the resolve engine with
FDM, and for now we only do the merging when GMEM is enabled, so it
wasn't an issue.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39868>
2026-03-06 21:26:44 +00:00
Connor Abbott
a0a6ee3f4c tu: Refactor immutable sampler handling with descriptor update templates
With subsampled images we need access to the immutable samplers, even
though it's already been written when creating the descriptor set.
Previously we only kept a pointer to them in the template in the push
descriptor case where we needed to write them together with the image.
Refactor the descriptor template path to be more like the normal path
and always save the immutable samplers.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39868>
2026-03-06 21:26:42 +00:00
Connor Abbott
ba3e564327 tu: Track which views an attachment is used as a resolve attachment
As of now we always emit resolves during the subpass when they happen,
so we can just use that subpass's viewMask. But that won't work for
subsampled images, where we need to insert metadata and aprons for any
view resolved to after the renderpass is finished. Collect all the
resolve views for use with subsampled images.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39868>
2026-03-06 21:26:42 +00:00
Connor Abbott
d0be4ab2ab tu: Fix setting will_be_resolved with MSRTSS
We were setting it on the user's attachments, which become
resolve/unresolve attachments, but it should be set on the color
and depth/stencil attachments.

Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39868>
2026-03-06 21:26:42 +00:00
Connor Abbott
1d167ffe77 tu: Set polygon mode when blitting
Noticed by inspection.

Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39868>
2026-03-06 21:26:41 +00:00
Connor Abbott
c7497ceed3 vulkan: Store a few more fields in vk_sampler
These will be used for subsampled images, which use immutable samplers.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39868>
2026-03-06 21:26:41 +00:00
Connor Abbott
36ad76d593 tu: Move immutable sampler handling above descriptor size calc
For subsampled images the descriptor size will depend on the contents of
the immutable sampler. This is just code motion in preparation for that.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39868>
2026-03-06 21:26:41 +00:00
Connor Abbott
4577bb3654 tu: Pass through tile_config to FDM patchpoints
There will be additional data for subsampled attachments that we need to
pass through. Pass in the entire struct instead of just the fragment
areas.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39868>
2026-03-06 21:26:41 +00:00
Connor Abbott
77f0551f60 tu: Always call tu_emit_renderpass_begin()
This doesn't actually emit any commands, it just dirties state to be
emitted later. In a resuming render pass, we can't rely on an earlier
suspending pass to actually have a draw call and emit the dirty state,
so we have to dirty these anyway. And it also sets fdm_enabled, which we
forgot to do with resuming render passes. Rename it to
tu_renderpass_begin() since it doesn't actually emit anything, and call
it for resuming render passes.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39868>
2026-03-06 21:26:40 +00:00
Connor Abbott
2ddb70444e tu: Move FDM tile configuration to a new file
This is a well-isolated part of tu_cmd_buffer.cc. Split it out before
expanding it even further for subsampled images.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39868>
2026-03-06 21:26:40 +00:00
Connor Abbott
5a8ee1a067 tu: Refactor FDM sampling and bin merging
With subsampled images, we will have to do a global pass over all of the
tiles in the framebuffer in order to determine the coordinates of the
subsampled image, we have to know the bin merging state, and we have to
remember what we chose so that we can emit the table of bin positions.
Create an array of tile configs for all tiles, and move all FDM-related
calculation to tu_calc_tile_config().

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39868>
2026-03-06 21:26:39 +00:00
Connor Abbott
3d9207a366 tu: Store tile the tile was merged with
We will need this. Use this instead of merged_tiles, so that we can
split merging and rendering.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39868>
2026-03-06 21:26:39 +00:00
Sagar Ghuge
9a37209fb4 intel/blorp: drop unused BLORP_BATCH_COMPUTE_ENGINE flag
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Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39317>
2026-03-06 20:42:05 +00:00
Emma Anholt
2ec8ecd7de nir: Do NIR_DEBUG=print under a lock.
With most Vulkan engines doing multithreaded compiles, NIR_DEBUG=print has
been a frustrating racy mess.  Take a lock when we're doing per-pass
printing, so that the output is coherent.  This unfortunately
single-threads the compiler process itself in that case, but when you're
NIR_DEBUG=printing, that's probably not a big deal.

An assert is introduced to make sure that nobody nests NIR_PASS() in a way
that would break printing.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40126>
2026-03-06 19:50:38 +00:00
Jordan Justen
f78d818104 intel/dev: Add NVL-P PCI IDs (with FORCE_PROBE required)
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These PCI IDs were added to the drm xe driver in the
be07d8f707e41cb694c4a56364978c30683a687d patch of the
drm-xe-next-2026-03-02 tag. (With require_force_probe set in the xe
driver.)

Ref: be07d8f707e4 ("drm/xe/nvlp: Add NVL-P platform definition")
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40231>
2026-03-06 19:01:06 +00:00
Jordan Justen
872c61d5e2 intel/dev: Add NVL-P device info
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40231>
2026-03-06 19:01:06 +00:00
Jordan Justen
87e35e3192 intel/dev: Handle Xe3P in intel_device_info_init_common() (for build tests)
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40231>
2026-03-06 19:01:06 +00:00
José Roberto de Souza
a3950566d4 intel/dev/xe3p: Add min URB entries for task and mesh shaders
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40231>
2026-03-06 19:01:06 +00:00
José Roberto de Souza
d206b176c4 intel/dev: Add URB min/max entries for Mesh and Task
Rework:
 * Jordan: Update intel_dev_info.c::print_base_devinfo() to add new
   stage_names

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40231>
2026-03-06 19:01:06 +00:00
Jordan Justen
006af07549 intel/tools/intel_dev_info: Verify stage_names size in print_base_devinfo()
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40231>
2026-03-06 19:01:06 +00:00
Jordan Justen
45eeca3847 intel/dev: Add XE3P devinfo macros
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40231>
2026-03-06 19:01:05 +00:00
Jordan Justen
b645c569fd intel/dev: Split out Xe3 threads and URBs macros
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40231>
2026-03-06 19:01:05 +00:00
Jordan Justen
bdb3d41a29 intel/dev: Add INTEL_PLATFORM_NVL_P platform enum
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40231>
2026-03-06 19:01:05 +00:00
Yiwei Zhang
ec24d1afb6 pan: fix to not clear out of bitset range
Fixes: 617f0562bb ("pan: Use bitset instead of bool array in bi_find_loop_blocks")
Reviewed-by: Christoph Pillmayer <christoph.pillmayer@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40256>
2026-03-06 17:10:27 +00:00
Yiwei Zhang
d6ce73c5e4 util: convert tabs to spaces for ralloc.c
Reviewed-by: Christoph Pillmayer <christoph.pillmayer@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40256>
2026-03-06 17:10:26 +00:00
Eric Engestrom
091bd0a39c anv/ci: document more flakes
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Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40263>
2026-03-06 16:39:17 +00:00
Eric Engestrom
1975c7c690 etnaviv/ci: fix expectation
Fixes: 3c0aa7c633 ("etnaviv/ci: update expectations")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40263>
2026-03-06 16:39:17 +00:00
Icenowy Zheng
541558e6e9 gallium/frontends/dri: only reserve a few bind flags for MSAA cbufs
MSAA cbufs are not expected to be shared, although the Zink-private
ZINK_BIND_DMABUF will leak from the main color buffer resource, and
enforce linear buffer on MSAA buffers (which is usually nonsense).

Change the list for bind flags to preserve for MSAS cbufs to be a
allowlist instead of a denylist to prevent dangling private flags.

Fixes MSAA color buffer allocation failure on Zink w/o Kopper.

Suggested-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Signed-off-by: Icenowy Zheng <zhengxingda@iscas.ac.cn>
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40155>
2026-03-06 15:49:40 +00:00
Valentine Burley
444c4910dd Revert "ci: Disable Collabora's farm due to network issues"
Service provider confirmed that the issue has been resolved.

This reverts commit 4b39565aa9.

Signed-off-by: Valentine Burley <valentine.burley@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40261>
2026-03-06 14:59:02 +00:00
Eric Engestrom
2c4a39152a docs: update link to ubuntu's debug symbols documentation
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Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40259>
2026-03-06 14:44:02 +00:00
Eric Engestrom
a8c0c5f9f2 docs/linkcheck: ignore one more website that doesn't allow linkcheck
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40259>
2026-03-06 14:44:02 +00:00
Christian Gmeiner
266160fe4e panvk: Advertise VK_VALVE_mutable_descriptor_type
Trivial promotion alias of VK_EXT_mutable_descriptor_type which is
already supported on v9+.

Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Reviewed-by: Christoph Pillmayer <christoph.pillmayer@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40254>
2026-03-06 14:16:00 +00:00
Alyssa Rosenzweig
1c1c119d7b nir/lower_io: handle Intel URB intrinsics
useful to query these too, they're kinda like load_ssbo/store_ssbo.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40181>
2026-03-06 13:28:32 +00:00
Pavel Ondračka
156001edfa frontends/dri: fix NUM_PLANES for imported dma-buf images
When __DRI_IMAGE_ATTRIB_NUM_PLANES falls back to the resource-handle
path, it currently derives the count from the texture chain. That can
report 1 for multi-plane imported formats when planes share one BO/FD.

Prefer the imported fourcc mapping when available and return
util_format_get_num_planes(map->pipe_format). Keep the texture-chain
fallback for images without a fourcc mapping.

This makes eglExportDMABUFImageQueryMESA report the expected plane
count for formats such as NV12/P010/P012/P016/YUV420/YVU420.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40066>
2026-03-06 12:49:16 +00:00
Lionel Landwerlin
343c6ddddf anv: fix dEQP-VK.memory.address_binding_report*
Some checks are pending
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Memory backing objects can be freed before the object is destroyed. We
don't want to access the anv_bo pointer to read the address back :
  1. unsafe
  2. the address can change after reuse

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: d6eb6c58c7 ("anv: Enable support for VK_EXT_device_address_binding_report")
Acked-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40255>
2026-03-06 12:21:17 +00:00
Rhys Perry
1fd1997ac3 util: make UINT32_MAX a reserved key for _mesa_hash_table_create_u32_keys
Having deleted_key be a reserved key probably wasn't useful, because it's
not a constant: it's (uintptr_t)&deleted_key_value.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40196>
2026-03-06 11:30:30 +00:00
Rhys Perry
e5c44017d4 amd/common/virtio: use hash_table_u64
I don't know if the old code would have never used UINT32_MAX as a key,
which is going to become invalid for _mesa_hash_table_create_u32_keys.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40196>
2026-03-06 11:30:30 +00:00
Rhys Perry
7bb1940ba7 zink: use hash_table_u64 instead of _mesa_hash_table_create_u32_keys
I think the old code could have used UINT32_MAX as a key, which is going
to become invalid for _mesa_hash_table_create_u32_keys.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40196>
2026-03-06 11:30:30 +00:00
Valentine Burley
4b39565aa9 ci: Disable Collabora's farm due to network issues
Signed-off-by: Valentine Burley <valentine.burley@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40258>
2026-03-06 11:14:55 +00:00
Daivik Bhatia
2fd03ec780 v3dv: parse V3DV_ENABLE_PIPELINE_CACHE with parse_debug_string
Replace manual string parsing for V3DV_ENABLE_PIPELINE_CACHE
in instance creation with parse_debug_string and a dedicated
debug_control table.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40202>
2026-03-06 10:41:00 +00:00
Renato Pereyra
63a5d3b6c4 intel: Include available counter descriptions in the perfetto counter spec
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Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40233>
2026-03-06 08:47:16 +00:00
Renato Pereyra
d9929a03e8 intel: Add pid and tid to Vulkan QueueSubmit events
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40233>
2026-03-06 08:47:16 +00:00
Renato Pereyra
c0c49e2b54 pps: Skip emitting repeated zero counter values
Required by Android CTS. And good for reduced trace size/overhead.

Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40233>
2026-03-06 08:47:16 +00:00
Renato Pereyra
871395444a pps: Remove timestamps from counter descriptions
Android CTS expects these packets without timestamps. They should not be
necessary.

Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40233>
2026-03-06 08:47:16 +00:00
Renato Pereyra
a1e89cc1f1 pps: On data source register, report all counters as enabled by default
Note: when the data source is first registered, no counters are enabled
yet so `driver->enabled_counters` actually cannot be used.

Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40233>
2026-03-06 08:47:16 +00:00
Lionel Landwerlin
9f2215b480 anv/brw: remove push constant load emulation from the backend compiler
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Anv is responsible for much of how the data is accessed (where is the
push constant base pointer located, etc...), so move the memory load
there.

Fossildb on LNL :
Totals from 135931 (8.65% of 1572134) affected shaders:
Instrs: 68518228 -> 67142101 (-2.01%); split: -2.05%, +0.05%
CodeSize: 1123507040 -> 1092022560 (-2.80%); split: -2.88%, +0.08%
Subgroup size: 32 -> 16 (-50.00%)
Send messages: 4401584 -> 4402565 (+0.02%); split: -0.02%, +0.04%
Cycle count: 4626573038 -> 4619434858 (-0.15%); split: -0.89%, +0.74%
Spill count: 451759 -> 452407 (+0.14%); split: -0.43%, +0.57%
Fill count: 374513 -> 377440 (+0.78%); split: -0.76%, +1.54%
Max live registers: 15788042 -> 15791399 (+0.02%); split: -0.05%, +0.08%
Max dispatch width: 3349408 -> 3346192 (-0.10%); split: +0.09%, -0.19%
Non SSA regs after NIR: 9477038 -> 9498328 (+0.22%); split: -0.27%, +0.50%

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40174>
2026-03-06 06:34:43 +00:00
Lionel Landwerlin
38cc622d8b blorp: switch to new load_indirect_address_intel intrinsic
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40174>
2026-03-06 06:34:43 +00:00
Lionel Landwerlin
e14d6b535c brw/nir: add new intrinsics to load data from the indirect address
This address is delivered on Gfx12.5+ in compute/mesh/task shaders
from the command stream instruction.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40174>
2026-03-06 06:34:43 +00:00
Lionel Landwerlin
7b1533414a brw/nir: enable constant offsets for global_constant_uniform_block_intel
Will be useful to retain the base offset added in 0e9453291c ("brw:
improve push constant loading using base offsets") once we move push
constant data loading into NIR.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40174>
2026-03-06 06:34:43 +00:00