Commit graph

14012 commits

Author SHA1 Message Date
Samuel Pitoiset
482dbacdeb radv/nir: lower esgs_vertex_stride for GS compiled separately on GFX9+
The ESGS vertex stride would be emitted at draw time using the number
of VS/TES outputs.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27388>
2024-02-08 13:33:34 +00:00
Samuel Pitoiset
d777cbf66c radv: add a new user SGPR for the ESGS ring item size
With shader object, when VS+GS or TES+GS are compiled separately and
the VS has written (but unused) outputs, the ESGS vertex stride
must be passed through an user SGPR. This is because when the GS is
compiled we can't know the number of ES outputs.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27388>
2024-02-08 13:33:34 +00:00
Rhys Perry
5f0226d82f aco/tests: use raw strings in form_hard_clauses.nsa
Like cad2c0915d.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27485>
2024-02-08 12:15:23 +00:00
Rhys Perry
d59d00ebf8 aco/tests: add tests for VOPD operand swapping
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27485>
2024-02-08 12:15:23 +00:00
Rhys Perry
24c02dbfa6 aco: improve printing of VOPD instructions
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27485>
2024-02-08 12:15:23 +00:00
Rhys Perry
ea92aea9f2 aco: turn v_mov_b32 into addition to create VOPD instructions
fossil-db (navi31, wave32):
Totals from 15655 (19.76% of 79242) affected shaders:
Instrs: 10699119 -> 10688239 (-0.10%); split: -0.11%, +0.00%
CodeSize: 61290308 -> 61288596 (-0.00%); split: -0.01%, +0.00%
Latency: 89159743 -> 89150355 (-0.01%); split: -0.01%, +0.00%
InvThroughput: 16966295 -> 16955427 (-0.06%); split: -0.07%, +0.00%
VALU: 5484626 -> 5473993 (-0.19%); split: -0.20%, +0.00%
VOPD: 1446725 -> 1457358 (+0.73%); split: +0.74%, -0.01%

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27485>
2024-02-08 12:15:23 +00:00
Rhys Perry
65dfb27f8f aco: swap operands to create VOPD instructions
fossil-db (navi31, wave32):
Totals from 61565 (77.69% of 79242) affected shaders:
Instrs: 34874995 -> 34439344 (-1.25%); split: -1.27%, +0.02%
CodeSize: 200611536 -> 200564028 (-0.02%); split: -0.12%, +0.10%
Latency: 242520024 -> 242120510 (-0.16%); split: -0.28%, +0.11%
InvThroughput: 50236383 -> 49588742 (-1.29%); split: -1.31%, +0.02%
VClause: 713308 -> 712902 (-0.06%); split: -0.07%, +0.01%
SClause: 1184865 -> 1184620 (-0.02%); split: -0.03%, +0.01%
VALU: 18235068 -> 17803847 (-2.36%); split: -2.37%, +0.00%
VOPD: 3930904 -> 4362125 (+10.97%); split: +10.99%, -0.02%

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27485>
2024-02-08 12:15:23 +00:00
Rhys Perry
96d8b7c59c aco: refactor create_vopd_instruction
Prepare for operand swapping.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27485>
2024-02-08 12:15:23 +00:00
Marek Olšák
72948d9ff9 radeonsi,aco: remove the VS prolog
The upside is that this removes 600 lines of code. The downside is
that if instance divisors are used, we will compile the VS on demand.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27120>
2024-02-07 09:50:53 +00:00
Eric Engestrom
faad4ffe97 radv: enable VK_EXT_headless_surface on all platforms except Windows
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27448>
2024-02-06 20:32:38 +00:00
Samuel Pitoiset
ffbd3e5b2d radv: change the user SGPR idx of AC_UD_TES_STATE
When GS will be compiled separately, we will have to always declare
both VS and TES user SGPRs because we can't know the previous stage,
and the shader input arguments must match and mustn't overlap.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27431>
2024-02-06 20:12:38 +00:00
Samuel Pitoiset
3e9815173a radv: set the default workgroup size for VS/TES as ES
If shaders are linked, the optimal value would be computed.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27431>
2024-02-06 20:12:38 +00:00
Samuel Pitoiset
90e354afb0 radv: determine the workgroup size for GS non-NGG earlier
The wavesize for VS/TES/GS is always the same, so this can be computed
earlier.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27431>
2024-02-06 20:12:38 +00:00
Samuel Pitoiset
35c9631162 radv: determine the ES stage earlier when processing binary config
This will help implementing VS+GS and TES+GS compiled separately on
GFX9+ because the shader config will need to be combined.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27431>
2024-02-06 20:12:38 +00:00
Samuel Pitoiset
03314b2a86 radv: check for MESA_SHADER_TESS_EVAL in radv_fill_shader_info_ngg()
This seems clearer to me.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27470>
2024-02-06 19:53:24 +00:00
Samuel Pitoiset
34572d535e radv: use next_stage to determine the NGG stage
This shouldn't change anything, except that it will help for ESO.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27470>
2024-02-06 19:53:24 +00:00
Samuel Pitoiset
31f006d352 radv: always set GS as NGG if present on GFX11
GFX11 is full NGG.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27470>
2024-02-06 19:53:24 +00:00
Samuel Pitoiset
55093270ed radv: squash GFX10/GFX10.3 NGG restrictions in the same condition
They don't apply on GFX11.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27470>
2024-02-06 19:53:24 +00:00
Samuel Pitoiset
237ab5db86 radv: remove one indentation level in radv_fill_shader_info_ngg()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27470>
2024-02-06 19:53:24 +00:00
Rhys Perry
4f6aac1589 aco/tests: fix to_hw_instr.swap_linear_vgpr
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27436>
2024-02-06 15:40:58 +00:00
Rhys Perry
174e37afb9 aco: fix >8 byte linear vgpr copies
No fossil-db changes.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27436>
2024-02-06 15:40:58 +00:00
Hsieh, Mike
33d88f797b amd/vpelib: Add UID for 3d Lut and control logic
[WHY]
3D lut generation takes time, we need to cache it and identify it as it
updated.

[HOW]
Add unique id when new 3d lut is generated.
Add control logic with UID.

Reviewed-by: Jesse Agate <jesse.agate@amd.com>
Acked-by: Alan Liu <haoping.liu@amd.com>
Signed-off-by: Mike Hsieh <Mike.Hsieh@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27239>
2024-02-06 14:55:02 +00:00
Agate, Jesse
039b1e0a1e amd/vpelib: Refactor norm factor logic
Moved norm factor logic out of moveable CM.

Reviewed-by: Roy Chan <Roy.Chan@amd.com>
Acked-by: Alan Liu <haoping.liu@amd.com>
Signed-off-by: Jesse Agate <Jesse.Agate@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27239>
2024-02-06 14:55:02 +00:00
Shih, Jude
e0863dbb74 amd/vpelib: Solve link error due to missing static for one function
is_target_rect_equal_to_dest_rect is used in color_bg.c only. Therefore,
it needs keyword as static in front of it. This issue is reported from
diag team.

Reviewed-by: Bichao Wang <bichao.wang@amd.com>
Reviewed-by: Tomson Chang <tomson.chang@amd.com>
Acked-by: Alan Liu <haoping.liu@amd.com>
Signed-off-by: Jude Shih <shenshih@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27239>
2024-02-06 14:55:02 +00:00
Agate, Jesse
2d02c75324 amd/vpelib: Add PQ Norm to VPE interface
Rename the variable and add PQ Norm to VPE interaface.

Reviewed-by: Roy Chan <Roy.Chan@amd.com>
Acked-by: Alan Liu <haoping.liu@amd.com>
Signed-off-by: Jesse Agate <Jesse.Agate@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27239>
2024-02-06 14:55:02 +00:00
Agate, Jesse
1dd28d6766 amd/vpelib: VPE integration for HLG
Added external and internal enums for HLG and some related house keeping.

Reviewed-by: Roy Chan <Roy.Chan@amd.com>
Acked-by: Alan Liu <haoping.liu@amd.com>
Signed-off-by: Jesse Agate <Jesse.Agate@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27239>
2024-02-06 14:55:02 +00:00
Hsieh, Mike
5fd59c83ef amd/vpelib: geometric scaling fix
[WHY & HOW]
Color adjustment needs to be controled by user.
Remove blending check if target rect equeal to dest rect for 1st stream.

Reviewed-by: Tomson Chang <tomson.chang@amd.com>
Acked-by: Alan Liu <haoping.liu@amd.com>
Signed-off-by: Mike Hsieh <Mike.Hsieh@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27239>
2024-02-06 14:55:02 +00:00
Hsieh, Mike
c8b2e28b66 amd/vpelib: skip gamma remap and cs conversion when geometric scaling
[WHY]
When geomtric scaling is enabled, many color features will be skipped.

[HOW]
Skip gamma remap, gamut conversion, blending, tone mapping and color adjustment.

Reviewed-by: Roy Chan <Roy.Chan@amd.com>
Acked-by: Alan Liu <haoping.liu@amd.com>
Signed-off-by: Mike Hsieh <Mike.Hsieh@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27239>
2024-02-06 14:55:02 +00:00
Mike Hsieh
cb6d928327 amd/vpelib: Add param check for geometric scaling and refactor
[WHY]
Param check for geometric scaling is required.
3dlut for geometric scaling case is too complicate.

[HOW]
Add Param check for geometric scaling.
Refactor 3dlut for geometric scaling case.

Reviewed-by: Roy Chan <Roy.Chan@amd.com>
Acked-by: Alan Liu <haoping.liu@amd.com>
Signed-off-by: Mike Hsieh <Mike.Hsieh@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27239>
2024-02-06 14:55:02 +00:00
Hsieh, Mike
4893afd427 amd/vpelib: add new tf enum and add flag for geometric scaling
[WHY] 1. Need tf enum for SRGB and BT709
      2. Add required flag and logic for geometric scaling

[HOW] Add new enum, skip tone mapping when geometric scaling is enabled

Reviewed-by: Jesse Agate <jesse.agate@amd.com>
Acked-by: Alan Liu <haoping.liu@amd.com>
Signed-off-by: Mike Hsieh <Mike.Hsieh@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27239>
2024-02-06 14:55:02 +00:00
Samuel Pitoiset
d15a43c9a9 radv: limit maxIndirectCommandsTokenCount to 512
512 is already large enough but UIN32_MAX is definitely too large.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27466>
2024-02-06 11:23:29 +00:00
Friedrich Vock
d4c094dfb4 radv/rt: Optimize update shader VGPR usage
Brings VGPR allocation down from 72 (absolutely insane) to 32.

We can now reach the theoretical maximum occupancy of 16 waves per SIMD.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27472>
2024-02-05 21:14:45 +01:00
Georg Lehmann
2ad3b83d23 radv: report rotate subgroup feature bits
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27444>
2024-02-05 11:20:28 +00:00
Rhys Perry
48461c0d9e aco: enable VOPD scheduler
fossil-db (navi31, wave32):
Totals from 75237 (94.95% of 79242) affected shaders:
Instrs: 40383337 -> 36522907 (-9.56%); split: -9.56%, +0.00%
CodeSize: 209282312 -> 209883000 (+0.29%); split: -0.18%, +0.46%
Latency: 256898944 -> 257834204 (+0.36%); split: -0.23%, +0.60%
InvThroughput: 59105835 -> 52725948 (-10.79%); split: -10.90%, +0.11%
VClause: 759487 -> 758151 (-0.18%); split: -0.18%, +0.01%
SClause: 1264895 -> 1263230 (-0.13%); split: -0.14%, +0.01%
VALU: 22886416 -> 18837085 (-17.69%)
VOPD: 0 -> 4049331 (+inf%)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23367>
2024-02-05 10:51:15 +00:00
Rhys Perry
75a76ec3fd aco: implement VOPD scheduler
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23367>
2024-02-05 10:51:15 +00:00
Rhys Perry
1fb79b4aa2 aco: refactor schedule_ilp main loop
Besides switching to "ctx.active_mask" as the condition, this is basically
the same.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23367>
2024-02-05 10:51:14 +00:00
Rhys Perry
c66d42b9ed aco: add VOPD statistic
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23367>
2024-02-05 10:51:14 +00:00
Rhys Perry
6547e17e60 aco: add VOPD format
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23367>
2024-02-05 10:51:14 +00:00
Dave Airlie
47c725b53e radv: don't submit 0 length on UVD either.
The kernel checks for UVD msgs and if there aren't any gets upset,
so don't submit 0 length on UVD rings either to avoid that.

Cc: mesa-stable
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27186>
2024-02-05 08:14:26 +00:00
Dave Airlie
df9bc11589 radv/uvd: uvd kernel checks for full dpb allocation.
The CTS image allocation sometimes doesn't try to allocate a complete
DPB, but the amdgpu kernel module checks for this, so always make
the DPB max sized on uvd instances.

Fixes part of video decode on Fiji/Polaris

Cc: mesa-stable
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27186>
2024-02-05 08:14:26 +00:00
Dave Airlie
bba36df84d radv: init decoder ip block earlier.
This makes the queue decisions later correct.

Cc: mesa-stable
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27186>
2024-02-05 08:14:26 +00:00
Dave Airlie
6065671a7f radv: fix correct padding on uvd
Fixes: 8a29291dbe ("radv/video: add h264 support for uvd")

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27186>
2024-02-05 08:14:26 +00:00
Samuel Pitoiset
c6286e39ec radv/sqtt: fix describing queue submits for RGP
The submit_sub_index field is used by RGP to determine the number of
submits. Previously, it was incorrectly reporting the same number of
submits than command buffers.

Fixes: 88cbe32048 ("radv: add support for RGP queue events")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27439>
2024-02-05 07:32:48 +00:00
Konstantin Seurer
b10ee44308 radv/rra: Implement ahit/isec counters
Reviewed-by: Friedrich Vock <friedrich.vock@gmx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25548>
2024-02-03 12:59:47 +01:00
Konstantin Seurer
767f628079 radv/rra: Dump basic ray history tokens
This only dumps the begin tokens. Tokens are written to a buffer
containing a 12 byte header at the beginning.

We use an intermediate format for the ray history tokens because the RRA
format is very inefficient.

Reviewed-by: Friedrich Vock <friedrich.vock@gmx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25548>
2024-02-03 12:59:47 +01:00
Konstantin Seurer
26939f016d radv/rra: Refactor error handling
Reviewed-by: Friedrich Vock <friedrich.vock@gmx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25548>
2024-02-03 11:29:58 +01:00
Konstantin Seurer
46dddb57f9 radv/rra: Remove useless variable
Reviewed-by: Friedrich Vock <friedrich.vock@gmx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25548>
2024-02-03 11:29:58 +01:00
Konstantin Seurer
dc813288c3 radv/rra: Use memcpy for chunk descriptions
The identifier is not null terminated. "HistoryTokensRaw" does not fit
otherwise.

Reviewed-by: Friedrich Vock <friedrich.vock@gmx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25548>
2024-02-03 11:29:58 +01:00
Konstantin Seurer
71c363acc3 radv/rra: Rename rra_chunk_type to rra_chunk_version
Found by inspecting RRA source.

Reviewed-by: Friedrich Vock <friedrich.vock@gmx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25548>
2024-02-03 11:29:58 +01:00
Daniel Schürmann
4fa27845e5 aco/insert_exec_mask: Reduce latency when switching to WQM.
Change pattern:
s_mov_b64 s[0:1], exec         s_mov_b64 s[0:1], exec
s_wqm_b64 exec, s[0:1]   ->    s_wqm_b64 exec, exec

Totals from 16667 (21.03% of 79242) affected shaders: (GFX11)

Instrs: 11317502 -> 11307484 (-0.09%); split: -0.09%, +0.00%
CodeSize: 60194272 -> 60155088 (-0.07%); split: -0.07%, +0.00%
Latency: 94345873 -> 94338374 (-0.01%); split: -0.01%, +0.00%
InvThroughput: 13568872 -> 13568683 (-0.00%); split: -0.00%, +0.00%
Copies: 808334 -> 808332 (-0.00%)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27112>
2024-02-02 18:55:15 +00:00