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radv/uvd: uvd kernel checks for full dpb allocation.

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The CTS image allocation sometimes doesn't try to allocate a complete
DPB, but the amdgpu kernel module checks for this, so always make
the DPB max sized on uvd instances.

Fixes part of video decode on Fiji/Polaris

Cc: mesa-stable
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27186>
This commit is contained in:
Dave Airlie 2024-01-22 12:15:54 +10:00 • committed by Marge Bot
parent bba36df84d
commit df9bc11589
1 changed files with 5 additions and 0 deletions
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5
src/amd/vulkan/radv_image.c
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@ -1075,6 +1075,11 @@ radv_image_create_layout(struct radv_device *device, struct radv_image_create_in
radv_video_get_profile_alignments(device->physical_device, profile_list, &width_align, &height_align);
image_info.width = align(image_info.width, width_align);
image_info.height = align(image_info.height, height_align);
if (radv_has_uvd(device->physical_device) && image->vk.usage & VK_IMAGE_USAGE_VIDEO_DECODE_DPB_BIT_KHR) {
/* UVD and kernel demand a full DPB allocation. */
image_info.array_size = MIN2(16, image_info.array_size);
}
}
unsigned plane_count = radv_get_internal_plane_count(device->physical_device, image->vk.format);