I'm not sure why zink would want dri2 here instead of kopper,
I'm sure it's some side effect of something else, let zink
use the kopper paths.
This fixes:
dEQP-GL45-ES3.info.vendor
on zink on nvk with GL cts using EGL.
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Fixes: 12a47b84b7 ("egl/dri2: trigger drawable invalidation from surface queries for zink")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28707>
We can use any swizzle to access it, so if the inline constant is in
ADD,try to have the swizzle same as the second channel so that we can
potentially use presubtract later.
RV530:
total instructions in shared programs: 129366 -> 129306 (-0.05%)
instructions in affected programs: 10191 -> 10131 (-0.59%)
helped: 56
HURT: 12
total presub in shared programs: 8421 -> 8791 (4.39%)
presub in affected programs: 1523 -> 1893 (24.29%)
helped: 0
HURT: 102
total temps in shared programs: 17561 -> 17562 (<.01%)
temps in affected programs: 47 -> 48 (2.13%)
helped: 2
HURT: 4
total lits in shared programs: 3021 -> 3179 (5.23%)
lits in affected programs: 427 -> 585 (37.00%)
helped: 0
HURT: 37
total cycles in shared programs: 197845 -> 197512 (-0.17%)
cycles in affected programs: 18949 -> 18616 (-1.76%)
helped: 50
HURT: 19
Signed-off-by: Pavel Ondračka <pavel.ondracka@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28428>
We want to move it after rc_remove_constants because we can't reswizzle
presubtract sources and we need to pack multiple uniforms into vec4
slots to be able to run glamor shaders on R400.
This mostly works OK, the detection logic just needs to recognize the
case when 2.0 was converted to inline constant.
RV530:
total instructions in shared programs: 129384 -> 129366 (-0.01%)
instructions in affected programs: 2078 -> 2060 (-0.87%)
helped: 16
HURT: 7
total presub in shared programs: 8404 -> 8421 (0.20%)
presub in affected programs: 423 -> 440 (4.02%)
helped: 19
HURT: 25
total omod in shared programs: 410 -> 429 (4.63%)
omod in affected programs: 10 -> 29 (190.00%)
helped: 0
HURT: 13
total temps in shared programs: 17560 -> 17561 (<.01%)
temps in affected programs: 34 -> 35 (2.94%)
helped: 3
HURT: 3
total lits in shared programs: 3006 -> 3021 (0.50%)
lits in affected programs: 267 -> 282 (5.62%)
helped: 13
HURT: 20
total cycles in shared programs: 197840 -> 197845 (<.01%)
cycles in affected programs: 4159 -> 4164 (0.12%)
helped: 13
HURT: 13
R420:
total instructions in shared programs: 103810 -> 103762 (-0.05%)
instructions in affected programs: 4176 -> 4128 (-1.15%)
helped: 29
HURT: 1
total presub in shared programs: 2724 -> 2878 (5.65%)
presub in affected programs: 478 -> 632 (32.22%)
helped: 6
HURT: 40
total omod in shared programs: 411 -> 421 (2.43%)
omod in affected programs: 3 -> 13 (333.33%)
helped: 0
HURT: 7
total temps in shared programs: 16841 -> 16852 (0.07%)
temps in affected programs: 814 -> 825 (1.35%)
helped: 5
HURT: 17
total cycles in shared programs: 162397 -> 162361 (-0.02%)
cycles in affected programs: 5746 -> 5710 (-0.63%)
helped: 30
HURT: 3
Signed-off-by: Pavel Ondračka <pavel.ondracka@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28428>
And don't use presubtract in the first place instead of relying on the
dataflow swizzle pass to sort things up later.
Just two shaders in shader-db hits this, but this patch prevents some
regressions in dEQP when we later move presubtract after the dataflow
swizzle pass.
RV420:
presub helped: shaders/chromeos/24.shader_test FS: 6 -> 2 (-66.67%)
presub helped: shaders/chromeos/21.shader_test FS: 6 -> 2 (-66.67%)
cycles helped: shaders/chromeos/24.shader_test FS: 79 -> 78 (-1.27%)
cycles helped: shaders/chromeos/21.shader_test FS: 47 -> 46 (-2.13%)
Signed-off-by: Pavel Ondračka <pavel.ondracka@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28428>
Two more piglit flakes appeared after yesterday's piglit uprev:
spec@egl_chromium_sync_control@conformance
spec@egl_chromium_sync_control@conformance@eglGetSyncValuesCHROMIUM_msc_and_sbc_test
Signed-off-by: Martin Krastev <martin.krastev@broadcom.com>
Reviewed-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28712>
This may happen when undefined value is written into gl_ClipDistance,
then it gets optimized out by nir_opt_undef.
Fixes GPU faults in Tropico 5 (D3D11) on at least A750.
Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28109>
The current helper anv_physical_device_bindless_heap_size()
artificially limited the surface heap size on DG2+ to 128MB. The HW is
actually 4GB capable, but we have workaround requiring to overlap the
dynamic state heap with the bindless surface state heap.
The actual limit comes from our virtual address space setup. It is
different between descriptor buffers and regular descriptors.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: fe037dec6e ("anv: expose VK_EXT_descriptor_buffer")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27873>
The Vulkan specification has been updated since I wrote this and it's
invalid now.
This marks some tests as expected failures because they are invalid
now and they will be removed.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28692>
Indeed, the pointer processed by r300_upload_index_buffer() was not the right one.
This is the reason why "deqp-gles2 --deqp-case=dEQP-GLES2.functional.draw.draw_elements.indices.user_ptr.index_byte"
was failing (the logs are below). This change corrects this issue and makes the related deqp tests work properly.
This change considers that r300_upload_index_buffer() sets indexBuffer to NULL. The indexBuffer resource
should be properly freed once the buffer is processed. This is required to avoid another refcnt imbalance
(another kind of memory leak).
==9962==ERROR: AddressSanitizer: heap-buffer-overflow on address 0x60200000721f at pc 0x7fd57b54a9a0 bp 0x7fffd2c39290 sp 0x7fffd2c38a40
READ of size 30 at 0x60200000721f thread T0
#0 0x7fd57b54a99f in __interceptor_memcpy (/usr/lib64/libasan.so.6.0.0+0x3c99f)
#1 0x7fd570d10528 in u_upload_data ../src/gallium/auxiliary/util/u_upload_mgr.c:333
#2 0x7fd57114142b in r300_upload_index_buffer ../src/gallium/drivers/r300/r300_screen_buffer.c:44
#3 0x7fd57113943c in r300_draw_elements ../src/gallium/drivers/r300/r300_render.c:632
#4 0x7fd57113bbc4 in r300_draw_vbo ../src/gallium/drivers/r300/r300_render.c:840
#5 0x7fd570d212e2 in u_vbuf_draw_vbo ../src/gallium/auxiliary/util/u_vbuf.c:1487
#6 0x7fd56fceb873 in _mesa_validated_drawrangeelements ../src/mesa/main/draw.c:1709
#7 0x7fd56fcf28c5 in _mesa_DrawElementsBaseVertex ../src/mesa/main/draw.c:1852
Fixes: 330d0607ed ("gallium: remove pipe_index_buffer and set_index_buffer")
Signed-off-by: Patrick Lerda <patrick9876@free.fr>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28523>
We update the program copy of info at the end of linking. During linking
we should use the shader copy. This change is required to avoid updating
both in the following patch.
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28690>
Rather than passing this value around we can just store it directly
in its final location.
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28690>
Update padding size calculation to use cropping.
Original method could result in 0 padding, which
generated unnessary noise in the encoding result.
Cc: mesa-stable
Fixes: mesa/mesa#9196
Signed-off-by: nyanmisaka <nst799610810@gmail.com>
Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28369>
If index is specified we can use the DRAWINDEXED otherwise we can simply
use DRAW argument format.
v2: (Rohan & Lionel)
- Fix the aligned_stride check
Fixes: 6d4f43f0d6 ("anv: Emit EXECUTE_INDIRECT_DRAW when available")
Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28658>
If the driver stores all planes contiguously in memory, only one BO
needs to be exported from vaExportSurfaceHandle. This is required
for Chromium's VaapiVideoDecoder to work on radeonsi and r600.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26165>
This didn't consider that there might be different programs using the same
SIMD.
fossil-db (navi31):
Totals from 68129 (85.81% of 79395) affected shaders:
Instrs: 23230924 -> 23388315 (+0.68%)
CodeSize: 120636544 -> 121272888 (+0.53%)
Latency: 115645106 -> 115683965 (+0.03%)
InvThroughput: 18804076 -> 18806912 (+0.02%); split: -0.00%, +0.02%
Branches: 404644 -> 407945 (+0.82%)
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28633>
The following syntax can now be used to set the initial content of
buffers:
@buf size (reg) val0, val1, ...
If the buffer is not fully initialized, remaining values will be set to
zero.
Signed-off-by: Job Noorman <jnoorman@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28625>
The hardware do not support setting different polygon modes for front
and back faces at the same time. In this case, unless we are culling one
of the faces, we show a warning to the user.
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28675>
It produces race conditions and is probably not interesting when running
TSAN.
v2: use #if and define values instead of "#if defined" (Yonggang Luo)
v3: remove some leftover text
v4: drop ws changes (Yonggang Luo)
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28650>
When TSAN is enabled we use standard mutexes instead of futexes. With
futexes the fence->signalled is read using an atomic operation, to best
mimic this let's protect the read with a locked mutex.
This avoids TSAN reporting a race condition (false positive with
futexes) with Zink when accessing the pipeline cache.
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28650>
Thread sanitizer doesn't support futexes, so don't use them in this case
and fall back to standard mutexes. With that we can avoid tsan reporting
a large number of false positives.
v2: use #if instead of #ifdef to test the value of the define
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28650>
Check whether the compiler actually supports it and if
not than warn about it. Note that meson will also
suggest that one should use the build-in flag, but this
is just sloppy testing for -fsanitize, -fsanitize-blacklist
is actually not available as build-in option.
v2: define THREAD_SANITIZER to 1 or 0 (suggested by Yonggang Luo)
v3: Update comment about meson warning (Dylan Baker)
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28650>
ANGLE traces must be compiled together with binaries into binary format.
Introduce them for AMD Raven device, replaying on Vulkan (radv).
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Signed-off-by: Vignesh Raman <vignesh.raman@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24270>
