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anv: increase maxResourceDescriptorBufferRange on DG2+

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The current helper anv_physical_device_bindless_heap_size()
artificially limited the surface heap size on DG2+ to 128MB. The HW is
actually 4GB capable, but we have workaround requiring to overlap the
dynamic state heap with the bindless surface state heap.

The actual limit comes from our virtual address space setup. It is
different between descriptor buffers and regular descriptors.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: fe037dec6e ("anv: expose VK_EXT_descriptor_buffer")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27873>
This commit is contained in:
Lionel Landwerlin 2024-02-29 09:41:53 +02:00
parent c82b8a8153
commit 35831dded5
4 changed files with 17 additions and 8 deletions
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5
src/intel/vulkan/anv_device.c
View file

@ -1078,7 +1078,7 @@ get_properties_1_2(const struct anv_physical_device *pdevice,
* advertise a larger limit here.
*/
const unsigned max_bindless_views =
anv_physical_device_bindless_heap_size(pdevice) / ANV_SURFACE_STATE_SIZE;
anv_physical_device_bindless_heap_size(pdevice, false) / ANV_SURFACE_STATE_SIZE;
p->maxUpdateAfterBindDescriptorsInAllPools = max_bindless_views;
p->shaderUniformBufferArrayNonUniformIndexingNative = false;
p->shaderSampledImageArrayNonUniformIndexingNative = false;
@ -1567,7 +1567,8 @@ get_properties(const struct anv_physical_device *pdevice,
props->inputAttachmentDescriptorSize = ANV_SURFACE_STATE_SIZE;
props->accelerationStructureDescriptorSize = sizeof(struct anv_address_range_descriptor);
props->maxSamplerDescriptorBufferRange = pdevice->va.descriptor_buffer_pool.size;
props->maxResourceDescriptorBufferRange = anv_physical_device_bindless_heap_size(pdevice);
props->maxResourceDescriptorBufferRange = anv_physical_device_bindless_heap_size(pdevice,
true);
props->resourceDescriptorBufferAddressSpaceSize = pdevice->va.descriptor_buffer_pool.size;
props->descriptorBufferAddressSpaceSize = pdevice->va.descriptor_buffer_pool.size;
props->samplerDescriptorBufferAddressSpaceSize = pdevice->va.descriptor_buffer_pool.size;

11
src/intel/vulkan/anv_private.h
View file

@ -1224,10 +1224,17 @@ struct anv_physical_device {
};
static inline uint32_t
anv_physical_device_bindless_heap_size(const struct anv_physical_device *device)
anv_physical_device_bindless_heap_size(const struct anv_physical_device *device,
bool descriptor_buffer)
{
/* Pre-Gfx12.5, the HW bindless surface heap is only 64MB. After it's 4GB,
* but we have some workarounds that require 2 heaps to overlap, so the
* size is dictated by our VA allocation.
*/
return device->uses_ex_bso ?
128 * 1024 * 1024 /* 128 MiB */ :
(descriptor_buffer ?
device->va.descriptor_buffer_pool.size :
device->va.bindless_surface_state_pool.size) :
64 * 1024 * 1024 /* 64 MiB */;
}

6
src/intel/vulkan/genX_cmd_buffer.c
View file

@ -217,7 +217,7 @@ genX(cmd_buffer_emit_state_base_address)(struct anv_cmd_buffer *cmd_buffer)
MIN2(device->physical->va.descriptor_buffer_pool.size -
(cmd_buffer->state.descriptor_buffers.surfaces_address -
device->physical->va.descriptor_buffer_pool.addr),
anv_physical_device_bindless_heap_size(device->physical)) :
anv_physical_device_bindless_heap_size(device->physical, true)) :
(device->workaround_bo->size - device->workaround_address.offset);
sba.BindlessSurfaceStateBaseAddress = (struct anv_address) {
.offset = surfaces_addr,
@ -265,7 +265,7 @@ genX(cmd_buffer_emit_state_base_address)(struct anv_cmd_buffer *cmd_buffer)
device->physical->va.bindless_surface_state_pool.addr,
};
sba.BindlessSurfaceStateSize =
anv_physical_device_bindless_heap_size(device->physical) /
anv_physical_device_bindless_heap_size(device->physical, false) /
ANV_SURFACE_STATE_SIZE - 1;
sba.BindlessSurfaceStateMOCS = mocs;
sba.BindlessSurfaceStateBaseAddressModifyEnable = true;
@ -2647,7 +2647,7 @@ update_descriptor_set_surface_state(struct anv_cmd_buffer *cmd_buffer,
pipe_state->descriptor_buffers[set_idx].buffer_offset;
const uint64_t set_size =
MIN2(va_range->size - (descriptor_set_addr - va_range->addr),
anv_physical_device_bindless_heap_size(device));
anv_physical_device_bindless_heap_size(device, true));
if (descriptor_set_addr != pipe_state->descriptor_buffers[set_idx].address) {
pipe_state->descriptor_buffers[set_idx].address = descriptor_set_addr;

3
src/intel/vulkan/genX_init_state.c
View file

@ -287,7 +287,8 @@ init_common_queue_state(struct anv_queue *queue, struct anv_batch *batch)
device->physical->va.bindless_surface_state_pool.addr,
};
sba.BindlessSurfaceStateSize =
anv_physical_device_bindless_heap_size(device->physical) / ANV_SURFACE_STATE_SIZE - 1;
anv_physical_device_bindless_heap_size(device->physical, false) /
ANV_SURFACE_STATE_SIZE - 1;
sba.BindlessSurfaceStateMOCS = mocs;
sba.BindlessSurfaceStateBaseAddressModifyEnable = true;
} else {