Commit graph

106137 commits

Author SHA1 Message Date
Kenneth Graunke
41a4a6ba6f i965: Flip arguments to load_register_reg helpers.
load_register_imm and load_register_mem take the destination as the
first argument, so I'd like load_register_reg to do the same the sake
of consistency.  Otherwise, reading sequences of mixed LRI/LRM/LRR is
needlessly confusing.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2018-12-09 18:39:16 -08:00
Kenneth Graunke
34c9dc2537 i965: Delete dead brw_meta_resolve_color prototype.
Dead since commit 09e041d61d (May 2016).
2018-12-09 18:39:16 -08:00
Karol Herbst
77944fb2b7 nv50/ir: fix use-after-free in ConstantFolding::visit
opnd() might delete the passed in instruction, but it's used through
i->srcExists() later in visit

v2: use continue instead return
v3: use brackets for the outer if/else chain

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2018-12-09 18:19:59 +01:00
Karol Herbst
d63a133082 nouveau: use atomic operations for driver statistics
multiple threads can write to those at the same time

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2018-12-09 04:43:20 +01:00
Karol Herbst
a28ff22295 nv50/ir: initialize relDegree staticly
this race condition is pretty harmless, but also pretty trivial to fix

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2018-12-09 04:43:17 +01:00
Eric Anholt
cc6a5e937b shader-packing 2018-12-07 16:51:12 -08:00
Eric Anholt
09ad0d870c tfu 2018-12-07 16:49:41 -08:00
Eric Anholt
f1d98204c3 v3d: Fix a leak of the disassembled instruction string during debug dumps.
Fixes: ade416d023 ("broadcom: Add VC5 NIR compiler.")
2018-12-07 16:48:23 -08:00
Eric Anholt
7f8d8b7d27 vc4: Fix a leak of the transfer helper on screen destroy.
Fixes: d009463a65 ("vc4: Switch to using u_transfer_helper for MSAA maps.")
2018-12-07 16:48:23 -08:00
Eric Anholt
3bd73d31a8 v3d: Fix a leak of the transfer helper on screen destroy.
Fixes: 7a30517cce ("broadcom/vc5: Start adding support for rendering to Z32F_S8X24_UINT.")
2018-12-07 16:48:23 -08:00
Eric Anholt
bad95bb13c v3d: Add VIR dumping of TMU config p0/p1.
I had a bit of it for V3D 3.x, but didn't update it for 4.x.
2018-12-07 16:48:23 -08:00
Eric Anholt
1fc78ff3f1 v3d: Simplify VIR uniform dumping using a temporary. 2018-12-07 16:48:23 -08:00
Eric Anholt
5932575299 v3d: Garbage collect unused uniforms code. 2018-12-07 16:48:23 -08:00
Eric Anholt
62a3192112 v3d: Split most of TEXTURE_SHADER_STATE setup out of sampler views.
For shader image load/store, we want most of this logic to be shared.
2018-12-07 16:48:23 -08:00
Eric Anholt
8cb1f3bab7 v3d: Avoid confusing auto-indenting in TEXTURE_SHADER_STATE packing
Having "v3dx_pack() {" under each #if branch would confuse emacs's
indenter.
2018-12-07 16:48:23 -08:00
Eric Anholt
ee9b758053 v3d: Fix handling of texture first_layer offsets for 3D textures.
I think this bug predated adding v3d_layer_offset().  Noticed during an
unrelated refactor.
2018-12-07 16:48:23 -08:00
Eric Anholt
acecee4c2d v3d: Return the right gl_SampleMaskIn[] value.
It's supposed to be the dispatched sample mask for this pixel, not the GL
state's sample mask.
2018-12-07 16:48:23 -08:00
Eric Anholt
6870111051 v3d: Fix a comment typo 2018-12-07 16:48:23 -08:00
Eric Anholt
ca0e4ae4bc v3d: Convert to using nir_src_as_uint() from const_value derefs.
Follows 16870de8a0 ("nir: Use nir_src_is_const and nir_src_as_* in core
code") to clean up v3d.
2018-12-07 16:48:23 -08:00
Eric Anholt
503b55c622 v3d: Don't forget to flush writes to UBOs.
If someone did TF into a UBO, we might have left the TF job un-flushed at
the point of reading.
2018-12-07 16:48:23 -08:00
Eric Anholt
504d06e4c1 v3d: Make an array for frag/vert texture state in the context.
This simplifies a bunch of our texture handling, while introducing the
slots necessary for adding new shader stages.
2018-12-07 16:48:23 -08:00
Eric Anholt
d1965344ac v3d: Re-use the wrap mode uniform on V3D 3.3. 2018-12-07 16:48:23 -08:00
Eric Anholt
e94d034a38 v3d: Put default vertex attribute values into the state uploader as well.
The default attributes are long-lived (the state struct is cached), and
only 256 bytes each.
2018-12-07 16:48:23 -08:00
Eric Anholt
b38e4d313f v3d: Create a state uploader for packing our shaders together.
Shaders are usually quite short, and are private to the context.  We can
save memory and reduce the work the kernel needs to do at exec time by
packing them together in a stream uploader for long-lived state.
2018-12-07 16:48:23 -08:00
Eric Anholt
1911888760 v3d: Update simulator cache flushing code to match the kernel better.
We were missing the invalidate between bin and render (possibly relevant
for SSBOs), and still trying to flush the nonexistent L2C on 3.3+.
2018-12-07 16:48:23 -08:00
Eric Anholt
2ebca177dc v3d: Use the TFU to do generatemipmap.
This is a separate, dedicated hardware unit for texture layout conversions
and mipmap generation.
2018-12-07 16:48:23 -08:00
Eric Anholt
ee0549ff9a v3d: Add the V3D TFU submit interface to the simulator.
The TFU lets us format raster and SAND images into formats that can be
read by the texture engine, and do mipmap generation.

The UAPI comes from drm-next e69aa5f9b97f ("Merge tag
'drm-misc-next-2018-12-06' of git://anongit.freedesktop.org/drm/drm-misc
into drm-next")
2018-12-07 16:48:23 -08:00
Eric Anholt
42652ea51e v3d: Use combined input/output segments.
The HW apparently has some issues (or at least a much more complicated VCM
calculation) with non-combined segments, and the closed source driver also
uses combined I/O.  Until I get the last CTS failure resolved (which does
look plausibly like some VPM stomping), let's use combined I/O too.
2018-12-07 16:48:23 -08:00
Eric Anholt
fb9bcf5602 v3d: Add missing OES_half_float_linear support.
We were exposing ARB_texture_float, but apparently not the OES subset
flag.  Fixes regression from GLES3 support to GLES2.

Fixes: fcf9fcee3c ("mesa/main: do not require float-texture filtering
for es3")
2018-12-07 16:48:23 -08:00
Eric Anholt
90e98295a4 v3d: Add support for RGBA_SRGB along with BGRA_SRGB.
This is the actual native format for the hardware, without swizzling.
Noticed while debugging why GLES3 disappeared.
2018-12-07 16:48:23 -08:00
Kenneth Graunke
f0d51e81c9 intel/blorp: Expand blorp_address::offset to be 64 bits.
In the softpin world, surface state base address may be a fixed 64-bit
address (with no associated BO).  It makes sense to store this in the
offset field.  But it needs to be the full size.

We also update the clear color address to be consistently uint64_t
everywhere so we can continue passing intel_miptree_get_clear_color
a pointer to the blorp_address's offset field without type mismatches.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2018-12-07 16:35:51 -08:00
Rob Clark
d014af98b7 freedreno/drm: fix memory leak
Fix an emberrasing memory leak with the non-softpin submit/rb
implementation.

Fixes: f3cc0d2747 freedreno: import libdrm_freedreno + redesign submit
Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-12-07 14:12:12 -05:00
Rob Clark
5c2c1f0a2d freedreno/ir3: track max flow control depth for a5xx/a6xx
Rather than just hard-coding BRANCHSTACK size.

Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-12-07 13:49:21 -05:00
Rob Clark
9517037bdc freedreno/ir3: code-motion
Split up ir3_compiler_nir.c a bit before starting to add new stuff for
a6xx SSBO/image instructions.

Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-12-07 13:49:21 -05:00
Rob Clark
e37351fa57 freedreno/ir3: sync instr/disasm
Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-12-07 13:49:21 -05:00
Rob Clark
0d240c2214 freedreno/ir3: don't fetch unused tex components
Detect when a component of an (for example) texture fetch is unused and
propagate the updated wrmask back to the parent instruction.

Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-12-07 13:49:21 -05:00
Rob Clark
b971afd19e freedreno/a6xx: blitter fixes
Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-12-07 13:49:21 -05:00
Rob Clark
237ae7daf2 freedreno: update generated headers
Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-12-07 13:49:21 -05:00
Rob Clark
e779725f0b freedreno/drm: fix relocs in nested stateobjs
If we have an reloc from stateobjA to stateobjB, we would previously
leave stateobjB's bos out of the submit's bos table.  Handle this case
by copying into stateobjA's reloc_bos table.

Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-12-07 13:49:21 -05:00
Rob Clark
9f7c6c78bc freedreno/a5xx+a6xx: remove unused fs/vs pvt mem
copy/pasta from older gens

Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-12-07 13:49:21 -05:00
Rob Clark
c500e7b747 gallium: fix typo
Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-12-07 13:49:21 -05:00
Rob Clark
f6ad286c80 freedreno: remove unused fd_surface fields
Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-12-07 13:49:21 -05:00
Nicolai Hähnle
4275cae95c meson: link LLVM 'native' component when LLVM is available
Linking against LLVM built with BUILD_SHARED_LIBS fails otherwise,
as the component is required for the draw module.

Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
2018-12-07 16:26:14 +01:00
Connor Abbott
2845c49218 nir: Fixup algebraic test for variable-sized conversions
b2i can now take any size boolean in preparation for 1-bit booleans, so
the error message printed is slightly different.

Fixes: dca6cd9ce6 ("nir: Make boolean conversions sized just like the others")
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=108961
Cc: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
2018-12-07 16:07:51 +01:00
Samuel Pitoiset
e8a383ce67 gallium: add missing PIPE_CAP_SURFACE_SAMPLE_COUNT default value
Fixes: 2710c40e3c ("gallium: Add new PIPE_CAP_SURFACE_SAMPLE_COUNT")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Tested-by: Michel Dänzer <michel.daenzer@amd.com>
2018-12-07 15:06:29 +01:00
Emil Velikov
96d4ecbb11 docs: update calendar, add news item and link release notes for 18.3.0
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
2018-12-07 11:50:12 +00:00
Emil Velikov
0144bbdb98 docs: add sha256 checksums for 18.3.0
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit d81beab96a)
2018-12-07 11:44:33 +00:00
Emil Velikov
b1e0336497 docs: update 18.3.0 release notes
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit d603cd9d84)
2018-12-07 11:44:31 +00:00
Kristian H. Kristensen
3e55df4f83 freedreno: Add support for EXT_multisampled_render_to_texture
There is not much to do in freedreno - tile layout and multisample
state for gmem renderings is programmed based on the pfb sample count,
while resolve blits take the destination sample count from the resource.

Reviewed-by: Rob Clark <robdclark@gmail.com>
Signed-off-by: Kristian H. Kristensen <hoegsberg@chromium.org>
2018-12-06 16:56:37 -08:00
Rob Clark
913eb7fa58 freedreno/a6xx: MSAA
Reviewed-by: Kristian H. Kristensen <hoegsberg@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-12-06 16:55:59 -08:00