Commit graph

141245 commits

Author SHA1 Message Date
Icecream95
56f753f8e2 panfrost: Set bifrost_props for compute shaders
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8358>
2021-01-18 20:49:45 +00:00
Icecream95
c71d4d931e pan/bi: Implement load_kernel_input
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8358>
2021-01-18 20:49:45 +00:00
Icecream95
f33694552d pan/bi: Implement load/store intrinsics
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8358>
2021-01-18 20:49:45 +00:00
Icecream95
58cf95a637 pan/bi: Improve interoperability of the command-line disassembler
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8358>
2021-01-18 20:49:45 +00:00
Icecream95
7c6aa5f49d pan/bi: Set compute lowering options
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8358>
2021-01-18 20:49:45 +00:00
Icecream95
d267183829 pan/bi: Add some compute intrinsic loads
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8358>
2021-01-18 20:49:45 +00:00
Icecream95
2a7c33bd9d pan/bi: Handle 64-bit pack and unpack operations
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8358>
2021-01-18 20:49:45 +00:00
Icecream95
f5c9a10f33 pan/bi: Lower 64-bit integers
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8358>
2021-01-18 20:49:45 +00:00
Alyssa Rosenzweig
f4d2b35ac8 pan/bi: Pipe scratch_size in from NIR
Needs to be added to whatever we spill ourselves.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8358>
2021-01-18 20:49:45 +00:00
Ilia Mirkin
087ef91c85 nvc0: index_bias is now only set for indexed draws
Fixes: cbdc00ac3a ("nouveau: fix handling draw info")
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8539>
2021-01-18 17:51:58 +00:00
Ilia Mirkin
111c0733ea cso: set index_bounds_valid = true for arrays draws
The min/max indices are valid. Set the bit to true to indicate that.

Fixes glClear (+ clear_with_quads) on nouveau.

Fixes: 72ff53098c (gallium: add pipe_draw_info::index_bounds_valid)
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reported-by: Simon Ser <contact@emersion.fr>
Tested-by: Simon Ser <contact@emersion.fr>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8546>
2021-01-18 17:33:52 +00:00
Erik Faye-Lund
333730405d zink: handle NULL views in zink_set_sampler_views
Passing NULL for the views parameter should be the same as passing an
array of NULL, according to the documentation. So let's respect that
detail.

This fixes a crash when using GALLIUM_HUD.

Fixes: 8d46e35d16 ("zink: introduce opengl over vulkan")
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8564>
2021-01-18 17:06:12 +00:00
Samuel Iglesias Gonsálvez
b50b28cd33 turnip: disable UBWC on Z24_S8 MSAA images on A630
Fixes GPU hangs in dEQP-VK.renderpass2.depth_stencil_resolve.* tests
on A630.

Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8381>
2021-01-18 17:32:21 +01:00
Jason Ekstrand
63a431b81c anv: Add a trivial implementation of VK_KHR_deferred_host_operation
This isn't actually capable of deferring anything; it just trivially
returns success.

Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7735>
2021-01-18 10:09:51 -06:00
Bas Nieuwenhuizen
af1aef10f9 radv: Do not use a pipe offset for aliased sparse images.
Otherwise the offset might not match between the images that are
aliased.

Fixes: e553ea51e8 ("radv: Create sparse images.")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4072
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8535>
2021-01-18 11:12:45 +00:00
Michel Dänzer
23f2e77710 wsi/x11: Use get_screen_resources_current in wsi_x11_detect_xwayland
get_screen_resources may trigger an active probe of display connections
in the X server, which may take significant time and/or result in log
file spam.

Fixes: b5268d532a "wsi/x11: Detect Xwayland"
Reported-by: Sylvain Bertrand <sylvain.bertrand@legeek.net>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8492>
2021-01-18 10:03:32 +00:00
Marek Olšák
b06f3c52bf radeonsi: trim the size of si_vgt_param_key and si_vgt_stages_key
These are the minimum sizes we can use.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8548>
2021-01-18 01:17:19 +00:00
Marek Olšák
f1e34f125d radeonsi: don't use si_get_vs_state in most places
It's incorrect because si_get_vs_state returns gs_copy_shader for legacy
GS. It was harmless, but let's use si_get_vs, which is simpler.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8548>
2021-01-18 01:17:19 +00:00
Marek Olšák
4088b6f293 radeonsi: rearrange condition for streamout workaround on gfx7 and gfx8
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8548>
2021-01-18 01:17:19 +00:00
Marek Olšák
eb22bd2072 radeonsi: get out of si_emit_vs_state early for blit vertex shaders
They don't use current_vs_state.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8548>
2021-01-18 01:17:19 +00:00
Marek Olšák
73709143d2 radeonsi: remove MRT-draw-calls, spill-draw-calls, spill-compute-calls
due to limited usefulness and overhead in si_draw_vbo.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8548>
2021-01-18 01:17:19 +00:00
Marek Olšák
f2a5148701 radeonsi: make sctx->vertex_elements always non-NULL
Bind a state with 0 vertex elements there.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8548>
2021-01-18 01:17:19 +00:00
Marek Olšák
961aa67adf radeonsi: add a specialized function for CP DMA L2 prefetch
This radically simplifies the code to decrease CPU overhead in si_draw_vbo.
The generic CP DMA copy function is too complicated.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8548>
2021-01-18 01:17:19 +00:00
Marek Olšák
0eca4660a5 radeonsi: make cik_emit_prefetch_L2 templated and move it to si_state_draw.cpp
This is a great candidate for a template. There are a lot of conditions
that are already templated in si_draw_vbo.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8548>
2021-01-18 01:17:19 +00:00
Marek Olšák
c43d00dc91 radeonsi: fix si_num_prims_for_vertices for PIPE_PRIM_POLYGON
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8548>
2021-01-18 01:17:19 +00:00
Marek Olšák
6682c1603c radeonsi: don't compute average vertex count in si_draw_vbo
It's probably not needed and we also have draw merging on gfx10,
so we should be able to use total_driver_count in theory.
(I may be wrong, but I don't know if having avg_direct_count really
improves anything)

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8548>
2021-01-18 01:17:19 +00:00
Marek Olšák
295106c3e7 radeonsi: don't pass pipe_draw_info into si_emit_derived_tess_state
Only one field is used.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8548>
2021-01-18 01:17:19 +00:00
Marek Olšák
6f74105a34 radeonsi: translate pipe_prim_type only when it changes
just sink it into the branch

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8548>
2021-01-18 01:17:19 +00:00
Marek Olšák
d0d4c4ba1d radeonsi: don't pass pipe_draw_info into si_emit_ia_multi_vgt_param
Only one field is used.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8548>
2021-01-18 01:17:19 +00:00
Marek Olšák
53f9bb860b radeonsi: don't pass pipe_draw_info into si_emit_vs_state
only one field is used

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8548>
2021-01-18 01:17:19 +00:00
Marek Olšák
4056e953fe radeonsi: move emit_cache_flush functions into si_gfx_cs.c
This is a better place for them. They are not inlined anyway.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8548>
2021-01-18 01:17:19 +00:00
Marek Olšák
1ceec51b12 radeonsi: don't clear unaligned bits when unbinding vertex buffers
It's initialized to 0, so &= is a no-op.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8548>
2021-01-18 01:17:19 +00:00
Marek Olšák
df456312c2 radeonsi: constant buffer cleanups
si_set_clip_state unreferenced a NULL pointer = no-op.
si_set_tess_state can just pass the user buffer to si_set_rw_buffer directly.

Then si_upload_const_buffer can be static.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8548>
2021-01-18 01:17:19 +00:00
Mauro Rossi
b53d404aa7 android: freedreno/ir3: Switch over to new encoder/decoder
Fixes the following building error:

FAILED: out/target/product/x86_64/obj/SHARED_LIBRARIES/gallium_dri_intermediates/LINKED/gallium_dri.so
...
ld.lld: error: undefined symbol: isa_assemble
>>> referenced by ir3_shader.c:151 (external/mesa/src/freedreno/ir3/ir3_shader.c:151)
...
ld.lld: error: undefined symbol: isa_decode
>>> referenced by ir3_shader.c:668 (external/mesa/src/freedreno/ir3/ir3_shader.c:668)

Fixes: 5cae4779c ("freedreno/ir3: Switch over to new encoder/decoder")
Signed-off-by: Mauro Rossi <issor.oruam@gmail.com>
Acked-by: Rob Clark <robclark@freedesktop.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8538>
2021-01-17 21:57:05 +01:00
Mauro Rossi
7c0298e2fe android: freedreno/hw/isa: Add description of ir3 ISA
Necessary to build libir3decode and libir3encode for Android

Fixes: 6d94f575d ("freedreno/hw/isa: Add description of ir3 ISA")
Signed-off-by: Mauro Rossi <issor.oruam@gmail.com>
Acked-by: Rob Clark <robclark@freedesktop.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8538>
2021-01-17 21:57:05 +01:00
Hoe Hao Cheng
a183ee2ed7 zink: remove excessive checks for loader version
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8521>
2021-01-17 15:24:03 +00:00
Hoe Hao Cheng
c85902d60d zink/codegen: find promotion version using vulkan registry
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8521>
2021-01-17 15:24:03 +00:00
Hoe Hao Cheng
833b6ab443 zink/codegen: adding/fixing comments and copyright notice
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8521>
2021-01-17 15:24:03 +00:00
Hoe Hao Cheng
a454c562d6 zink/codegen: codegen-ize load_instance_extensions()
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8521>
2021-01-17 15:24:03 +00:00
Hoe Hao Cheng
c0259e5c6e zink/codegen: enable instance extension unconditionally if promoted
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8521>
2021-01-17 15:24:03 +00:00
Hoe Hao Cheng
463d7dc9c3 zink/codegen: make 'struct' optional in Version
while we are at it, fix a typo too

Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8521>
2021-01-17 15:24:03 +00:00
Hoe Hao Cheng
d0125fc487 zink/codegen: add some new attributes to Extension
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8521>
2021-01-17 15:24:03 +00:00
Vinson Lee
32797beaf5 nouveau: Fix typos.
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Pierre Moreau <dev@pmoreau.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8490>
2021-01-16 17:09:54 -08:00
Erico Nunes
7c885ad6c0 lima: introduce fs and vs shader cache
Some opengl features require shader recompilation to be implemented in
the mali400 and can only be detected at draw time. In some applications,
this could lead to recompiling shaders on every frame which could kill
performance. Introduce a shader cache to prevent this issue.
lima didn't have vertex shader recompilation yet but it is needed to
implement followup features, so include it here too.
Code heavily borrowed from the vc4 shader cache implementation.

One notable difference between the vc4 reference implementation and lima
is that lima still compiles the base shader at state creation time
without deferring it to the next draw (so that it stays compatible with
behaviour expected by unmodified shader-db, for example).

Signed-off-by: Erico Nunes <nunes.erico@gmail.com>
Reviewed-by: Andreas Baierl <ichgeh@imkreisrum.de>
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8357>
2021-01-16 22:20:35 +00:00
Alexander Kapshuk
88fc4e26b6 frontends/va/image: Eliminate repetitive code on error paths
Removes repetitive code in exit on error paths in the derive image function.

Signed-off-by: Alexander Kapshuk <alexander.kapshuk@gmail.com>
Reviewed-by: Thong Thai <thong.thai@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8481>
2021-01-16 19:23:13 +00:00
Joel Linn
5939a64b15 freedreno/a2xx: add RB perfcounter 1-3
Xenos driver reads four perf counters in total.

v2: fix register names

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7666>
2021-01-16 19:10:22 +00:00
Joel Linn
040ffee71f freedreno/a2xx: fix/add RBBM perfcounter
Xenos driver read two perf counters and their order is also different.

v2: fix typo in register address

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7666>
2021-01-16 19:10:22 +00:00
Ilia Mirkin
a0f4affcf6 glsl: only expose int64 atomics when extension is enabled
This limits the exposure of these functions to when the extension is
available. Prevents crashes otherwise, as the rest of the infrastructure
doesn't necessarily expect these functions when the extension is not
available.

Fixes: 40c1f9883e ("mesa,glsl: add support for GL_NV_shader_atomic_int64")
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8533>
2021-01-16 18:21:03 +00:00
Ilia Mirkin
6638b58ccf nv50/ir: clear dnz flag when converting mul/mad to simpler ops
Fixes some assertion failures in the GM107 emitter with the game
'tansei', noticed while debugging gitlab issue 4101.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8534>
2021-01-16 18:04:22 +00:00
Rob Clark
07a1a341bf freedreno/a6xx: Add r2d support for GMEM resolves
For cases where we need to do an MSAA resolve that BLIT events cannot
handle, fall back to CP_BLIT (r2d)

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4085
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8509>
2021-01-16 17:28:02 +00:00