11324 commits

Author	SHA1	Message	Date
Rhys Perry	37b956a203	radv/rt: cleanup phis after lowering parameter variables to SSA ... No fossil-db changes. fossil-db (navi31, monolithic pipelines disabled): Totals from 21 (0.03% of 80095) affected shaders: MaxWaves: 312 -> 320 (+2.56%) Instrs: 9989 -> 9666 (-3.23%) CodeSize: 56020 -> 53696 (-4.15%) VGPRs: 1488 -> 1440 (-3.23%) Latency: 157965 -> 146639 (-7.17%) InvThroughput: 25192 -> 22390 (-11.12%) VClause: 186 -> 148 (-20.43%) PreVGPRs: 1196 -> 1147 (-4.10%) VALU: 5053 -> 5040 (-0.26%) VMEM: 506 -> 240 (-52.57%) VOPD: 992 -> 1005 (+1.31%) fossil-db (navi31, monolithic pipelines disabled, any-hit function calls): Totals from 41 (0.05% of 80304) affected shaders: Instrs: 20615 -> 20436 (-0.87%); split: -0.97%, +0.10% CodeSize: 98780 -> 98080 (-0.71%); split: -0.79%, +0.09% Latency: 341542 -> 341796 (+0.07%); split: -0.05%, +0.13% InvThroughput: 46353 -> 46386 (+0.07%); split: -0.05%, +0.12% Copies: 6958 -> 6818 (-2.01%); split: -2.41%, +0.40% Branches: 676 -> 657 (-2.81%) VALU: 12232 -> 12092 (-1.14%); split: -1.37%, +0.23% Signed-off-by: Rhys Perry <pendingchaos02@gmail.com> Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39344>	2026-01-19 08:55:39 +00:00
Samuel Pitoiset	91a5a0f2b9	radv/meta: fix layered depth stencil resolves with compute ... Fixes a bunch of new VKCTS coverage like dEQP-VK.pipeline.monolithic.multisample.m10_resolve.resolve_cmd.d32_sfloat.depth.average.full_multilayer.no_flags Cc: mesa-stable Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39349>	2026-01-19 07:22:26 +00:00
Konstantin Seurer	091b43b970	radv: Use HPLOC for TLAS builds ... The BVH quality is comparable to PLOC but the build is much faster. Reviewed-by: Natalie Vock <natalie.vock@gmx.de> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39116>	2026-01-18 19:21:08 +01:00
Mauro Rossi	197cb437cd	radv/rt: Fix gnu-empty-initializer error in radv_pipeline_rt.c ... Fixes the following building error happening with clang: FAILED: src/amd/vulkan/libvulkan_radeon.so.p/radv_pipeline_rt.c.o ... ../src/amd/vulkan/radv_pipeline_rt.c:934:38: error: use of GNU empty initializer extension [-Werror,-Wgnu-empty-initializer] struct nir_function raygen_stub = {}; ^ 1 error generated. Fixes: 0a1911b2 ("radv,aco: Use function call structure for RT programs") Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39370>	2026-01-17 17:13:05 +01:00
Samuel Pitoiset	5555297121	radv/meta: always use mip level 0 for source image resolves ... MSAA+mipmaps isn't a thing. Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39285>	2026-01-16 11:35:34 +00:00
Samuel Pitoiset	cb57338d6f	radv/meta: batch resolving all color image layers with compute ... Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39285>	2026-01-16 11:35:34 +00:00
Samuel Pitoiset	1199f91a2f	radv/meta: use 2D array for color resolves with compute ... Cc: mesa-stable Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39285>	2026-01-16 11:35:34 +00:00
Samuel Pitoiset	cb7e1859d7	radv/sqtt: fail if GPU clocks can't be sampled ... All timing would be wrong otherwise, this should be considered a real error. Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39311>	2026-01-16 08:30:32 +00:00
Samuel Pitoiset	feed5fbc71	radv/sqtt: delay VMID reservation at capture time ... If two devices/instances are created, the VMID reservation will just fail. It seems fine as long as it's reserved before SPM is used. Fixes: a7a4abc8d8 ("radv: Move VMID reservation to vkCreateDevice") Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39311>	2026-01-16 08:30:32 +00:00
Emma Anholt	b375da7f2a	nir: Let nir_eval_const_opcode() return a poison mask in case of UB. ... This is unused by any callers currently, but will be useful for nir algebraic pattern testing, and as a way to turn our comments in nir_opcodes.py into actual C code. For now, always returns false. Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39076>	2026-01-15 19:09:32 +00:00
Benjamin Cheng	371656de90	radv/video_enc: Remove CTS WA ... This has been fixed in CTS since ebe05a88f36e3be8e232bfce97812353c396674a. Reviewed-by: David Rosca <david.rosca@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39242>	2026-01-15 11:45:33 +00:00
Marek Olšák	fa88c65bb8	radv,radeonsi: don't set LINE_STIPPLE_TEX_ENA on gfx12 ... Fixes: 3c5c96fedb - radv: double pixel throughput in certain cases of PS without interpolated inputs Fixes: 5acabdd1f8 - radeonsi: double pixel throughput in certain cases of PS without inputs Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/14646 Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39316>	2026-01-15 09:12:13 +00:00
Samuel Pitoiset	c559042a2a	radv/dgc: adjust task+mesh SQTT markers ... Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39178>	2026-01-15 09:43:00 +01:00
Samuel Pitoiset	82d00a4963	radv: fix missing SQTT markers for task+mesh draws ... Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39178>	2026-01-15 09:43:00 +01:00
Samuel Pitoiset	aee006efcd	radv/sqtt: emit userdata in the gang CS when needed ... For task shaders. Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39178>	2026-01-15 09:43:00 +01:00
Samuel Pitoiset	4da2e971e6	radv/sqtt: rework radv_emit_sqtt_userdata() to support gang CS ... For task shaders. Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39178>	2026-01-15 09:42:59 +01:00
Natalie Vock	6f076cdfda	radv: Use wave32 for RT on gfx11+ ... ACO got a lot better at forming VOPD instructions, and testing feedback seems to point in a slightly positive direction for this. gfx12 will also start requiring wave32 for dynamic VGPR allocation at some point. Measurements on navi31: Cyberpunk 2077: Difference at 95.0% confidence 1.12333 +/- 0.42876 1.88216% +/- 0.718391% (Student's t, pooled s = 0.189165) Black Myth Wukong benchmark: Difference at 95.0% confidence 4 +/- 1.30862 13.9535% +/- 4.56495% (Student's t, pooled s = 0.57735) Portal with RTX: 66.2ms->61.5ms (~7.64% improvement) Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39275>	2026-01-14 23:39:24 +00:00
Natalie Vock	27c0326391	radv: Re-enable RT pipelines ... Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29580>	2026-01-14 14:19:07 +00:00
Natalie Vock	0a1911b220	radv,aco: Use function call structure for RT programs ... Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29580>	2026-01-14 14:19:07 +00:00
Natalie Vock	c5d796c902	radv/rt: Use function call structure in NIR lowering ... Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29580>	2026-01-14 14:19:06 +00:00
Natalie Vock	d3cb8b4046	radv: Refactor RT lowering decisions and add RADV_PERFTEST CPS override ... Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29580>	2026-01-14 14:19:06 +00:00
Natalie Vock	63c019f5be	radv: Temporarily disable RT pipelines ... Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29580>	2026-01-14 14:19:05 +00:00
Natalie Vock	d563415100	radv: Add traversal stack size to cache ... We just... didn't do this at all??? I have no idea how this didn't blow up before, given that plenty of apps should generate a traversal shader that spills (and thus has a large stack size), but it did finally blow up in function-call related work. Cc: mesa-stable Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29580>	2026-01-14 14:19:05 +00:00
Alyssa Rosenzweig	e98728de3c	radv: cleanup texture builder ... Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com> Reviewed-by: Georg Lehmann <dadschoorse@gmail.com> Reviewed-by: Ian Romanick <ian.d.romanick@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39271>	2026-01-14 08:18:15 +00:00
Samuel Pitoiset	14deea2633	radv: enable SPM for GFX11.5 ... This adds support for performance counters with RGP on GFX11.5. Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39270>	2026-01-13 22:16:40 +00:00
Konstantin Seurer	58a35647e1	radv: Fix crash if proceed comes before initialize ... "initialize" can be NULL if the rq_proceed was visited before rq_initialize. Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/14626 cc: mesa-stable Reviewed-by: Timur Kristóf <timur.kristof@gmail.com> Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39251>	2026-01-12 22:34:32 +00:00
Samuel Pitoiset	b65cc9d587	ac,radv: sample and set correct shader/memory clocks for RGP ... These clocks need to be the clocks at trace time. This shouldn't fix anything given that RADV sets profile_peak when SQTT is enabled but better to report it correctly anyways. Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39208>	2026-01-12 11:58:43 +00:00
David Rosca	0518784b62	radv/amdgpu: Only wait on queue syncobj when needed ... This would always wait on the queue syncobj if there was any other wait syncobj, but it should only wait after zero submit. Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39193>	2026-01-12 10:59:03 +00:00
Dave Airlie	ab9e904f24	radv/coopmat: fix deref stride ... This at least fixes the nir debug output to have correct values. Fixes: 48fc8c8d1c ("radv/nir/lower_cmat: set optimal load/store alignment") Reviewed-by: Georg Lehmann <dadschoorse@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39256>	2026-01-12 10:39:05 +00:00
David Rosca	df4220d500	radv/video: Use different dpb swizzle mode for 10 bit encode ... Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Benjamin Cheng <benjamin.cheng@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39189>	2026-01-12 10:18:18 +00:00
David Rosca	587a7aa510	radv: Enable DCC modifiers for multi plane formats on GFX12 ... Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39190>	2026-01-12 09:57:56 +00:00
Samuel Pitoiset	5bcca4a832	radv/spm: use a staging buffer for faster reads on dGPUS ... This allows us to move the SPM buffer to VRAM because I think it must be in VRAM too. Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39195>	2026-01-12 09:35:37 +00:00
Samuel Pitoiset	6863a90486	radv/spm: rework allocating the SPM buffer ... For using a staging buffer. Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39195>	2026-01-12 09:35:37 +00:00
Samuel Pitoiset	c7d0aa6671	radv/sqtt: use a staging buffer for faster reads on dGPUS ... This is way faster. Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39195>	2026-01-12 09:35:36 +00:00
Samuel Pitoiset	5d430940d2	radv/sqtt: rework allocating the SQTT buffer ... For using a staging buffer. Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39195>	2026-01-12 09:35:36 +00:00
Samuel Pitoiset	1c611c2dac	radv/sqtt: use VkCommandBuffer objects for SQTT start/stop sequences ... For using a staging buffer. Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39195>	2026-01-12 09:35:35 +00:00
Samuel Pitoiset	6722a6332a	ac,radv,radeonsi: rename num_spm_counters to num_spm_modules ... A module can have different number of counters. Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39199>	2026-01-12 08:10:32 +00:00
Samuel Pitoiset	db02077c8a	radv: remove extra instructions after UNREACHABLE ... Minor cleanups. Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39237>	2026-01-12 07:41:08 +00:00
Samuel Pitoiset	e1e2517664	radv: use UNREACHABLE for illegal texture filter ... Found this with a broken CTS test, way easier to crash for isolating the test case. Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39237>	2026-01-12 07:41:08 +00:00
Samuel Pitoiset	91e0f8f1e5	radv/rt: fix a compilation warning about uninitialized fields ... Just zero-initialize the layout struct to fix the following warning because radv_use_bvh8() might return FALSE. ../src/amd/vulkan/radv_acceleration_structure.c: In function ‘radv_update_as_gfx12’: ../src/amd/vulkan/radv_acceleration_structure.c:873:70: warning: ‘layout.bounds_offsets’ may be used uninitialized [-Wmaybe-uninitialized] 873 | .bounds = state->build_info->scratchData.deviceAddress + layout.bounds_offsets, | ~~~~~~^~~~~~~~~~~~~~~ ../src/amd/vulkan/radv_acceleration_structure.c:866:33: note: ‘layout.bounds_offsets’ was declared here 866 | struct update_scratch_layout layout; | ^~~~~~ Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39228>	2026-01-12 07:18:50 +00:00
Konstantin Seurer	077292f65b	radv/bvh: Use box16 nodes when bvh8 is not used ... Using box16 nodes trades bvh quality for memory bandwidth which seems to be roughly equal in performance. Stats assuming box16 nodes are as expensive as box32 nodes: Totals from 7668 (79.68% of 9624) affected BVHs: compacted_size: 951666944 -> 742347648 (-22.00%) max_depth: 57606 -> 57615 (+0.02%) sah: 129114796242 -> 129998517775 (+0.68%); split: -0.00%, +0.68% scene_sah: 188564162 -> 192063633 (+1.86%); split: -0.02%, +1.88% box16_node_count: 0 -> 3270600 (+inf%) box32_node_count: 3365707 -> 95100 (-97.17%) Reviewed-by: Natalie Vock <natalie.vock@gmx.de> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37883>	2026-01-10 11:36:28 +01:00
Konstantin Seurer	543a88af99	radv/bvh: Add radv_aabb16 and use it for box16 nodes ... Reviewed-by: Natalie Vock <natalie.vock@gmx.de> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37883>	2026-01-10 11:36:19 +01:00
Konstantin Seurer	fefdad9249	radv/rra: Count box16 nodes properly ... Otherwise rra won't allocate memory when loading the capture. Reviewed-by: Natalie Vock <natalie.vock@gmx.de> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37883>	2026-01-10 11:34:18 +01:00
Benjamin Cheng	499d9e2e98	radv/video: Allow aliasing of video images ... Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39109>	2026-01-09 13:52:56 +00:00
Samuel Pitoiset	edb730f647	radv: fix flushing gang semaphore with SDMA/ACE ... If the main CS is SDMA and the gang CS is ACE, this would emit a SDMA_FENCE packet on ACE which just hangs. Fixes: b1938901d0 ("radv: Use SDMA fence packet when flushing gang semaphores") Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39211>	2026-01-09 09:07:45 +00:00
Natalie Vock	1f6ac3fa93	radv/rt,aco: Always dispatch 1D workgroups for RT ... We will swizzle the workgroups ourselves in the next commit. Removes the need for 1D dispatch workarounds. Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39142>	2026-01-08 19:49:54 +01:00
Natalie Vock	8baa95e4aa	radv/rt: Use subgroup invocation for stack index ... Workgroup == subgroup anyway, and we don't have the workgroup thread IDs in RT shaders. Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39142>	2026-01-08 19:49:45 +01:00
Georg Lehmann	a706769a0b	nir: move exact bit to nir_fp_math_control ... Unifies nir per instruction float control. In the future this can be split into contract/reassoc/transform like SPIR-V. Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com> Reviewed-by: Marek Olšák <marek.olsak@amd.com> (except SPIR-V) Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39103>	2026-01-07 09:40:57 +00:00
Marek Olšák	1912a00a91	ALL: use SHA1_DIGEST_LENGTH etc. instead of hardcoding the numbers ... only build_id is switched to use literal 20 instead of SHA1_DIGEST_LENGTH because we will increase SHA1_DIGEST_LENGTH to BLAKE3_KEY_LEN Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39110>	2026-01-07 08:32:33 +00:00
Samuel Pitoiset	9f5dd888b6	radv/sqtt: add a comment about the allocation strategy of the SQTT BO ... Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39172>	2026-01-07 06:57:29 +00:00