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https://gitlab.freedesktop.org/mesa/mesa.git
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radv/bvh: Use box16 nodes when bvh8 is not used
Using box16 nodes trades bvh quality for memory bandwidth which seems to be roughly equal in performance. Stats assuming box16 nodes are as expensive as box32 nodes: Totals from 7668 (79.68% of 9624) affected BVHs: compacted_size: 951666944 -> 742347648 (-22.00%) max_depth: 57606 -> 57615 (+0.02%) sah: 129114796242 -> 129998517775 (+0.68%); split: -0.00%, +0.68% scene_sah: 188564162 -> 192063633 (+1.86%); split: -0.02%, +1.88% box16_node_count: 0 -> 3270600 (+inf%) box32_node_count: 3365707 -> 95100 (-97.17%) Reviewed-by: Natalie Vock <natalie.vock@gmx.de> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37883>
This commit is contained in:
Konstantin Seurer
parent
543a88af99
commit
077292f65b
7 changed files with 109 additions and 39 deletions
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@ -8,6 +8,7 @@
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#define BVH_BUILD_HELPERS_H
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#include "bvh.h"
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#include "spirv_internal_exts.h"
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#include "vk_build_helpers.h"
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TYPE(radv_accel_struct_serialization_header, 8);
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@ -110,4 +111,7 @@ radv_encode_blas_pointer_flags(uint32_t flags, uint32_t geometry_type)
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return ptr_flags;
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}
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spirv_instruction(set = "MesaInternal", id = SpvOpFConvertRUMesa) float16_t radv_f32_to_f16_pos_inf(float f);
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spirv_instruction(set = "MesaInternal", id = SpvOpFConvertRDMesa) float16_t radv_f32_to_f16_neg_inf(float f);
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#endif /* BUILD_HELPERS_H */
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@ -26,6 +26,7 @@
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#define RADV_BUILD_FLAG_PAIR_COMPRESS_TRIANGLES (1u << (VK_BUILD_FLAG_COUNT + 5))
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#define RADV_BUILD_FLAG_BATCH_COMPRESS_TRIANGLES (1u << (VK_BUILD_FLAG_COUNT + 6))
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#define RADV_BUILD_FLAG_BATCH_COMPRESS_TRIANGLES_RETRY (1u << (VK_BUILD_FLAG_COUNT + 7))
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#define RADV_BUILD_FLAG_USE_BOX16 (1u << (VK_BUILD_FLAG_COUNT + 8))
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#define RADV_COPY_MODE_COPY 0
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#define RADV_COPY_MODE_SERIALIZE 1
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@ -22,6 +22,32 @@ void set_parent(uint32_t child, uint32_t parent)
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DEREF(REF(uint32_t)(addr)) = parent;
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}
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radv_aabb16
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radv_aabb_f32_to_f16(vk_aabb aabb)
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{
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radv_aabb16 aabb16;
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aabb16.min_x = radv_f32_to_f16_neg_inf(aabb.min.x);
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aabb16.min_y = radv_f32_to_f16_neg_inf(aabb.min.y);
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aabb16.min_z = radv_f32_to_f16_neg_inf(aabb.min.z);
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aabb16.max_x = radv_f32_to_f16_pos_inf(aabb.max.x);
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aabb16.max_y = radv_f32_to_f16_pos_inf(aabb.max.y);
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aabb16.max_z = radv_f32_to_f16_pos_inf(aabb.max.z);
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return aabb16;
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}
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vk_aabb
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radv_aabb_f16_to_f32(radv_aabb16 aabb16)
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{
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vk_aabb aabb;
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aabb.min.x = float(aabb16.min_x);
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aabb.min.y = float(aabb16.min_y);
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aabb.min.z = float(aabb16.min_z);
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aabb.max.x = float(aabb16.max_x);
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aabb.max.y = float(aabb16.max_y);
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aabb.max.z = float(aabb16.max_z);
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return aabb;
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}
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void
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main()
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{
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@ -89,18 +115,15 @@ main()
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memoryBarrier(gl_ScopeDevice, gl_StorageSemanticsBuffer,
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gl_SemanticsAcquireRelease | gl_SemanticsMakeAvailable | gl_SemanticsMakeVisible);
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uint32_t bvh_offset = is_root_node ? id_to_offset(RADV_BVH_ROOT_NODE) : DEREF(src_node).bvh_offset;
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if (bvh_offset == VK_UNKNOWN_BVH_OFFSET)
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uint32_t node_id = is_root_node ? RADV_BVH_ROOT_NODE : DEREF(src_node).bvh_offset;
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if (node_id == VK_UNKNOWN_BVH_OFFSET)
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continue;
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if (bvh_offset == VK_NULL_BVH_OFFSET)
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if (node_id == VK_NULL_BVH_OFFSET)
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break;
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uint32_t flags = 0;
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REF(radv_bvh_box32_node) dst_node = REF(radv_bvh_box32_node)(OFFSET(args.output_bvh, bvh_offset));
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uint32_t node_id = pack_node_id(bvh_offset, radv_bvh_node_box32);
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uint32_t found_child_count = 0;
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uint32_t children[4] = {RADV_BVH_INVALID_NODE, RADV_BVH_INVALID_NODE,
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RADV_BVH_INVALID_NODE, RADV_BVH_INVALID_NODE};
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@ -158,20 +181,33 @@ main()
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break;
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}
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REF(radv_bvh_box16_node) dst_node_f16 = REF(radv_bvh_box16_node)(OFFSET(args.output_bvh, id_to_offset(node_id)));
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REF(radv_bvh_box32_node) dst_node_f32 = REF(radv_bvh_box32_node)(OFFSET(args.output_bvh, id_to_offset(node_id)));
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bool is_box16 = VK_BUILD_FLAG(RADV_BUILD_FLAG_USE_BOX16) && id_to_type(node_id) == radv_bvh_node_box16;
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for (uint32_t i = 0; i < found_child_count; ++i) {
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uint32_t type = ir_id_to_type(children[i]);
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uint32_t offset = ir_id_to_offset(children[i]);
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uint32_t dst_offset;
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uint32_t child_node_id;
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vk_aabb child_aabb = DEREF(REF(vk_ir_node)OFFSET(args.intermediate_bvh, offset)).aabb;
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if (type == vk_ir_node_internal) {
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dst_offset = atomicAdd(DEREF(args.header).dst_node_offset, SIZEOF(radv_bvh_box32_node));
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radv_aabb16 child_aabb16 = radv_aabb_f32_to_f16(child_aabb);
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float surface_area_f16 = aabb_surface_area(radv_aabb_f16_to_f32(child_aabb16));
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float surface_area_f32 = aabb_surface_area(child_aabb);
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bool child_use_f16 = VK_BUILD_FLAG(RADV_BUILD_FLAG_USE_BOX16) && surface_area_f16 < surface_area_f32 * 1.5;
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REF(vk_ir_box_node) child_node = REF(vk_ir_box_node)OFFSET(args.intermediate_bvh, offset);
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DEREF(child_node).bvh_offset = dst_offset;
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uint32_t dst_offset = atomicAdd(DEREF(args.header).dst_node_offset,
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child_use_f16 ? SIZEOF(radv_bvh_box16_node) : SIZEOF(radv_bvh_box32_node));
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child_node_id = pack_node_id(dst_offset, child_use_f16 ? radv_bvh_node_box16 : radv_bvh_node_box32);
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REF(vk_ir_box_node) child_node = REF(vk_ir_box_node) OFFSET(args.intermediate_bvh, offset);
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DEREF(child_node).bvh_offset = child_node_id;
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flags |= (DEREF(child_node).flags & 0x3) << i * 8;
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} else {
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uint32_t child_index = offset / ir_leaf_node_size;
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dst_offset = dst_leaf_offset + child_index * output_leaf_node_size;
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uint32_t dst_offset = dst_leaf_offset + child_index * output_leaf_node_size;
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if (type == vk_ir_node_instance) {
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vk_ir_instance_node src_node =
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@ -182,47 +218,65 @@ main()
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uint32_t child_flags = fetch_child_flags(args.intermediate_bvh, children[i]);
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flags |= (child_flags & 0x3) << i * 8;
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}
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child_node_id = pack_node_id(dst_offset, ir_type_to_bvh_type(type));
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}
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vk_aabb child_aabb =
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DEREF(REF(vk_ir_node)OFFSET(args.intermediate_bvh, offset)).aabb;
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/* On gfx11, infinities in AABB coords can cause garbage child nodes to be
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* returned by box intersection tests with non-default box sorting modes.
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* Subtract 1 from the integer representation of inf/-inf to turn it into
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* the maximum/minimum representable floating-point value as a workaround.
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*/
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if (VK_BUILD_FLAG(RADV_BUILD_FLAG_NO_INFS)) {
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for (uint32_t i = 0; i < 3; ++i) {
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if (isinf(child_aabb.min[i]))
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child_aabb.min[i] = uintBitsToFloat(floatBitsToUint(child_aabb.min[i]) - 1);
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if (isinf(child_aabb.max[i]))
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child_aabb.max[i] = uintBitsToFloat(floatBitsToUint(child_aabb.max[i]) - 1);
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if (is_box16) {
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DEREF(dst_node_f16).coords[i] = radv_aabb_f32_to_f16(child_aabb);
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} else {
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/* On gfx11, infinities in AABB coords can cause garbage child nodes to be
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* returned by box intersection tests with non-default box sorting modes.
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* Subtract 1 from the integer representation of inf/-inf to turn it into
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* the maximum/minimum representable floating-point value as a workaround.
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*/
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if (VK_BUILD_FLAG(RADV_BUILD_FLAG_NO_INFS)) {
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for (uint32_t i = 0; i < 3; ++i) {
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if (isinf(child_aabb.min[i]))
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child_aabb.min[i] = uintBitsToFloat(floatBitsToUint(child_aabb.min[i]) - 1);
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if (isinf(child_aabb.max[i]))
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child_aabb.max[i] = uintBitsToFloat(floatBitsToUint(child_aabb.max[i]) - 1);
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}
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}
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DEREF(dst_node_f32).coords[i] = child_aabb;
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}
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DEREF(dst_node).coords[i] = child_aabb;
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uint32_t child_id = pack_node_id(dst_offset, ir_type_to_bvh_type(type));
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children[i] = child_id;
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set_parent(child_id, node_id);
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children[i] = child_node_id;
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set_parent(child_node_id, node_id);
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}
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for (uint i = found_child_count; i < 4; ++i) {
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if (is_box16) {
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radv_aabb16 null_aabb;
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null_aabb.min_x = NAN_F16;
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null_aabb.min_y = NAN_F16;
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null_aabb.min_z = NAN_F16;
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null_aabb.max_x = NAN_F16;
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null_aabb.max_y = NAN_F16;
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null_aabb.max_z = NAN_F16;
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for (uint i = found_child_count; i < 4; ++i)
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DEREF(dst_node_f16).coords[i] = null_aabb;
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} else {
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for (uint i = found_child_count; i < 4; ++i) {
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for (uint comp = 0; comp < 3; ++comp) {
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DEREF(dst_node).coords[i].min[comp] = NAN;
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DEREF(dst_node).coords[i].max[comp] = NAN;
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DEREF(dst_node_f32).coords[i].min[comp] = NAN;
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DEREF(dst_node_f32).coords[i].max[comp] = NAN;
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}
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}
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}
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/* Make changes to the children's BVH offset value available to the other invocations. */
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memoryBarrier(gl_ScopeDevice, gl_StorageSemanticsBuffer,
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gl_SemanticsAcquireRelease | gl_SemanticsMakeAvailable | gl_SemanticsMakeVisible);
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DEREF(dst_node).children = children;
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if (is_box16) {
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DEREF(dst_node_f16).children = children;
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} else {
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DEREF(dst_node_f32).children = children;
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if (VK_BUILD_FLAG(VK_BUILD_FLAG_PROPAGATE_CULL_FLAGS))
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DEREF(dst_node).flags = flags;
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if (VK_BUILD_FLAG(VK_BUILD_FLAG_PROPAGATE_CULL_FLAGS))
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DEREF(dst_node_f32).flags = flags;
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}
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break;
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}
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@ -56,7 +56,7 @@ bvh_includes = files(
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bvh_spv = []
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foreach s : bvh_shaders
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command = [
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prog_glslang, '-V', '-I' + bvh_include_dir, '-I' + vk_bvh_include_dir, '--target-env', 'spirv1.5',
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prog_glslang, '-V', '-I' + bvh_include_dir, '-I' + vk_bvh_include_dir, '-I' + spirv_include_dir, '--target-env', 'spirv1.5',
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'-x', '-o', '@OUTPUT@', '@INPUT@', glslang_depfile, glslang_quiet,
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]
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command += vk_glsl_shader_preamble
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@ -75,6 +75,7 @@ enum radv_encode_key_bits {
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RADV_ENCODE_KEY_WRITE_LEAF_NODE_OFFSETS = (1 << 0),
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RADV_ENCODE_KEY_PAIR_COMPRESS_GFX12 = (1 << 1),
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RADV_ENCODE_KEY_BATCH_COMPRESS_GFX12 = (1 << 2),
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RADV_ENCODE_KEY_USE_BOX16 = (1 << 3),
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};
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static void
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@ -284,6 +285,8 @@ radv_get_build_config(VkDevice _device, struct vk_acceleration_structure_build_s
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VK_FROM_HANDLE(radv_device, device, _device);
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struct radv_physical_device *pdev = radv_device_physical(device);
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VkGeometryTypeKHR geometry_type = vk_get_as_geometry_type(state->build_info);
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uint32_t encode_key = 0;
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if (radv_use_bvh8(pdev)) {
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/*
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@ -299,11 +302,13 @@ radv_get_build_config(VkDevice _device, struct vk_acceleration_structure_build_s
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state->build_info->type != VK_ACCELERATION_STRUCTURE_TYPE_BOTTOM_LEVEL_KHR)
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encode_key |= RADV_ENCODE_KEY_WRITE_LEAF_NODE_OFFSETS;
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VkGeometryTypeKHR geometry_type = vk_get_as_geometry_type(state->build_info);
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if (!(state->build_info->flags & (VK_BUILD_ACCELERATION_STRUCTURE_ALLOW_UPDATE_BIT_KHR |
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VK_BUILD_ACCELERATION_STRUCTURE_ALLOW_DATA_ACCESS_KHR)) &&
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geometry_type == VK_GEOMETRY_TYPE_TRIANGLES_KHR)
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encode_key |= RADV_ENCODE_KEY_BATCH_COMPRESS_GFX12;
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} else if (!radv_emulate_rt(pdev)) {
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if (!(state->build_info->flags & VK_BUILD_ACCELERATION_STRUCTURE_ALLOW_UPDATE_BIT_KHR))
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encode_key |= RADV_ENCODE_KEY_USE_BOX16;
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}
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state->config.encode_key[0] = encode_key;
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@ -388,6 +393,8 @@ radv_build_flags(VkCommandBuffer commandBuffer, uint32_t key)
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flags |= RADV_BUILD_FLAG_PAIR_COMPRESS_TRIANGLES;
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if (key & RADV_ENCODE_KEY_BATCH_COMPRESS_GFX12)
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flags |= RADV_BUILD_FLAG_BATCH_COMPRESS_TRIANGLES;
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if (key & RADV_ENCODE_KEY_USE_BOX16)
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flags |= RADV_BUILD_FLAG_USE_BOX16;
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return flags;
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}
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@ -42,6 +42,7 @@ bvh_shaders = [
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],
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]
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spirv_include_dir = dir_source_root + '/src/compiler/spirv'
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vk_bvh_include_dir = dir_source_root + '/src/vulkan/runtime/bvh'
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vk_bvh_includes = files(
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@ -50,6 +51,7 @@ vk_bvh_includes = files(
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'vk_build_interface.h',
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'vk_bvh.h',
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'vk_debug.h',
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spirv_include_dir + '/spirv_internal_exts.h',
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)
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vk_glsl_shader_extensions = [
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@ -69,6 +71,7 @@ vk_glsl_shader_extensions = [
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'GL_KHR_shader_subgroup_ballot',
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'GL_KHR_shader_subgroup_clustered',
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'GL_EXT_shader_atomic_int64',
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'GL_EXT_spirv_intrinsics',
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]
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vk_glsl_shader_preamble = []
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@ -79,7 +82,7 @@ endforeach
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bvh_spv = []
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foreach s : bvh_shaders
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command = [
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prog_glslang, '-V', '-I' + vk_bvh_include_dir, '--target-env', 'spirv1.5', '-x', '-o', '@OUTPUT@', '@INPUT@'
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prog_glslang, '-V', '-I' + vk_bvh_include_dir, '-I' + spirv_include_dir, '--target-env', 'spirv1.5', '-x', '-o', '@OUTPUT@', '@INPUT@'
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] + (with_mesa_debug ? ['-g'] : [])
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command += glslang_quiet
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command += vk_glsl_shader_preamble
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@ -180,6 +180,7 @@
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#define INFINITY (1.0 / 0.0)
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#define NAN (0.0 / 0.0)
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#define NAN_F16 (0.0hf / 0.0hf)
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#define INDEX(type, ptr, index) REF(type)(OFFSET(ptr, (index)*SIZEOF(type)))
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