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https://gitlab.freedesktop.org/mesa/mesa.git
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radv/sqtt: use VkCommandBuffer objects for SQTT start/stop sequences
For using a staging buffer. Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39195>
This commit is contained in:
Samuel Pitoiset
Marge Bot
parent
ceb2667cf3
commit
1c611c2dac
4 changed files with 137 additions and 102 deletions
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@ -33,7 +33,7 @@ struct radeon_info;
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* around each command needed. The primary user of this is RGP.
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*/
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struct ac_sqtt {
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/* ac_cmdbuf or radeon_cmdbuf */
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/* Only used by RadeonSI */
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void *start_cs[2];
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void *stop_cs[2];
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/* struct radeon_winsys_bo or struct pb_buffer */
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@ -224,6 +224,9 @@ struct radv_device {
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bool sqtt_enabled;
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bool sqtt_triggered;
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VkCommandBuffer sqtt_start_cmdbuf[2];
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VkCommandBuffer sqtt_stop_cmdbuf[2];
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/* SQTT timestamps for queue events. */
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simple_mtx_t sqtt_timestamp_mtx;
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struct radv_sqtt_timestamp sqtt_timestamp;
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@ -419,18 +419,18 @@ void
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radv_sqtt_finish(struct radv_device *device)
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{
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struct ac_sqtt *sqtt = &device->sqtt;
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struct radeon_winsys *ws = device->ws;
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radv_sqtt_finish_bo(device);
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radv_sqtt_finish_queue_event(device);
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for (unsigned i = 0; i < 2; i++) {
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if (device->sqtt.start_cs[i])
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ws->cs_destroy(device->sqtt.start_cs[i]);
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if (device->sqtt.stop_cs[i])
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ws->cs_destroy(device->sqtt.stop_cs[i]);
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if (device->sqtt_start_cmdbuf[i])
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radv_sqtt_free_cmdbuf(device, i, device->sqtt_start_cmdbuf[i]);
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if (device->sqtt_stop_cmdbuf[i])
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radv_sqtt_free_cmdbuf(device, i, device->sqtt_stop_cmdbuf[i]);
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}
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radv_sqtt_finish_queue_event(device);
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radv_unregister_queues(device, sqtt);
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ac_sqtt_finish(sqtt);
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@ -464,77 +464,79 @@ radv_begin_sqtt(struct radv_queue *queue)
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const struct radv_physical_device *pdev = radv_device_physical(device);
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enum radv_queue_family family = queue->state.qf;
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struct radeon_winsys *ws = device->ws;
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struct radv_cmd_stream cs;
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VkCommandBuffer cmdbuf;
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VkResult result;
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/* Destroy the previous start CS and create a new one. */
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if (device->sqtt.start_cs[family]) {
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ws->cs_destroy(device->sqtt.start_cs[family]);
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device->sqtt.start_cs[family] = NULL;
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/* Destroy the previous start cmdbuf and create a new one. */
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if (device->sqtt_start_cmdbuf[family]) {
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radv_sqtt_free_cmdbuf(device, family, device->sqtt_start_cmdbuf[family]);
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device->sqtt_start_cmdbuf[family] = NULL;
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}
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radv_init_cmd_stream(device, &cs, radv_queue_ring(queue));
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cs.b = ws->cs_create(ws, cs.hw_ip, false);
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if (!cs.b)
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result = radv_sqtt_allocate_cmdbuf(device, family, &cmdbuf);
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if (result != VK_SUCCESS)
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return false;
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radeon_check_space(ws, cs.b, 512);
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struct radv_cmd_stream *cs = radv_cmd_buffer_from_handle(cmdbuf)->cs;
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radeon_begin(&cs);
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VkCommandBufferBeginInfo begin_info = {
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.sType = VK_STRUCTURE_TYPE_COMMAND_BUFFER_BEGIN_INFO,
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};
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switch (cs.hw_ip) {
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case AMD_IP_GFX:
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radeon_emit(PKT3(PKT3_CONTEXT_CONTROL, 1, 0));
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radeon_emit(CC0_UPDATE_LOAD_ENABLES(1));
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radeon_emit(CC1_UPDATE_SHADOW_ENABLES(1));
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break;
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case AMD_IP_COMPUTE:
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radeon_emit(PKT3(PKT3_NOP, 0, 0));
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radeon_emit(0);
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break;
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default:
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UNREACHABLE("Incorrect HW IP type");
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break;
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}
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result = radv_BeginCommandBuffer(cmdbuf, &begin_info);
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if (result != VK_SUCCESS)
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return false;
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radeon_end();
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radeon_check_space(ws, cs->b, 512);
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/* Make sure to wait-for-idle before starting SQTT. */
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radv_emit_wait_for_idle(device, &cs);
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radv_emit_wait_for_idle(device, cs);
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/* Disable clock gating before starting SQTT. */
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ac_emit_cp_inhibit_clockgating(cs.b, pdev->info.gfx_level, true);
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ac_emit_cp_inhibit_clockgating(cs->b, pdev->info.gfx_level, true);
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/* Enable SQG events that collects thread trace data. */
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ac_emit_cp_spi_config_cntl(cs.b, pdev->info.gfx_level, true);
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ac_emit_cp_spi_config_cntl(cs->b, pdev->info.gfx_level, true);
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if (device->spm.bo) {
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ac_emit_spm_reset(cs.b);
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ac_emit_spm_reset(cs->b);
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/* Enable all shader stages by default. */
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radv_perfcounter_emit_shaders(device, &cs, ac_sqtt_get_shader_mask(&pdev->info));
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radv_perfcounter_emit_shaders(device, cs, ac_sqtt_get_shader_mask(&pdev->info));
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radv_emit_spm_setup(device, &cs);
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radv_emit_spm_setup(device, cs);
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}
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/* Start SQTT. */
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radv_emit_sqtt_start(device, &cs);
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radv_emit_sqtt_start(device, cs);
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if (device->spm.bo) {
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radeon_check_space(ws, cs.b, 8);
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ac_emit_spm_start(cs.b, cs.hw_ip, &pdev->info);
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radeon_check_space(ws, cs->b, 8);
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ac_emit_spm_start(cs->b, cs->hw_ip, &pdev->info);
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}
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result = ws->cs_finalize(cs.b);
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if (result != VK_SUCCESS) {
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ws->cs_destroy(cs.b);
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result = radv_EndCommandBuffer(cmdbuf);
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if (result != VK_SUCCESS)
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return false;
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}
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device->sqtt.start_cs[family] = cs.b;
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VkCommandBufferSubmitInfo cmdbuf_info = {
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.sType = VK_STRUCTURE_TYPE_COMMAND_BUFFER_SUBMIT_INFO,
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.commandBuffer = cmdbuf,
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};
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return radv_queue_internal_submit(queue, cs.b);
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VkSubmitInfo2 submit_info = {
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.sType = VK_STRUCTURE_TYPE_SUBMIT_INFO_2,
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.commandBufferInfoCount = 1,
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.pCommandBufferInfos = &cmdbuf_info,
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};
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result = device->layer_dispatch.rgp.QueueSubmit2(radv_queue_to_handle(queue), 1, &submit_info, VK_NULL_HANDLE);
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if (result != VK_SUCCESS)
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return false;
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device->sqtt_start_cmdbuf[family] = cmdbuf;
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return true;
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}
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static bool
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@ -544,71 +546,73 @@ radv_end_sqtt(struct radv_queue *queue)
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const struct radv_physical_device *pdev = radv_device_physical(device);
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enum radv_queue_family family = queue->state.qf;
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struct radeon_winsys *ws = device->ws;
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struct radv_cmd_stream cs;
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VkCommandBuffer cmdbuf;
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VkResult result;
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/* Destroy the previous stop CS and create a new one. */
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if (device->sqtt.stop_cs[family]) {
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ws->cs_destroy(device->sqtt.stop_cs[family]);
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device->sqtt.stop_cs[family] = NULL;
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/* Destroy the previous stop cmdbuf and create a new one. */
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if (device->sqtt_stop_cmdbuf[family]) {
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radv_sqtt_free_cmdbuf(device, family, device->sqtt_stop_cmdbuf[family]);
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device->sqtt_stop_cmdbuf[family] = NULL;
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}
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radv_init_cmd_stream(device, &cs, radv_queue_ring(queue));
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cs.b = ws->cs_create(ws, cs.hw_ip, false);
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if (!cs.b)
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result = radv_sqtt_allocate_cmdbuf(device, family, &cmdbuf);
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if (result != VK_SUCCESS)
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return false;
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radeon_check_space(ws, cs.b, 512);
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struct radv_cmd_stream *cs = radv_cmd_buffer_from_handle(cmdbuf)->cs;
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radeon_begin(&cs);
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VkCommandBufferBeginInfo begin_info = {
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.sType = VK_STRUCTURE_TYPE_COMMAND_BUFFER_BEGIN_INFO,
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};
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switch (cs.hw_ip) {
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case AMD_IP_GFX:
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radeon_emit(PKT3(PKT3_CONTEXT_CONTROL, 1, 0));
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radeon_emit(CC0_UPDATE_LOAD_ENABLES(1));
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radeon_emit(CC1_UPDATE_SHADOW_ENABLES(1));
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break;
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case AMD_IP_COMPUTE:
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radeon_emit(PKT3(PKT3_NOP, 0, 0));
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radeon_emit(0);
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break;
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default:
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UNREACHABLE("Incorrect HW IP type");
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break;
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}
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result = radv_BeginCommandBuffer(cmdbuf, &begin_info);
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if (result != VK_SUCCESS)
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return false;
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radeon_end();
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radeon_check_space(ws, cs->b, 512);
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/* Make sure to wait-for-idle before stopping SQTT. */
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radv_emit_wait_for_idle(device, &cs);
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radv_emit_wait_for_idle(device, cs);
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if (device->spm.bo) {
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radeon_check_space(ws, cs.b, 8);
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ac_emit_spm_stop(cs.b, cs.hw_ip, &pdev->info);
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radeon_check_space(ws, cs->b, 8);
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ac_emit_spm_stop(cs->b, cs->hw_ip, &pdev->info);
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}
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/* Stop SQTT. */
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radv_emit_sqtt_stop(device, &cs);
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radv_emit_sqtt_stop(device, cs);
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if (device->spm.bo)
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ac_emit_spm_reset(cs.b);
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ac_emit_spm_reset(cs->b);
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/* Restore previous state by disabling SQG events. */
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ac_emit_cp_spi_config_cntl(cs.b, pdev->info.gfx_level, false);
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ac_emit_cp_spi_config_cntl(cs->b, pdev->info.gfx_level, false);
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/* Restore previous state by re-enabling clock gating. */
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ac_emit_cp_inhibit_clockgating(cs.b, pdev->info.gfx_level, false);
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ac_emit_cp_inhibit_clockgating(cs->b, pdev->info.gfx_level, false);
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result = ws->cs_finalize(cs.b);
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if (result != VK_SUCCESS) {
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ws->cs_destroy(cs.b);
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result = radv_EndCommandBuffer(cmdbuf);
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if (result != VK_SUCCESS)
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return false;
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}
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device->sqtt.stop_cs[family] = cs.b;
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VkCommandBufferSubmitInfo cmdbuf_info = {
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.sType = VK_STRUCTURE_TYPE_COMMAND_BUFFER_SUBMIT_INFO,
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.commandBuffer = cmdbuf,
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};
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return radv_queue_internal_submit(queue, cs.b);
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VkSubmitInfo2 submit_info = {
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.sType = VK_STRUCTURE_TYPE_SUBMIT_INFO_2,
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.commandBufferInfoCount = 1,
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.pCommandBufferInfos = &cmdbuf_info,
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};
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result = device->layer_dispatch.rgp.QueueSubmit2(radv_queue_to_handle(queue), 1, &submit_info, VK_NULL_HANDLE);
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if (result != VK_SUCCESS)
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return false;
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device->sqtt_stop_cmdbuf[family] = cmdbuf;
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return true;
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}
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void
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@ -761,6 +765,40 @@ radv_sqtt_sample_clocks(struct radv_device *device)
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return ac_sqtt_add_clock_calibration(&device->sqtt, cpu_timestamp, gpu_timestamp);
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}
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VkResult
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radv_sqtt_allocate_cmdbuf(struct radv_device *device, enum radv_queue_family queue_family, VkCommandBuffer *pcmdbuf)
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{
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VkCommandPool command_pool = vk_command_pool_to_handle(device->sqtt_command_pool[queue_family]);
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VkResult result;
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simple_mtx_lock(&device->sqtt_command_pool_mtx);
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const VkCommandBufferAllocateInfo alloc_info = {
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.sType = VK_STRUCTURE_TYPE_COMMAND_BUFFER_ALLOCATE_INFO,
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.commandPool = command_pool,
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.level = VK_COMMAND_BUFFER_LEVEL_PRIMARY,
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.commandBufferCount = 1,
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};
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result = vk_common_AllocateCommandBuffers(radv_device_to_handle(device), &alloc_info, pcmdbuf);
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simple_mtx_unlock(&device->sqtt_command_pool_mtx);
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return result;
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}
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void
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radv_sqtt_free_cmdbuf(struct radv_device *device, enum radv_queue_family queue_family, VkCommandBuffer cmdbuf)
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{
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VkCommandPool command_pool = vk_command_pool_to_handle(device->sqtt_command_pool[queue_family]);
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simple_mtx_lock(&device->sqtt_command_pool_mtx);
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vk_common_FreeCommandBuffers(radv_device_to_handle(device), command_pool, 1, &cmdbuf);
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simple_mtx_unlock(&device->sqtt_command_pool_mtx);
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}
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VkResult
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radv_sqtt_get_timed_cmdbuf(struct radv_queue *queue, struct radeon_winsys_bo *timestamp_bo, uint32_t timestamp_offset,
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VkPipelineStageFlags2 timestamp_stage, VkCommandBuffer *pcmdbuf)
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@ -773,18 +811,9 @@ radv_sqtt_get_timed_cmdbuf(struct radv_queue *queue, struct radeon_winsys_bo *ti
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assert(queue_family == RADV_QUEUE_GENERAL || queue_family == RADV_QUEUE_COMPUTE);
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simple_mtx_lock(&device->sqtt_command_pool_mtx);
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const VkCommandBufferAllocateInfo alloc_info = {
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.sType = VK_STRUCTURE_TYPE_COMMAND_BUFFER_ALLOCATE_INFO,
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.commandPool = vk_command_pool_to_handle(device->sqtt_command_pool[queue_family]),
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.level = VK_COMMAND_BUFFER_LEVEL_PRIMARY,
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.commandBufferCount = 1,
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};
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result = vk_common_AllocateCommandBuffers(radv_device_to_handle(device), &alloc_info, &cmdbuf);
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result = radv_sqtt_allocate_cmdbuf(device, queue_family, &cmdbuf);
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if (result != VK_SUCCESS)
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goto fail;
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return result;
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const VkCommandBufferBeginInfo begin_info = {
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.sType = VK_STRUCTURE_TYPE_COMMAND_BUFFER_BEGIN_INFO,
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@ -793,7 +822,7 @@ radv_sqtt_get_timed_cmdbuf(struct radv_queue *queue, struct radeon_winsys_bo *ti
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result = radv_BeginCommandBuffer(cmdbuf, &begin_info);
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if (result != VK_SUCCESS)
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goto fail;
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return result;
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struct radv_cmd_buffer *cmd_buffer = radv_cmd_buffer_from_handle(cmdbuf);
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struct radv_cmd_stream *cs = cmd_buffer->cs;
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@ -808,11 +837,9 @@ radv_sqtt_get_timed_cmdbuf(struct radv_queue *queue, struct radeon_winsys_bo *ti
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result = radv_EndCommandBuffer(cmdbuf);
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if (result != VK_SUCCESS)
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goto fail;
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return result;
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*pcmdbuf = cmdbuf;
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fail:
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simple_mtx_unlock(&device->sqtt_command_pool_mtx);
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return result;
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}
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@ -82,6 +82,11 @@ void radv_reset_sqtt_trace(struct radv_device *device);
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bool radv_sqtt_sample_clocks(struct radv_device *device);
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VkResult radv_sqtt_allocate_cmdbuf(struct radv_device *device, enum radv_queue_family queue_family,
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VkCommandBuffer *pcmdbuf);
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void radv_sqtt_free_cmdbuf(struct radv_device *device, enum radv_queue_family queue_family, VkCommandBuffer cmdbuf);
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VkResult radv_sqtt_get_timed_cmdbuf(struct radv_queue *queue, struct radeon_winsys_bo *timestamp_bo,
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uint32_t timestamp_offset, VkPipelineStageFlags2 timestamp_stage,
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VkCommandBuffer *pcmdbuf);
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