Commit graph

17998 commits

Author SHA1 Message Date
Samuel Pitoiset
36879c4f99 radv: fix indexing with variable descriptor count
The Vulkan spec says:
    "If bindingCount is zero or if this structure is not included in
     the pNext chain, the VkDescriptorBindingFlags for each descriptor
     set layout binding is considered to be zero. Otherwise, the
     descriptor set layout binding at
     VkDescriptorSetLayoutCreateInfo::pBindings[i] uses the flags in
     pBindingFlags[i]."

Fixes recent VKCTS dEQP-VK.api.maintenance3_check.*.

Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/13503
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36044>
2025-07-11 06:04:40 +00:00
Samuel Pitoiset
01fccec1dc ac/descriptors,radv: move the nbc view param to the gfx10 union
This is only GFX10+.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36043>
2025-07-11 05:46:50 +00:00
Samuel Pitoiset
36e4b52e9f radv: do not perform a per-pixel copy for BCn formats with mips on GFX12+
This is unnecessary because GFX12 isn't affected by this clamping issue
when NO_EDGE_CLAMP is correctly configured.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36043>
2025-07-11 05:46:50 +00:00
Qiang Yu
88c79a13b9 ac,radv: move nir_load_ring_mesh_scratch_offset_amd to ac
Some checks are pending
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To be shared with radeonsi.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35931>
2025-07-11 02:25:51 +00:00
Qiang Yu
5ddbd8c83b ac,radv: move mesh scratch ring constants to ac
To be shared with radeonsi.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35931>
2025-07-11 02:25:51 +00:00
Qiang Yu
78fed5fc13 ac,radv: move nir_load_task_ring_entry_amd to ac
To be shared with radeonsi.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35931>
2025-07-11 02:25:51 +00:00
Qiang Yu
1dbe7b65a1 radv: change mesh shader gs_vgpr_comp_cnt for gfx11
It should always be 0, but now it's set to be 1 when gfx11
which allocate one unused VGPR.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35931>
2025-07-11 02:25:51 +00:00
Qiang Yu
79ecca962a ac: parse ib for mesh shader dispatch packets
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35931>
2025-07-11 02:25:51 +00:00
Qiang Yu
d9df597042 ac,radv: move mesh_fast_launch_2 to ac
To be shared with radeonsi.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35931>
2025-07-11 02:25:51 +00:00
Marek Olšák
3bc31c307f ac/nir: fix indexing GS inputs with non-constant vertex index on gfx9-11
This hasn't been reproducible because RADV and GLSL always lower
non-constant slot and vertex indexing of GS inputs, but we'll stop
lowering it.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36018>
2025-07-10 16:37:45 +00:00
Georg Lehmann
d45f375a9d aco: only insert fp mode when needed
Some checks are pending
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Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35746>
2025-07-10 13:48:50 +00:00
Georg Lehmann
46c1bd1147 aco: add a dedicated pass for better float MODE insertion
Foz-DB Navi48:
Totals from 14 (0.02% of 80251) affected shaders:
Instrs: 13998 -> 11684 (-16.53%)
CodeSize: 104464 -> 86260 (-17.43%)
Latency: 108722 -> 106667 (-1.89%)
InvThroughput: 100332 -> 100324 (-0.01%)
VClause: 621 -> 595 (-4.19%); split: -4.99%, +0.81%
VALU: 6875 -> 6871 (-0.06%)
SALU: 3256 -> 1015 (-68.83%)
VOPD: 1328 -> 1332 (+0.30%)

Removes the s_setreg spam in FSR4.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35746>
2025-07-10 13:48:50 +00:00
Stéphane Cerveau
c6e2527ea1 vulkan: radv: set quality level properties
Set values for VkVideoEncodeQualityLevelPropertiesKHR
and its child value such as VkVideoEncodeH264QualityLevelPropertiesKHR
, VkVideoEncodeH265QualityLevelPropertiesKHR and
VkVideoEncodeAV1QualityLevelPropertiesKHR.

Reviewed-by: David Rosca <david.rosca@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35767>
2025-07-10 12:51:57 +00:00
Samuel Pitoiset
a0ce9fec62 radv: pass a dgc_cmdbuf parameter to more functions
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36028>
2025-07-10 12:21:00 +00:00
Samuel Pitoiset
04094d9d0f radv: remove unused parameter in build_dgc_buffer_preamble()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36028>
2025-07-10 12:21:00 +00:00
Samuel Pitoiset
231f2e4034 radv: add a helper to emit padding with DGC cmdbuf
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36028>
2025-07-10 12:21:00 +00:00
Samuel Pitoiset
79ab85815b radv: add helpers to emit one DGC sequence
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36028>
2025-07-10 12:20:59 +00:00
Samuel Pitoiset
7c3c41c670 radv: add a helper to emit INDIRECT_BUFFER in DGC
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36028>
2025-07-10 12:20:58 +00:00
Georg Lehmann
cac60c39a9 radv/nir/lower_cmat: use explicit shift when calculating gfx12 wave64 layout
Some checks are pending
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The rest of the compiler stack doesn't understand the alignment implications
of the combined shift.

Effect on llama.cpp fossils:
Totals from 3 (13.64% of 22) affected shaders:
Instrs: 5778 -> 5684 (-1.63%)
CodeSize: 33540 -> 32800 (-2.21%)
VGPRs: 228 -> 216 (-5.26%)
Latency: 39942 -> 39417 (-1.31%)
InvThroughput: 12037 -> 11862 (-1.45%)
VALU: 2162 -> 2111 (-2.36%)

More importantly, this replaces some ds_load_2addr_b32 with ds_load_b64.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/13447
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36016>
2025-07-10 07:11:23 +00:00
Yiwei Zhang
825c05a7e8 radv: adopt wsi_common_get_memory
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35875>
2025-07-09 23:45:03 +00:00
Daniel Schürmann
610a19cf31 aco/isel: allow to select SGPR defs for vectorized bcsel and logical operations
Some checks are pending
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No fossil changes.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35784>
2025-07-09 14:10:37 +00:00
Daniel Schürmann
d7477111d2 aco: split vectorized bcsel and bitwise logic VGPR definitions
This has a slightly negative effect on parallel-rdp, but positively affects FSR4.

Totals from 14 (0.02% of 79839) affected shaders: (Navi48)

Instrs: 63543 -> 63646 (+0.16%); split: -0.01%, +0.17%
CodeSize: 352888 -> 353608 (+0.20%); split: -0.02%, +0.23%
Latency: 1822354 -> 1825036 (+0.15%)
InvThroughput: 364683 -> 365738 (+0.29%); split: -0.04%, +0.32%
Copies: 9299 -> 9363 (+0.69%); split: -0.11%, +0.80%
PreVGPRs: 1381 -> 1394 (+0.94%)
VALU: 34511 -> 34575 (+0.19%); split: -0.03%, +0.21%
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35784>
2025-07-09 14:10:36 +00:00
Daniel Schürmann
4671e5f20d radv: vectorize some integer arithmetic and bcsel with scalar condition
Totals from 106 (0.13% of 79839) affected shaders: (Navi48)

Instrs: 131026 -> 130042 (-0.75%); split: -0.82%, +0.07%
CodeSize: 719120 -> 711516 (-1.06%); split: -1.20%, +0.14%
VGPRs: 5244 -> 5232 (-0.23%)
Latency: 2020748 -> 2004602 (-0.80%); split: -0.81%, +0.01%
InvThroughput: 393330 -> 385414 (-2.01%); split: -2.01%, +0.00%
VClause: 2193 -> 2192 (-0.05%)
Copies: 13963 -> 13558 (-2.90%); split: -2.91%, +0.01%
PreVGPRs: 2953 -> 2921 (-1.08%)
VALU: 65595 -> 64835 (-1.16%); split: -1.16%, +0.00%
SALU: 26887 -> 26611 (-1.03%)
VMEM: 2921 -> 3005 (+2.88%)
VOPD: 168 -> 173 (+2.98%)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35784>
2025-07-09 14:10:36 +00:00
Daniel Schürmann
764ee3a834 radv: don't lower subdword phis to scalar
Totals from 193 (0.24% of 79839) affected shaders: (Navi48)

MaxWaves: 6004 -> 6024 (+0.33%)
Instrs: 169276 -> 166784 (-1.47%); split: -3.01%, +1.53%
CodeSize: 940608 -> 915768 (-2.64%); split: -4.29%, +1.64%
VGPRs: 8012 -> 7716 (-3.69%); split: -3.99%, +0.30%
SpillVGPRs: 185 -> 0 (-inf%)
Scratch: 13568 -> 0 (-inf%)
Latency: 2159787 -> 2147084 (-0.59%); split: -2.86%, +2.28%
InvThroughput: 664022 -> 395859 (-40.38%); split: -42.59%, +2.21%
VClause: 2998 -> 2880 (-3.94%); split: -4.27%, +0.33%
SClause: 3117 -> 3120 (+0.10%)
Copies: 21290 -> 16278 (-23.54%); split: -24.74%, +1.20%
Branches: 4757 -> 4760 (+0.06%); split: -0.34%, +0.40%
PreSGPRs: 7369 -> 7378 (+0.12%); split: -0.11%, +0.23%
PreVGPRs: 4257 -> 3859 (-9.35%); split: -9.94%, +0.59%
VALU: 83173 -> 79804 (-4.05%); split: -5.68%, +1.63%
SALU: 36672 -> 37318 (+1.76%); split: -0.02%, +1.78%
VMEM: 4012 -> 3762 (-6.23%); split: -6.83%, +0.60%
SMEM: 4300 -> 4303 (+0.07%)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35784>
2025-07-09 14:10:36 +00:00
Daniel Schürmann
fc2fcac04e aco: allow vectorized nir_op_mov
nir_lower_phis_to_scalar() can create these with the next commit.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35784>
2025-07-09 14:10:36 +00:00
Daniel Schürmann
3f35b1329e aco: allow subdword vector-definitions on some VALU instructions
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35784>
2025-07-09 14:10:36 +00:00
Daniel Schürmann
025306a95d aco/isel: refactor emission of bitwise logical operations
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35784>
2025-07-09 14:10:36 +00:00
Georg Lehmann
9e8ba10447 aco/vn: remove dead instructions early
Dead p_create_vector/p_split_vector left behind by instruction selection slow down
the other passes and negatively affect extract labels in aco_optimizer.

Foz-DB GFX1201:
Totals from 964 (1.20% of 80251) affected shaders:
MaxWaves: 29206 -> 29030 (-0.60%); split: +0.08%, -0.68%
Instrs: 669369 -> 668842 (-0.08%); split: -0.16%, +0.09%
CodeSize: 3385192 -> 3383216 (-0.06%); split: -0.13%, +0.07%
VGPRs: 46788 -> 46848 (+0.13%); split: -0.85%, +0.97%
Latency: 3985660 -> 3892742 (-2.33%); split: -2.54%, +0.21%
InvThroughput: 538296 -> 536761 (-0.29%); split: -0.38%, +0.10%
VClause: 8336 -> 8418 (+0.98%); split: -0.17%, +1.15%
SClause: 17111 -> 17120 (+0.05%); split: -0.20%, +0.25%
Copies: 44393 -> 44239 (-0.35%); split: -1.25%, +0.91%
PreSGPRs: 45417 -> 45419 (+0.00%)
PreVGPRs: 30401 -> 31644 (+4.09%); split: -0.00%, +4.09%
VALU: 348282 -> 348167 (-0.03%); split: -0.15%, +0.12%
SALU: 121454 -> 121410 (-0.04%); split: -0.04%, +0.01%

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35825>
2025-07-09 07:23:09 +00:00
Georg Lehmann
82af226690 aco: remove unused swap_srcs from emit_vop3p_instruction
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35825>
2025-07-09 07:23:09 +00:00
Georg Lehmann
96793fb0c1 aco/isel: implement 16bit vec2 shifts
The source bit size mismatch is a bit annoying, but it's still worth it to
vectorize these.

Foz-DB Navi48:
Totals from 85 (0.11% of 80251) affected shaders:
Instrs: 119073 -> 118827 (-0.21%); split: -0.21%, +0.00%
CodeSize: 669604 -> 667552 (-0.31%); split: -0.31%, +0.00%
VGPRs: 4796 -> 4736 (-1.25%)
Latency: 1907685 -> 1901983 (-0.30%); split: -0.32%, +0.02%
InvThroughput: 642603 -> 640680 (-0.30%); split: -0.33%, +0.03%
VClause: 2088 -> 2091 (+0.14%)
Copies: 18300 -> 18394 (+0.51%); split: -0.01%, +0.52%
Branches: 3452 -> 3440 (-0.35%)
VALU: 63378 -> 63144 (-0.37%); split: -0.37%, +0.00%
SALU: 23065 -> 23076 (+0.05%); split: -0.00%, +0.05%

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35825>
2025-07-09 07:23:08 +00:00
Konstantin Seurer
4e258f8579 radv/rra/gfx10_3: Fix acceleration structure addresses
RRA adds rra_accel_struct_chunk_header::header_offset to the address so we need to subtract it.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35985>
2025-07-09 07:04:37 +00:00
Yiwei Zhang
fb77881262 radv: use AHARDWAREBUFFER_USAGE_CAMERA_MASK
Now AHB header has it defined.

Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35785>
2025-07-09 03:47:06 +00:00
Yiwei Zhang
0d33739216 radv: use common ANB swapchain gralloc usage query
The additional usage bits added for rgba8 and rgb565 are not needed as
those are conditionally added based on the consumer side of the Android
surface (e.g. display, encoder, etc).

Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35785>
2025-07-09 03:47:06 +00:00
Daniel Schürmann
2c51a8870d nir: add nir_vectorize_cb callback parameter to nir_lower_phis_to_scalar()
Some checks are pending
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Similar to nir_lower_alu_width(), the callback can return the
desired number of components for a phi, or 0 for no lowering.

The previous behavior of nir_lower_phis_to_scalar() with lower_all=true
can be elicited via nir_lower_all_phis_to_scalar() while the previous
behavior with lower_all=false now corresponds to nir_lower_phis_to_scalar()
with NULL callback.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Mel Henning <mhenning@darkrefraction.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35783>
2025-07-08 15:33:59 +00:00
jesse.zhang
56d758d321 amd: Add user queue HQD count to hw_ip info
Add a new field userq_num_hqds to drm_amdgpu_info_hw_ip to expose the
number of available hardware queue descriptors (HQDs) for user queues.
This allows userspace to query the maximum number of user queues that
can be created for a particular IP block.

the patch link in driver side:
https://lists.freedesktop.org/archives/amd-gfx/2025-June/126686.html

v2: we should also put userq_num_hqds into radeon_info and
print it where other fields are printed. (Marek Olšák)

v3: rename num_userqs to num_queue_slots
    and add print log in ac_print_gpu_info. (Marek Olšák)
v4: rename userq_num_hqds to userq_num_slots in hw_ip_info,
    and update the hw information (Marek Olšák)

Signed-off-by: Jesse Zhang <Jesse.Zhang@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35850>
2025-07-08 10:17:51 +00:00
Autumn Ashton
1ceded0c83 radv: Fix handling of NULL pColorAttachmentLocations in vkCmdSetRenderingAttachmentLocations
Some checks are pending
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From the Vulkan spec:
`If pColorAttachmentLocations is NULL, it is
equivalent to setting each element to its index
within the array.`

Use similar logic to what we do in
CmdSetRenderingInputAttachmentIndices to handle
this behaviour properly.

Signed-off-by: Autumn Ashton <misyl@froggi.es>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35948>
2025-07-08 02:32:56 +00:00
Rhys Perry
34f1a8f707 aco: handle FPAtomicToDenormModeHazard
Some checks are pending
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This is quite unlikely to happen, but I guess it might be possible and
it's relatively simple to work around.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35884>
2025-07-07 13:02:43 +00:00
Marek Olšák
b31f73a1b1 ac/nir: use u_foreach_bit more
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35345>
2025-07-07 11:41:57 +00:00
Marek Olšák
896dd9bc93 ac/nir: eliminate sample_id/sample_pos if MSAA is disabled
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35345>
2025-07-07 11:41:57 +00:00
Marek Olšák
1c2007005e ac/nir: rename force_center_interp_no_msaa to msaa_disabled
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35345>
2025-07-07 11:41:57 +00:00
Wolf480pl
62b3fd0a5e radv/virtio: don't leak drm FD when using vpipe
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The fd in radv_physical_device_try_create is one we opened in that function.
We don't need it when vpipe is in use, so we should close it,
before setting it to -1.

Fixes: 999d5098b4 ("radv/virtio: support vpipe")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35947>
2025-07-07 09:51:15 +00:00
Alyssa Rosenzweig
d31cb824df treewide: use VARYING_BIT_*
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Via Coccinelle patch generated by the following Python:

  varys = [ "POS", "COL0", "COL1", "FOGC", "TEX0", "TEX1", "TEX2", "TEX3", "TEX4",
           "TEX5", "TEX6", "TEX7", "PSIZ", "BFC0", "BFC1", "EDGE", "CLIP_VERTEX",
           "CLIP_DIST0", "CLIP_DIST1", "CULL_DIST0", "CULL_DIST1", "PRIMITIVE_ID",
           "PRIMITIVE_COUNT", "LAYER", "VIEWPORT", "FACE",
           "PRIMITIVE_SHADING_RATE", "PNTC", "TESS_LEVEL_OUTER",
           "TESS_LEVEL_INNER", "PRIMITIVE_INDICES", "BOUNDING_BOX0",
           "BOUNDING_BOX1", "VIEWPORT_MASK", "CULL_PRIMITIVE" ]
  t = """
  @@
  @@

  -(1 << VARYING_SLOT_${V})
  +VARYING_BIT_${V}

  @@
  @@

  -BITFIELD_BIT(VARYING_SLOT_${V})
  +VARYING_BIT_${V}

  @@
  @@

  -(1ull << VARYING_SLOT_${V})
  +VARYING_BIT_${V}

  @@
  @@

  -BITFIELD64_BIT(VARYING_SLOT_${V})
  +VARYING_BIT_${V}

  """
  for v in varys:
      from mako.template import Template
      print(Template(t).render(V = v))

Closes: #13453
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Reviewed-by: Marek Olšák <maraeo@gmail.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com> [panfrost, common]
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com> [broadcom]
Reviewed-by: Corentin Noël <corentin.noel@collabora.com> [virgl]
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com> [zink]
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35917>
2025-07-04 19:01:04 +00:00
Pierre-Eric Pelloux-Prayer
fab2c9a923 ac: fix invalid array size
Reported by static analysis.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35877>
2025-07-04 15:26:38 +00:00
Pierre-Eric Pelloux-Prayer
6e371f0a8a ac: fix potential overflows
Reported by static analysis. Multiplication may overflow
before being converted to the larger type, so fix this
by casting one of the operands to the destination type.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35877>
2025-07-04 15:26:38 +00:00
Samuel Pitoiset
2af3ef9305 ac/surface: select a different swizzle mode for ASTC formats on GFX12
It seems only 4KiB swizzle works fine with ASTC.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34877>
2025-07-03 15:31:04 +00:00
Samuel Pitoiset
cb6f2d9409 ac/surface: use align with NPOT for estimating surface size
Some checks are pending
macOS-CI / macOS-CI (dri) (push) Waiting to run
macOS-CI / macOS-CI (xlib) (push) Waiting to run
ac_estimate_size() triggers an assertion because the block size isn't
aligned to a power of two for ASTC formats.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35879>
2025-07-03 08:02:17 +00:00
Marek Olšák
028591aead ac/nir: remove kill_pointsize and kill_layer options from lowering passes
The outputs are removed by a separate pass.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35352>
2025-07-02 20:27:46 +00:00
Marek Olšák
42ad7543b8 ac/nir: switch legacy GS lowering to ac_nir_prerast_out completely
This changes legacy GS outputs to use the same logic as NGG GS.
It enables the same optimizations that NGG has such as forwarding
constant GS output components to the GS copy shader at compile time.

ac_nir_gs_output_info is removed.

GS output info is no longer passed to ac_nir_lower_legacy_gs and
ac_nir_create_gs_copy_shader separately.

ac_nir_lower_legacy_gs now gathers ac_nir_prerast_out, generates GSVS ring
stores, and also generates the GS copy shader with GSVS ring loads.

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35352>
2025-07-02 20:27:45 +00:00
Marek Olšák
723ce13f90 ac/nir: move gs_output_component_mask_with_stream to prerast utils
Legacy GS will use it.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35352>
2025-07-02 20:27:45 +00:00
Marek Olšák
2c64cdc047 ac/nir: return the GS copy shader from ac_nir_lower_legacy_gs
This way we won't have to pass output info between the two functions.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35352>
2025-07-02 20:27:44 +00:00