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Author SHA1 Message Date
Marek Olšák
35adf91de7 ac/surface: limit the number of swizzle modes that can have displayable DCC 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10003>
 2021-04-13 03:17:42 +00:00
Marek Olšák
5ce8c440dd ac/surface: add a test of DccAddrFromCoord prototype outside of addrlib 
The test takes over 2 minutes on a 12C/24T CPU with OpenMP.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10003>
 2021-04-13 03:17:42 +00:00
Marek Olšák
df2cbdd2e3 amd/addrlib: expose DCC address equations to drivers 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10003>
 2021-04-13 03:17:42 +00:00
Marek Olšák
8771d45a74 ac/surface/tests: fix a random segfault in the modifier test 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10003>
 2021-04-13 03:17:42 +00:00
Marek Olšák
23b2cf032a ac/surface/tests: test Sienna Cichlid and Navy Flounder 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10003>
 2021-04-13 03:17:42 +00:00
Marek Olšák
1b3dbde3b9 ac/surface: only apply the 3D swizzle mode tuning to gfx10+ 
This fixes an addrlib failure on gfx9.

Fixes: b43f40166c "ac/surface: select best swizzle mode for 3D sampler performance"

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10003>
 2021-04-13 03:17:42 +00:00
James Park
f3bd5f9590 amd: Hide drm_fourcc.h on Windows 
Declare missing definitions instead.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9708>
 2021-04-13 00:24:02 +00:00
James Park
7dfc9e4431 amd: Hide amdgpu_drm.h on Windows 
Declare missing definitions instead.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9708>
 2021-04-13 00:24:02 +00:00
James Park
1aeebac4e6 ac/rgp: BSD elf library compatibility 
Allow compilation on Windows using modified BSD elf library.

Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9210>
 2021-04-12 22:50:52 +00:00
Marek Olšák
faf10bd49d ac/surface: use named "color and "zs" structures in unions 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10083>
 2021-04-12 20:53:45 +00:00
Marek Olšák
468836317b ac/surface: unify htile_* and dcc_* fields as meta_* fields 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10083>
 2021-04-12 20:53:45 +00:00
Marek Olšák
34fd07aa56 ac/surface: unify htile_levels and dcc_levels as meta_levels 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10083>
 2021-04-12 20:53:45 +00:00
Marek Olšák
b16c7b706f ac/surface: pack radeon_surf better 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10083>
 2021-04-12 20:53:45 +00:00
Marek Olšák
988f148db3 ac/surface: overlap color and Z/S fields using a union in gfx9_surf_layout 
to save space

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10083>
 2021-04-12 20:53:45 +00:00
Marek Olšák
ab00557685 ac/surface: pack alignments by storing log2 in radeon_surf 
Only one bit is set in alignments, so store the bit offset (log2) and
change the type from uint32_t to uint8_t.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10083>
 2021-04-12 20:53:45 +00:00
Marek Olšák
cb016bb600 ac/surface: pack radeon_surf::num_htile_levels better 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10083>
 2021-04-12 20:53:45 +00:00
Marek Olšák
8837d1d833 ac/surface: pack gfx9_surf_layout:resource_type better to save 8 bytes 
Yes, this saves 8 bytes. See pahole for yourself.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10083>
 2021-04-12 20:53:45 +00:00
Marek Olšák
4bd5f62966 ac/surface: pack gfx9_surf_meta_flags better 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10083>
 2021-04-12 20:53:45 +00:00
Marek Olšák
3f074d2f45 ac/surface: inline and reorder gfx9_surf_flags for better packing 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10083>
 2021-04-12 20:53:45 +00:00
Marek Olšák
48dbdc62bf ac/surface: change legacy_surf_level::offset to 32-bit offset_256B shifted by 8 
Images are always aligned to 256B (enforced by register and descriptor
fields) and limited to 40-bit addresses. This saves some space.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10083>
 2021-04-12 20:53:45 +00:00
Marek Olšák
bbda20bf29 ac/surface: overlap color and Z/S fields using a union in legacy_surf_layout 
to save space

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10083>
 2021-04-12 20:53:45 +00:00
Marek Olšák
2fd8018845 ac/surface: split dcc level info from surface_info to save space 
stencil level info doesn't have DCC

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10083>
 2021-04-12 20:53:45 +00:00
Leo Liu
75a725e4c5 ac: add function for querying video capabilities 
It will be used to query caps of decode and encode
for hardware AMDGPU supports

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10095>
 2021-04-12 17:33:32 +00:00
Rhys Perry
723b000d27 radv: don't use fp16 for 8-bit division lowering before GFX9 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10081>
 2021-04-12 16:19:46 +00:00
Rhys Perry
d8f12fd421 aco: fix 16-bit f2{u8,i8} on GFX6/7 
Not really tested.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Tony Wasserka <tony.wasserka@gmx.de>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10081>
 2021-04-12 16:19:46 +00:00
Rhys Perry
d0e15b8c22 aco: fix 16-bit u2f32 
This shouldn't sign-extend.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Tony Wasserka <tony.wasserka@gmx.de>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10081>
 2021-04-12 16:19:46 +00:00
Rhys Perry
a2619b97f5 nir/lower_idiv: add options to use fp32 for 8-bit division lowering 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10081>
 2021-04-12 16:19:46 +00:00
Rhys Perry
7db8d307bc radv: remove second nir_lower_idiv 
nir_lower_idiv now lowers 8/16-bit divisions.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10081>
 2021-04-12 16:19:45 +00:00
Bas Nieuwenhuizen
fcd8aaf07a radv: Update editorconfig. 
Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10091>
 2021-04-10 03:31:58 +02:00
Bas Nieuwenhuizen
59c501ca35 radv: Format. 
Using

find ./src/amd/vulkan -regex '.*/.*\.\(c\|h\|cpp\)' | xargs -P8 -n1 clang-format --style=file -i

Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10091>
 2021-04-10 03:31:58 +02:00
Bas Nieuwenhuizen
8451b41022 radv: Add clang-format for AMD code. 
Copied from https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8883
with increased colum width as 80 really made a mess.

Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10091>
 2021-04-10 03:31:32 +02:00
Samuel Pitoiset
1ad295ed6f radv: allow to force VRS rates on GFX10.3 with RADV_FORCE_VRS 
This allows to force the VRS rates via RADV_FORCE_VRS, the supported
values are 2x2, 1x2 and 2x1. This supports the primitive shading rate
mode for non GUI elements.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7794>
 2021-04-09 14:47:53 +02:00
Samuel Pitoiset
549f41754a radv: use explicit VRS mode when configuring PA_CL_VRS_CNTL 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7794>
 2021-04-09 14:47:52 +02:00
Samuel Pitoiset
b4a66b29cd radv: add MSAA support to CopyImage() on compute queue 
CopyImage supports copying MSAA images if the number of samples match.
Found by inspection because this is untested by CTS for some reasons.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10055>
 2021-04-09 07:05:24 +00:00
Samuel Pitoiset
4caf19eb7d radv: do not clamp framebuffer dimensions to the minimum dimension 
This shouldn't be needed and this is going to be wrong with VRS
attachments because dimensions are divided by the VRS texel size.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10111>
 2021-04-09 08:32:05 +02:00
Bas Nieuwenhuizen
8b9033ad0a radv: Support DCC modifiers fully. 
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9998>
 2021-04-08 22:29:12 +00:00
Bas Nieuwenhuizen
6ff88a823b radv: Add retiling for foreign queues. 
This way modifier images that don't go through the present layout
get the retile executed properly.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9998>
 2021-04-08 22:29:12 +00:00
Bas Nieuwenhuizen
dece117fdc radv: Support DCC without DCC/FCE predicates. 
Imported images can't have this as part of the associated memory.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9998>
 2021-04-08 22:29:12 +00:00
Bas Nieuwenhuizen
b61efd53b4 radv: Support DCC without a fast clear value. 
For imported images we can't have one in the associated memory.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9998>
 2021-04-08 22:29:12 +00:00
Samuel Pitoiset
63772f3ca5 radv: add MSAA support to ClearColorImage() on compute queue 
Found by inspection.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10070>
 2021-04-08 17:42:15 +00:00
Bas Nieuwenhuizen
580f1ac473 nir: Extract shader_info->cs.shared_size out of union. 
It is valid for all stages, just 0 for most of them. In particular
mesh/task shaders might be using it.

Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10094>
 2021-04-08 14:39:28 +00:00
Chad Versace
5e6db19168 anv: Remove vkCreateDmaBufINTEL (v4) 
Superceded by VK_EXT_image_drm_format_modifier.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> (v1)
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net> (v4)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1466>
 2021-04-08 14:15:55 +00:00
Chad Versace
0845cabc72 vulkan: Track dependencies of Python imports 
The meson.build was unaware of transitive dependencies introduced by
Python imports.

Android still needs fixing. But I did not update the Android files lest
I break the build.

Ideally, we would fix this by using a Python runner that generates
a depfile, similar to how meson creates depfiles for C files by passing
flags -MD -MQ -MF to gcc. But this patch gets the job done, without
stalling on the ideal general solution, by manually tracking the Python
imports in new 'foo_depend_files' variables.

CC: mesa-stable@lists.freedesktop.org
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1466>
 2021-04-08 14:15:54 +00:00
Rhys Perry
961361cdc9 aco: ensure loops nested in a WQM loop are in WQM 
Fixes a potential empty exec mask in this situation:
enter_wqm()
loop {
   ... wqm code ...
   enter_exact()
   loop {
      ... no wqm code ...
   }
}

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Fixes: f0074a6f05 ("aco: do not flag all blocks WQM to ensure we enter all nested loops in WQM")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4546
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10075>
 2021-04-08 09:56:25 +00:00
Samuel Pitoiset
9a3d496398 radv: make sure FMASK decompress and FCE are performed on gfx queue 
To catch possible transition failures.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10056>
 2021-04-08 08:21:40 +02:00
Samuel Pitoiset
da166f648f radv: enable DCC for concurrent images on GFX10 
The driver now supports DCC stores on GFX10 that means that we can
keep DCC compressed on all layouts/queues.

This should help games which use aync compute or which declare
all images as concurrent like Youngblood.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9850>
 2021-04-07 18:33:34 +00:00
Samuel Pitoiset
37d48de83e radv: simplify a check when enabling DCC for concurrent images 
If the image is marked as concurrent, each element of
pQueueFamilyIndices must be unique, so queue_family_mask is
different than 1.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9850>
 2021-04-07 18:33:34 +00:00
Samuel Pitoiset
d4db68b338 radv: enable DCC stores with MSAA 4x/8x on GFX10+ 
Should work now.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10052>
 2021-04-07 17:13:51 +00:00
Samuel Pitoiset
f280367a27 radv: perform MSAA color decompression for storage images with DCC 
For MSAA storage images with DCC, we also need to perform a MSAA
color decompression.

Fixes dEQP-VK.pipeline.multisample.storage_image.* if DCC stores
is enabled.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9854>
 2021-04-07 15:35:07 +00:00
Rhys Perry
835c5b7ebf aco: fix integer tg4 workaround with unnormalized coordinates 
Same as LLVM from 2abf62d348.

fossil-db (GFX8):
Totals from 15 (0.01% of 147787) affected shaders:
VGPRs: 744 -> 748 (+0.54%)
CodeSize: 100472 -> 100732 (+0.26%)
Instrs: 19995 -> 20059 (+0.32%)
Latency: 1001530 -> 1001859 (+0.03%)
InvThroughput: 378508 -> 378747 (+0.06%)
SClause: 676 -> 675 (-0.15%)
Copies: 1655 -> 1654 (-0.06%)
PreSGPRs: 735 -> 742 (+0.95%)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10053>
 2021-04-07 15:21:51 +00:00