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205689 commits

Author SHA1 Message Date
Sil Vilerino
33f670d869 d3d12/meson: Add USE_D3D12_PREVIEW_HEADERS compiler flag based on dep_dxheaders.version()
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/13126

Reviewed-by: Pohsiang Hsu <pohhsu@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35057>
2025-05-19 11:32:17 -04:00
Konstantin Seurer
97f71420df radv/bvh: Fix comment
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Reviewed-by: Natalie Vock <natalie.vock@gmx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34938>
2025-05-19 14:08:33 +00:00
Konstantin Seurer
100616859e radv/bvh: Remove some unused variables
Reviewed-by: Natalie Vock <natalie.vock@gmx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34938>
2025-05-19 14:08:33 +00:00
Konstantin Seurer
f00b25331a radv/bvh: Make sure the AABB is written before internal_ready_count
Otherwise, the next stage can read garbage. Fixes flickering in The
Witcher 3.

Closes: #13145
Closes: #13196
Fixes: 2d48b2c ("radv: Use subgroup OPs for BVH updates on GFX12")
Reviewed-by: Natalie Vock <natalie.vock@gmx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34938>
2025-05-19 14:08:33 +00:00
Konstantin Seurer
f42d52f922 radv: Flush L2 on GFX12 when binding an update pipeline
This is just for completeness since the flush above is probably
sufficient.

Fixes: 2d48b2c ("radv: Use subgroup OPs for BVH updates on GFX12")
Reviewed-by: Natalie Vock <natalie.vock@gmx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34938>
2025-05-19 14:08:33 +00:00
Danylo Piliaiev
8dcf84451a tu: Use EARLY_Z when there is no depth/stencil tests
Mostly a cosmetic change to be in line with what prop driver is doing,
this way it's easier to compare them.

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34973>
2025-05-19 13:30:39 +00:00
Danylo Piliaiev
8f5d433840 tu: Occlusion query counting should happen after FS that kills
"EARLY_Z + discard" would yield incorrect occlusion query result,
since Vulkan expects occlusion query to happen after fragment shader.

See Vulkan spec "29. Fragment Operations".

Also see https://gitlab.khronos.org/Tracker/vk-gl-cts/-/issues/5713

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34973>
2025-05-19 13:30:39 +00:00
Danylo Piliaiev
b6cf0b68be tu: Use EARLY_Z_LATE_Z with alpha-to-coverage
Alpha-to-coverage behaves like a discard, so we can use EARLY_Z_LATE_Z
for it.

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34973>
2025-05-19 13:30:39 +00:00
Danylo Piliaiev
13e6dfb45f tu: Use EARLY_Z_LATE_Z even when LRZ is disabled
As previously documented, this mode either uses LRZ or early-z
(when LRZ is invalid).

Though it has some limitations, it's not compatible with:
- Lack of D/S attachment
- Stencil writes on stencil or depth test failure
- Per-sample shading

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34973>
2025-05-19 13:30:39 +00:00
Danylo Piliaiev
de6d111d73 freedreno/regs: A6XX_EARLY_LRZ_LATE_Z is really A6XX_EARLY_Z_LATE_Z
By observing prop driver and doing some tests this mode is about
both early_z and early lrz.

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34973>
2025-05-19 13:30:39 +00:00
Georg Lehmann
cd4c0bc58e aco: don't use constant_bits when not applying constants
This is incorrect for 16bit integer operands.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35020>
2025-05-19 13:05:48 +00:00
Georg Lehmann
f98d20fec6 aco: replace get_operand_size with get_operand_type
To not use constant_bits everywhere.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35020>
2025-05-19 13:05:48 +00:00
Georg Lehmann
e1b35a2721 aco/optimizer: only use get_operand_size for alu
It's only used once for pseudo instructions anyway, and that's trivial.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35020>
2025-05-19 13:05:48 +00:00
Georg Lehmann
7d59bd399a aco/optimizer: optimize packed fneg with negative constant
We shouldn't rely on constant propagation always creating
positive 1.0 constants.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35020>
2025-05-19 13:05:48 +00:00
Georg Lehmann
fa3f207035 aco: swap operands without instructions
For future work.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35020>
2025-05-19 13:05:48 +00:00
Patrick Lerda
45133e0e91 radeon/evergreen: improve depth24_stencil8 mipmap behavior
This change is an update to 42be38a8fb. It fixes the remaining
depth24_stencil8 mipmap issues.

This change was tested with the test below modified to check for
every width and height between (1,1) and (143,143), the levels
are tested between 0 and 5.

This change was tested on r600 cypress, palm, barts and cayman.
Here are the tests fixed:
khr-gl(3[0-3]|4[0-5])/texture_repeat_mode/depth24_stencil8_11x131_1_clamp_to_edge: fail pass
khr-gl(3[0-3]|4[0-5])/texture_repeat_mode/depth24_stencil8_11x131_1_mirrored_repeat: fail pass
khr-gl(3[0-3]|4[0-5])/texture_repeat_mode/depth24_stencil8_11x131_1_repeat: fail pass
khr-gles3/texture_repeat_mode/depth24_stencil8_11x131_1_clamp_to_edge: fail pass
khr-gles3/texture_repeat_mode/depth24_stencil8_11x131_1_mirrored_repeat: fail pass
khr-gles3/texture_repeat_mode/depth24_stencil8_11x131_1_repeat: fail pass

Signed-off-by: Patrick Lerda <patrick9876@free.fr>
Acked-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34406>
2025-05-19 12:50:25 +00:00
Patrick Lerda
1186c73c6b r600: implement gs indirect load_per_vertex_input
This functionality is useful with the software fp64
implementation. It allows running the remaining
tests.

Note: the same tests do not generate this indirect
access on cayman which has the hardware fp64
implementation enabled.

This change was tested on cypress, palm and barts.
Here are the tests fixed:
spec/arb_gpu_shader_fp64/execution/gs-isnan-dvec: fail pass
spec/arb_gpu_shader_fp64/uniform_buffers/gs-array-copy: fail pass
spec/arb_gpu_shader_fp64/uniform_buffers/gs-dmat4: fail pass
spec/arb_gpu_shader_fp64/uniform_buffers/gs-dmat4-row-major: fail pass
spec/arb_gpu_shader_fp64/uniform_buffers/gs-double-array-const-index: fail pass
spec/arb_gpu_shader_fp64/uniform_buffers/gs-double-array-variable-index: fail pass
spec/arb_gpu_shader_fp64/uniform_buffers/gs-double-bool-double: fail pass
spec/arb_gpu_shader_fp64/uniform_buffers/gs-double-uniform-array-direct-indirect: fail pass
spec/arb_gpu_shader_fp64/uniform_buffers/gs-doubles-float-mixed: fail pass
spec/arb_gpu_shader_fp64/uniform_buffers/gs-dvec4-uniform-array-direct-indirect: fail pass
spec/arb_gpu_shader_fp64/uniform_buffers/gs-nested-struct: fail pass

Signed-off-by: Patrick Lerda <patrick9876@free.fr>
Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34926>
2025-05-19 12:07:37 +00:00
Patrick Lerda
8df9e3b2d0 r600: add a constant representing gs vertex indirect total
Signed-off-by: Patrick Lerda <patrick9876@free.fr>
Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34926>
2025-05-19 12:07:37 +00:00
Eric Engestrom
0a52d00393 ci: clear S3_JWT_FILE_SCRIPT as it also contains the S3_JWT
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This whole thing of dumping the env var in a file and unsetting it so
that it wouldn't be visible in an env dump anymore?  Yeah, we kinda
failed here 😅

Note: setting it to an empty string instead of unsetting it allows for
redundant `eval "$S3_JWT_FILE_SCRIPT"` calls without failing over an
unset variable.

Reported-by: @alatiera
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35050>
2025-05-19 11:16:59 +00:00
Danylo Piliaiev
701d26be9d tu: Fix state.lrz.force_late_z condition not being updated
It was accidentally made sticky when LRZ is disabled. That resulted
in a big perf regression in some games.

Fixes: 847ad80e03 ("tu/lrz: Consider FS depth layout when gl_FragDepth is written")

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35029>
2025-05-19 10:55:12 +00:00
Eric Engestrom
add5447483 vmware/ci: move jobs to nightly until farm is stabilized
Example of this job hanging/timing out in merge pipelines that
I personally saw in the last 24h (and right now is Monday morning):
- https://gitlab.freedesktop.org/mesa/mesa/-/jobs/76580719
- https://gitlab.freedesktop.org/mesa/mesa/-/jobs/76580721
- https://gitlab.freedesktop.org/mesa/mesa/-/jobs/76581000
- https://gitlab.freedesktop.org/mesa/mesa/-/jobs/76581063
- https://gitlab.freedesktop.org/mesa/mesa/-/jobs/76585062
- https://gitlab.freedesktop.org/mesa/mesa/-/jobs/76585063
- https://gitlab.freedesktop.org/mesa/mesa/-/jobs/76585109
- https://gitlab.freedesktop.org/mesa/mesa/-/jobs/76585110
- https://gitlab.freedesktop.org/mesa/mesa/-/jobs/76587835
- https://gitlab.freedesktop.org/mesa/mesa/-/jobs/76587836
- https://gitlab.freedesktop.org/mesa/mesa/-/jobs/76607117
- https://gitlab.freedesktop.org/mesa/mesa/-/jobs/76607118
- https://gitlab.freedesktop.org/mesa/mesa/-/jobs/76607119
- https://gitlab.freedesktop.org/mesa/mesa/-/jobs/76607120
- https://gitlab.freedesktop.org/mesa/mesa/-/jobs/76607687
- https://gitlab.freedesktop.org/mesa/mesa/-/jobs/76607688
- https://gitlab.freedesktop.org/mesa/mesa/-/jobs/76620657

That's a rather long list, so I'm merging this without waiting for your
feedback @blu, but please revert this commit once the issue has been
fixed :)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35048>
2025-05-19 10:36:27 +00:00
Mary Guillemard
9e6e7d9ee3 panfrost: Enable 2 sample count support on v12+
v12+ supports this, let's expose it.

Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com>
Reviewed-by: Eric R. Smith <eric.smith@collabora.com>
Reviewed-by: Olivia Lee <olivia.lee@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34997>
2025-05-19 10:13:49 +00:00
Mary Guillemard
37856eff06 panfrost: Use pan_sample_pattern in pan_cmdstream
We had a duplicate function there, let's use common code instead and
allow v4.

Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Eric R. Smith <eric.smith@collabora.com>
Reviewed-by: Olivia Lee <olivia.lee@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34997>
2025-05-19 10:13:49 +00:00
Mary Guillemard
4c0ce0c6f9 panvk: Enable VK_SAMPLE_COUNT_2_BIT support on v12+
v12+ supports this, let's expose it.

Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com>
Reviewed-by: Eric R. Smith <eric.smith@collabora.com>
Reviewed-by: Olivia Lee <olivia.lee@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34997>
2025-05-19 10:13:49 +00:00
Mary Guillemard
8e05222e1d pan/lib: Add support for rotated 2x grid sample pattern
Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com>
Reviewed-by: Eric R. Smith <eric.smith@collabora.com>
Reviewed-by: Olivia Lee <olivia.lee@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34997>
2025-05-19 10:13:49 +00:00
Timothy Arceri
c7c4905981 mesa: fix _FP32Buffers bitfield use
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Previously we were assuming that all color attachments were active.

Fixes: 070a5e5d92 ("mesa: add explicit enable for EXT_float_blend, and error condition")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35014>
2025-05-19 09:41:50 +00:00
Timothy Arceri
b7d8c195a2 mesa/st: fix _IsRGBDraw bitfield use
Previously we were assuming that all color attachments were active.

Fixes: 5b51d754d0 ("st/mesa: Optionally override RGB/RGBX dst alpha blend factors")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35014>
2025-05-19 09:41:50 +00:00
Timothy Arceri
c1d00c9a1a mesa/st: fix _BlendForceAlphaToOneDraw bitfield use
Previously we were assuming that all color attachments were active.

Fixes: 4f28e2827c ("mesa: fix blending when using luminance/intensity emulation")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35014>
2025-05-19 09:41:50 +00:00
Timothy Arceri
d04d9da98c st/mesa: fix _IntegerBuffers bitfield use
Previously we were assuming that all color attachments were active.

Fixes: 8fb966688b ("st/mesa: Disable blending for integer formats.")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/13168
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35014>
2025-05-19 09:41:50 +00:00
Eric Engestrom
fd8d8264e0 ci/ci-tron: replace crude dump of env vars with reproducible job script
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34962>
2025-05-19 11:04:32 +02:00
Samuel Pitoiset
fef1174b00 vulkan/runtime: fix a wrong assert that validates timeline semaphores
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It's still legal to include VkTimelineSemaphoreSubmitInfo in pNext
without any timeline semaphores. While we are at it, also fix the VUs.

This was observed with Doom The Dark Ages.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35022>
2025-05-19 07:22:23 +00:00
Lionel Landwerlin
c570740272 anv: enable preemption setting on command/batch correctly
The 2 helpers we're using for doing internal operations (copies,
command generation, etc...) can work on command buffers or lower level
batches.

When working with command buffers, the helpers should set the
preemption using genX(cmd_buffer_set_preemption) so that whatever
operation comes after toggles the state back to what it needs and we
minimize the toggles.

When working with batchs, the helpers should disable preemption using
genX(batch_set_preemption) and turn it back on when done.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35030>
2025-05-19 06:56:04 +00:00
Echo J
586ad02b9c subprojects: Don't use native option for rustc-hash dependency
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This should fix the 32-bit NVK build

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35037>
2025-05-18 13:56:34 +00:00
Echo J
4605592db2 subprojects: Don't ignore Meson wrappers in gitignore
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35037>
2025-05-18 13:56:34 +00:00
Alessandro Astone
84cae30f0a android: Link with libc++fs up to SDK 35
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Before SDK35 the c++ filesystem API was part of a standalone library

Reviewed-by: Mauro Rossi <issor.oruam@gmail.com>
Backport-to: 25.1
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34797>
2025-05-18 07:18:35 +00:00
llyyr
033ce1bae1 vulkan/wsi/wayland: make needs_color_surface_old check if surface exists
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Otherwise we end up removing refcount even when we don't have a color
surface already for applications going from SRGB_NONLINEAR to
PASS_THROUGH dring runtime.

To reproduce the bug, start mpv with "--target-colorspace-hint=yes" then
set it to "no" during runtime with a keybind

Fixes: 789507c99c ("vulkan/wsi: implement the Wayland color management protocol")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34708>
2025-05-17 08:01:57 +00:00
Jianxun Zhang
2212865ce0 anv: Use different PAT entries for compressed resources
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Displayable compressed resournces have a different PAT
entry from the non-displayable compressed.

Signed-off-by: Jianxun Zhang <jianxun.zhang@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29928>
2025-05-16 16:03:54 -07:00
Jianxun Zhang
6eeb079653 iris: New compressed heaps for scanout buffers (xe2)
Two new heaps are introduced to use a different PAT entry
for compressed buffers to display.

Signed-off-by: Jianxun Zhang <jianxun.zhang@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29928>
2025-05-16 16:03:54 -07:00
Jianxun Zhang
ca092db7ce intel/dev: Differentiate displayable PAT entry of compression (xe2)
We need two PAT entries with compression for displayable and
non-displayable compressed images. The current 'compressed' entry
is renamed to 'scanout_compressed' for the displayable.

Signed-off-by: Jianxun Zhang <jianxun.zhang@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29928>
2025-05-16 16:03:54 -07:00
Ian Romanick
37ee91679a nir/algebraic: Generalize an existing bfi(a, 0, ...) pattern
No shader-db changes on any Intel platform.

fossil-db:

All Intel platforms had similar results. (Lunar Lake shown)
Totals:
Instrs: 210561118 -> 210560921 (-0.00%)
Send messages: 10979615 -> 10979613 (-0.00%)
Cycle count: 31576352808 -> 31576347218 (-0.00%); split: -0.00%, +0.00%
Max live registers: 66068161 -> 66068157 (-0.00%)
Non SSA regs after NIR: 60230775 -> 60230949 (+0.00%)

Totals from 180 (0.03% of 707082) affected shaders:
Instrs: 68035 -> 67838 (-0.29%)
Send messages: 3190 -> 3188 (-0.06%)
Cycle count: 3979496 -> 3973906 (-0.14%); split: -0.14%, +0.00%
Max live registers: 11812 -> 11808 (-0.03%)
Non SSA regs after NIR: 18878 -> 19052 (+0.92%)

Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34905>
2025-05-16 14:49:25 -07:00
Ian Romanick
464955bbdd nir/algebraic: Optimize some open-coded extract_i8
These were initially observed in Hogwarts Legacy while working on
something else entirely. Two compute shaders in that app are helped
for spills and fills. On Skylake, one of the shaders benefits from
this change, and the other is hurt pretty significantly.

About 40 vertex shaders in Shadow of the Tomb Raider were helped for
instructions.

v2: Use ~0xff instead of 0xffffff00 to ensure the patterns will work
properly with all bit sizes. Noticed by Georg.

v3: No, really, fix the various errors to ensure the patterns will work
properly with all bit sizes. Noticed by Georg.

No shader-db changes on any Intel platform.

fossil-db:

Lunar Lake, Meteor Lake, and DG2 had similar results. (Lunar Lake)
Totals:
Instrs: 210566294 -> 210561118 (-0.00%)
Cycle count: 31582309052 -> 31576352808 (-0.02%); split: -0.02%, +0.00%
Spill count: 519300 -> 519280 (-0.00%)
Fill count: 625181 -> 625161 (-0.00%)
Scratch Memory Size: 36289536 -> 36281344 (-0.02%)
Max live registers: 66068413 -> 66068161 (-0.00%)
Non SSA regs after NIR: 60230773 -> 60230775 (+0.00%)

Totals from 1662 (0.24% of 707082) affected shaders:
Instrs: 635064 -> 629888 (-0.82%)
Cycle count: 36549632 -> 30593388 (-16.30%); split: -16.43%, +0.14%
Spill count: 246 -> 226 (-8.13%)
Fill count: 280 -> 260 (-7.14%)
Scratch Memory Size: 16384 -> 8192 (-50.00%)
Max live registers: 178491 -> 178239 (-0.14%)
Non SSA regs after NIR: 169552 -> 169554 (+0.00%)

Tiger Lake
Totals:
Instrs: 238544730 -> 238539407 (-0.00%)
Cycle count: 23679446097 -> 23673238578 (-0.03%); split: -0.03%, +0.00%
Max live registers: 42494925 -> 42494799 (-0.00%)
Non SSA regs after NIR: 63639071 -> 63639074 (+0.00%)

Totals from 1662 (0.21% of 802704) affected shaders:
Instrs: 626604 -> 621281 (-0.85%)
Cycle count: 26444363 -> 20236844 (-23.47%); split: -23.50%, +0.02%
Max live registers: 95405 -> 95279 (-0.13%)
Non SSA regs after NIR: 181150 -> 181153 (+0.00%)

Ice Lake
Totals:
Instrs: 238855310 -> 238826534 (-0.01%)
Cycle count: 24952257277 -> 24944589398 (-0.03%); split: -0.03%, +0.00%
Spill count: 575510 -> 575117 (-0.07%)
Fill count: 713007 -> 708632 (-0.61%)
Max live registers: 42499556 -> 42499432 (-0.00%)
Non SSA regs after NIR: 64388747 -> 64388750 (+0.00%)

Totals from 1662 (0.21% of 805149) affected shaders:
Instrs: 926887 -> 898111 (-3.10%)
Cycle count: 67025583 -> 59357704 (-11.44%); split: -11.45%, +0.01%
Spill count: 5168 -> 4775 (-7.60%)
Fill count: 32883 -> 28508 (-13.30%)
Max live registers: 95614 -> 95490 (-0.13%)
Non SSA regs after NIR: 181150 -> 181153 (+0.00%)

Skylake
Totals:
Instrs: 161904416 -> 161895239 (-0.01%); split: -0.01%, +0.00%
Cycle count: 20098067714 -> 20090767583 (-0.04%); split: -0.04%, +0.00%
Spill count: 525546 -> 525789 (+0.05%); split: -0.04%, +0.09%
Fill count: 603369 -> 602276 (-0.18%); split: -0.28%, +0.10%
Max live registers: 33895714 -> 33895590 (-0.00%)
Non SSA regs after NIR: 57348729 -> 57348730 (+0.00%)

Totals from 1655 (0.25% of 653734) affected shaders:
Instrs: 769979 -> 760802 (-1.19%); split: -1.83%, +0.64%
Cycle count: 51365416 -> 44065285 (-14.21%); split: -14.22%, +0.01%
Spill count: 4186 -> 4429 (+5.81%); split: -4.90%, +10.70%
Fill count: 16356 -> 15263 (-6.68%); split: -10.50%, +3.82%
Max live registers: 95115 -> 94991 (-0.13%)
Non SSA regs after NIR: 180797 -> 180798 (+0.00%)

Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34905>
2025-05-16 14:49:05 -07:00
Sergi Blanch Torne
fca369f57a bin/ci: crnm: adaptative field pads
Some checks are pending
macOS-CI / macOS-CI (dri) (push) Waiting to run
macOS-CI / macOS-CI (xlib) (push) Waiting to run
Some text paddings are not enough during the execution of the script. Having
an adaptative way for this variable can help the structure and visibility of
the output.

Signed-off-by: Sergi Blanch Torne <sergi.blanch.torne@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34856>
2025-05-16 20:34:16 +00:00
Sergi Blanch Torne
f65975975e bin/ci: crnm: columns list when waiting jobs update
It's another example of a long list of job names, when the jobs waiting for a
status update is printed. The print formatted list can help to present it.

Signed-off-by: Sergi Blanch Torne <sergi.blanch.torne@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34856>
2025-05-16 20:34:16 +00:00
Sergi Blanch Torne
e4396c40fa bin/ci: crnm: columns list for cancelled jobs
Rewrite how the jobs are cancelled within a pool of threads to simplify how
it can then use the print formatted list to for a better presentation of the
results.

Signed-off-by: Sergi Blanch Torne <sergi.blanch.torne@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34856>
2025-05-16 20:34:16 +00:00
Sergi Blanch Torne
e504d226ce bin/ci: crnm: format in columns when listing
When we are printing a long list, and it needs more than one line, it gets
hard to review the content. This is an idea to group the elements to be
printed in columns to make it easier to identify individual elements in
the output.

Signed-off-by: Sergi Blanch Torne <sergi.blanch.torne@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34856>
2025-05-16 20:34:16 +00:00
Seán de Búrca
611772af45 rusticl: replace unnecessary Vec references with slice refs
v2: restore static borrow on `core::device::devs()`

Reviewed-by: @LingMan
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34389>
2025-05-16 19:58:31 +00:00
Seán de Búrca
543b07bee8 rusticl: write CLInfoValues from iterators instead of collecting
All of the current instances of writing info values from `Vec`s involve
building an iterator and then collecting it specifically for writing.
By using an `ExactSizeIterator`, we can avoid the need for allocating in
these cases.

v2: use existing `CLInfoValue::write_iter()` instead of custom type

Reviewed-by: @LingMan
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34389>
2025-05-16 19:58:31 +00:00
Seán de Búrca
3a16c9ab43 rusticl: iterate subgroup sizes only as needed
Making subgroup sizes an iterator avoids collecting (and thus
allocation) in cases where the values are unneeded or only the first is
needed.

v2: fix calculation of `SetBitIndices<u32>` iterator length

Reviewed-by: @LingMan
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34389>
2025-05-16 19:58:31 +00:00
Seán de Búrca
0980ba8595 rusticl: use simple equality check for contexts instead of HashSet
v2: use `[T]::split_first()` to consolidate equality check
v3: undo misleading comment split

Reviewed-by: @LingMan
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34389>
2025-05-16 19:58:31 +00:00
Seán de Búrca
ac44513b9e rusticl: hand-map 3-element arrays for fallible conversion
Iterating arrays and collecting to a `Vec` requires allocating memory
for the `Vec` and, when the needed result is an array of the same size
as the original, an unnecessary fallible conversion back to an array.

While arrays have a `map()` method for infallible conversions,
`try_map()` is unstable. Fortunately, we only have to worry about one
array size and it's small, so hand-mapping is a viable alternative.

Reviewed-by: @LingMan
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34389>
2025-05-16 19:58:31 +00:00