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radv: Flush L2 on GFX12 when binding an update pipeline

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This is just for completeness since the flush above is probably
sufficient.

Fixes: 2d48b2c ("radv: Use subgroup OPs for BVH updates on GFX12")
Reviewed-by: Natalie Vock <natalie.vock@gmx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34938>
This commit is contained in:
Konstantin Seurer 2025-05-12 21:05:55 +02:00 • committed by Marge Bot
parent 8dcf84451a
commit f42d52f922
1 changed files with 3 additions and 0 deletions
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3
src/amd/vulkan/radv_acceleration_structure.c
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@ -743,6 +743,9 @@ radv_update_bind_pipeline(VkCommandBuffer commandBuffer, uint32_t key)
radv_dst_access_flush(cmd_buffer, VK_PIPELINE_STAGE_2_COMPUTE_SHADER_BIT,
VK_ACCESS_2_SHADER_READ_BIT, 0, NULL, NULL);
if (radv_device_physical(device)->info.cp_sdma_ge_use_system_memory_scope)
cmd_buffer->state.flush_bits |= RADV_CMD_FLAG_INV_L2;
bool in_place = key & RADV_BUILD_FLAG_UPDATE_IN_PLACE;
uint32_t flags = in_place ? RADV_BUILD_FLAG_UPDATE_IN_PLACE : 0;