Commit graph

12406 commits

Author SHA1 Message Date
Daniel Schürmann
302649dda1 radv/rt: adjust lower_rt_instructions() for shader functions [disables RT]
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22096>
2023-06-08 00:37:03 +00:00
Daniel Schürmann
b33c01b00f radv/rt: set up RT shader args for separate compilation
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22096>
2023-06-08 00:37:03 +00:00
Friedrich Vock
365f3346f8 radv: Disable capture/replay handles
They don't work with separate compilation. Fixing this involves some
refactoring work, which will come in future MRs.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22096>
2023-06-08 00:37:03 +00:00
Daniel Schürmann
6a5eaa25ef radv/rt: create compile_rt_prolog() function
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22096>
2023-06-08 00:37:03 +00:00
Daniel Schürmann
09e4535f20 radv/rt: don't write cache hit feedback per stage.
Too much boilerplate for no benefit.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22096>
2023-06-08 00:37:03 +00:00
Daniel Schürmann
7f2a569ec5 radv/rt: reference library shaders during radv_rt_fill_stage_info()
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22096>
2023-06-08 00:37:03 +00:00
Daniel Schürmann
772b5b3758 radv/rt: add and use specialized cache search/insert functions
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22096>
2023-06-08 00:37:03 +00:00
Daniel Schürmann
62b4380acb radv/rt: pass radv_ray_tracing_pipeline to RT shader creation
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22096>
2023-06-08 00:37:03 +00:00
Daniel Schürmann
8fb7df92c0 radv/rt: replace pCreateInfo with VkPipelineCreateFlags in rt_variables
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22096>
2023-06-08 00:37:03 +00:00
Daniel Schürmann
d506fe3397 radv/rt: change RT main shader to MESA_SHADER_INTERSECTION
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22096>
2023-06-08 00:37:03 +00:00
Daniel Schürmann
81e48613b9 radv/rt: implement radv_rt_nir_to_asm()
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22096>
2023-06-08 00:37:03 +00:00
Daniel Schürmann
99466ca185 radv/rt: implement radv_nir_lower_rt_abi to lower RT shaders for separate compilation
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22096>
2023-06-08 00:37:03 +00:00
Daniel Schürmann
d4409769c7 radv/shader_info: add RT stages to radv_get_user_data_0()
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22096>
2023-06-08 00:37:03 +00:00
Daniel Schürmann
c75619b268 radv/rt: extend radv_pipeline_group_handle with shader VAs
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22096>
2023-06-08 00:37:03 +00:00
Daniel Schürmann
870e4d285e radv/rt: adjust shared_size when lowering hit_attribs
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22096>
2023-06-08 00:37:03 +00:00
Daniel Schürmann
393f3426b6 aco: implement select_program_rt()
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22096>
2023-06-08 00:37:03 +00:00
Daniel Schürmann
f66f274304 aco: implement nir_intrinsic_load_resume_shader_address_amd
Similar to p_constaddr but targeting BBs.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22096>
2023-06-08 00:37:03 +00:00
Daniel Schürmann
03c4b5b0cc nir,amd: add nir_intrinsic_store_[scalar|vector]_arg_amd to overwrite inputs
This intrinsic must only be used at top-level CF in order
to not break SSA properties.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22096>
2023-06-08 00:37:03 +00:00
Daniel Schürmann
1be3a558f2 radv: add remaining RT shader args for separate compilation
Also wrap RT args into struct {} rt for improved consistency
and remove some 'ray_' prefixes.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22096>
2023-06-08 00:37:03 +00:00
Marek Olšák
6dc1ae1759 amd: drop support for LLVM 14
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23471>
2023-06-07 19:56:55 +00:00
Marek Olšák
ab5662dc61 amd: drop support for LLVM 13
We can remove the LLVM 13 Wave32 discard workaround and
SI_PROFILE_IGNORE_LLVM13_DISCARD_BUG that disabled the workaround.

Reviewed-by: Qiang Yu <yuq825@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23471>
2023-06-07 19:56:55 +00:00
Marek Olšák
3a9f8730f5 amd: drop support for LLVM 12
The demote emulation can be removed, and FS_CORRECT_DERIVS_AFTER_KILL
can be removed because it's always enabled on LLVM >= 13.

Reviewed-by: Qiang Yu <yuq825@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23471>
2023-06-07 19:56:55 +00:00
Marek Olšák
4c8cc26fd8 amd: drop support for LLVM 11
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23471>
2023-06-07 19:56:55 +00:00
Yogesh Mohan Marimuthu
7761e93c8c ac/gpu_info: rearrange if checks for dcc config
rearrange the if checks so that there is less if checks
for newer gpus.

v2: fix block comment coding guideline (Marek Olšák)
    simplify gfx9 if condition (Marek Olšák)

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23454>
2023-06-07 19:28:29 +00:00
Yogesh Mohan Marimuthu
6f968f46fe ac/gpu_info: num_cu = 4 and gfx11 enable dcc with retile
With num_cu = 4 in gfx11 measured power for idle, video playback and observed
power savings, hence enable dcc with retile for gfx11 with num_cu >= 4.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23454>
2023-06-07 19:28:29 +00:00
Samuel Pitoiset
9150513242 radv: advertise VK_KHR_fragment_shader_barycentric on GFX10.3+
It can't be supported on older hardware because it's impossible to
determine the provoking vertex ID without LOAD_PROVOKING_VTX which is
GFX10.3+ only.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6557
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16742>
2023-06-07 14:40:36 +00:00
Samuel Pitoiset
593fb2035d radv: gather info about nir_intrinsic_load_sample_positions_amd
nir_intrinsic_load_barycentric_coord_at_sample is lowered before the
radv_shader_info pass and load_sample_positions_amd might be needed.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16742>
2023-06-07 14:40:36 +00:00
Samuel Pitoiset
7ee8a12a62 radv: add a NIR pass that lower fragment shader barycentric intrinsics
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16742>
2023-06-07 14:40:35 +00:00
Samuel Pitoiset
2b156c8258 radv: configure RSRC1.LOAD_PROVOKING_VTX for the fragment shader
This enables provoking vertex info.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16742>
2023-06-07 14:40:35 +00:00
Samuel Pitoiset
b9b3560039 radv: set ROTATE_PC_PTR for custom interpolations
This seems needed for computing stable barycentric coordinates.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16742>
2023-06-07 14:40:35 +00:00
Samuel Pitoiset
50888ba390 radv: handle per_vertex variables when gathering FS inputs
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16742>
2023-06-07 14:40:35 +00:00
Samuel Pitoiset
506705bdeb radv: add support for nir_intrinsic_load_rasterization_primitive_amd
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16742>
2023-06-07 14:40:35 +00:00
Samuel Pitoiset
116ee98106 radv: track if the rasterization primitive is known at compile time
For fast-linking with GPL, we might not know the pre-rasterization
stages at compile time (when only the FS is compiled) and we will need
to load the rasterization primitive through an user SGPR.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16742>
2023-06-07 14:40:35 +00:00
Samuel Pitoiset
958cc87954 radv: add support for nir_intrinsic_load_provoking_vtx_amd
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16742>
2023-06-07 14:40:35 +00:00
Rhys Perry
b5c31f14a2 aco: remove memory_barrier_buffer implementation
This is no longer used.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21624>
2023-06-07 13:19:42 +00:00
Rhys Perry
62f023f6cf ac/nir: use scoped barriers to finish stores before exports
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21624>
2023-06-07 13:19:41 +00:00
Rhys Perry
417990b19e aco: consider position/primitive exports around memory barriers
This is needed to create barriers which ensure stores finish before
position/primitive exports.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21624>
2023-06-07 13:19:41 +00:00
Georg Lehmann
dfb6d3e443 aco: use v_fma_mix for f2f32 and f2f16 on gfx11 if wave64
v_fma_mix can be dual issued, trade some code size for throughput.

Foz-DB GFX1100:
Totals from 8204 (6.08% of 134864) affected shaders:
CodeSize: 89608584 -> 89693968 (+0.10%)
Latency: 160744811 -> 160699309 (-0.03%); split: -0.03%, +0.00%
InvThroughput: 19737977 -> 19678308 (-0.30%)

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21402>
2023-06-07 12:30:11 +00:00
Georg Lehmann
177dba62a1 aco: use v_add_f{16,32} with clamp for fsat
v_add can be dual issued on gfx11, v_med3 cannot.
Don't use v_add directly to still optimize omod(fsat(x)).

Foz-DB GFX1100:
Totals from 32702 (24.24% of 134913) affected shaders:
Latency: 475008203 -> 474928037 (-0.02%); split: -0.02%, +0.00%
InvThroughput: 59226198 -> 59140787 (-0.14%); split: -0.14%, +0.00%

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21402>
2023-06-07 12:30:11 +00:00
Georg Lehmann
3a0bc8f007 aco/statistics: improve v_fma_mix dual issuing detection
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21402>
2023-06-07 12:30:11 +00:00
Georg Lehmann
0f023d90c0 aco/ir: return true in hasRegClass for Operand(reg, rc)
Makes isOfType() usable after lower_to_hw_instr.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21402>
2023-06-07 12:30:11 +00:00
Yonggang Luo
b687fa4ccb vulkan: move nir_convert_ycbcr into vulkan runtime
This only used by vulkan drivers and depends on vulkan util, so do the move to decouple
nir from vulkan utils

Reviewed-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23444>
2023-06-07 08:42:03 +00:00
Eric Engestrom
9316ab74ef ci/radv: update expectations
Signed-off-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23465>
2023-06-06 20:24:24 +00:00
Alyssa Rosenzweig
99a00e2247 treewide: Use nir_trim_vector more
Via Coccinelle patches

    @@
    expression a, b, c;
    @@

    -nir_channels(b, a, (1 << c) - 1)
    +nir_trim_vector(b, a, c)

    @@
    expression a, b, c;
    @@

    -nir_channels(b, a, BITFIELD_MASK(c))
    +nir_trim_vector(b, a, c)

    @@
    expression a, b;
    @@

    -nir_channels(b, a, 3)
    +nir_trim_vector(b, a, 2)

    @@
    expression a, b;
    @@

    -nir_channels(b, a, 7)
    +nir_trim_vector(b, a, 3)

Plus a fixup for pointless trimming an immediate in RADV and radeonsi.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23352>
2023-06-06 18:52:25 +00:00
Marek Olšák
218c00319b amd: remove unused PKT0 definitions
We never use type 0 packets.

Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22833>
2023-06-06 18:01:36 +00:00
Marek Olšák
dd5604b94d radeonsi: don't use SET_SH_REG_INDEX if the kernel doesn't use CU reservation
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22833>
2023-06-06 18:01:36 +00:00
Marek Olšák
52ca879cdd radeonsi: export non-zero edgeflags for GS and tess
because edge flags are always enabled when polygon mode is enabled

Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22833>
2023-06-06 18:01:35 +00:00
Marek Olšák
ed8250360f amd: add radeon_info* into ac_llvm_context and radv_nir_compiler_options
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22833>
2023-06-06 18:01:35 +00:00
Marek Olšák
192b2c7c31 ac/nir/ngg: always use load_initial_edgeflags_amd, choose the value in drivers
radeonsi will have a more complicated condition here

Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22833>
2023-06-06 18:01:35 +00:00
Marek Olšák
d6e70334ff ac/surface: fix R32G3B32 image format regression for gfx6-8
This is a different fix from the one reviewed because that one broke gfx9.

Fixes: ea7c89d1f5 - ac/surface: move determing ADDR_FMT_* into a helper function
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22833>
2023-06-06 18:01:35 +00:00