Alyssa Rosenzweig 99a00e2247 treewide: Use nir_trim_vector more ... Via Coccinelle patches @@ expression a, b, c; @@ -nir_channels(b, a, (1 << c) - 1) +nir_trim_vector(b, a, c) @@ expression a, b, c; @@ -nir_channels(b, a, BITFIELD_MASK(c)) +nir_trim_vector(b, a, c) @@ expression a, b; @@ -nir_channels(b, a, 3) +nir_trim_vector(b, a, 2) @@ expression a, b; @@ -nir_channels(b, a, 7) +nir_trim_vector(b, a, 3) Plus a fixup for pointless trimming an immediate in RADV and radeonsi. Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io> Reviewed-by: Rhys Perry <pendingchaos02@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23352>		2023-06-06 18:52:25 +00:00
..
addrlib	amd/addrlib: add ADDR_FMT_BG_RG_16_16_16_16	2023-06-01 17:59:39 +00:00
ci	amd/ci: run gl(es) cts & piglit on radeonsi on vangogh	2023-06-03 04:40:02 +00:00
common	amd: remove unused PKT0 definitions	2023-06-06 18:01:36 +00:00
compiler	aco: fix ds_sub_gs_reg_rtn validation	2023-06-06 16:09:28 +00:00
drm-shim	amd/drm-shim: add raven2	2023-05-22 20:14:22 +00:00
llvm	amd: add radeon_info* into ac_llvm_context and radv_nir_compiler_options	2023-06-06 18:01:35 +00:00
registers	ac,radeonsi,winsyses: switch to SPDX-License-Identifier: MIT	2023-05-24 21:48:19 +00:00
vulkan	treewide: Use nir_trim_vector more	2023-06-06 18:52:25 +00:00
meson.build	meson: build radeonsi with aco	2023-05-15 02:01:10 +00:00