Commit graph

5845 commits

Author SHA1 Message Date
José Roberto de Souza
2f7c9f906d intel: Split anv_xe_wait_exec_queue_idle() and move part of it to common/
Split anv_xe_wait_exec_queue_idle() into 2 functions, the first
function creates the syncobj and prepares it to be signaled when the
last workload in queue is completed.

And the second one that calls the first function, then waits for the
syncobj to be signaled and destroy the syncobj.

The main reason for that is that the first function can be reused in
Iris and a future patch will add another user, so lets share it.

No changes in behavior are expected here.

Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30958>
2024-09-19 23:12:44 +00:00
José Roberto de Souza
89c6fa1883 anv: Fix condition to clear query pool with blorp
The comment above says it all, only when queue is not protected that
it is possible to clear query pool with blorp but it was checking
the opposite.

Fixes: d5b0526507 ("anv: propagate protected information for blorp operations")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31239>
2024-09-19 17:54:24 +00:00
José Roberto de Souza
0ced5663e2 anv: Improve readbility of khr_perf_query_availability_offset() and khr_perf_query_data_offset()
No changes in behavior expected here.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31239>
2024-09-19 17:54:24 +00:00
José Roberto de Souza
3d09ffde46 anv/query: Fix batch end value
This were not causing any issues but better set end to the correct
value.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31239>
2024-09-19 17:54:24 +00:00
José Roberto de Souza
ac95745dc4 anv: Add documentation to some fields in anv_query_pool
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31239>
2024-09-19 17:54:24 +00:00
José Roberto de Souza
dec5a624e9 anv: Check if vkCreateQueryPool() is being created in a supported queue
Turns out not even VK CTS was calling
vkEnumeratePhysicalDeviceQueueFamilyPerformanceQueryCountersKHR()
to check if queue supports query.
So here adding a explicity check in our implementation of
vkCreateQueryPool().

https://github.com/KhronosGroup/VK-GL-CTS/pull/482

Cc: 24.2 <mesa-stable>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30652>
2024-09-18 15:29:16 +00:00
José Roberto de Souza
141e7eaca7 anv: Make sure all previous vm binds are done before execute perf query pool
The query pool batch buffer or other bos could not be bound when
exec starts.

Cc: 24.2 <mesa-stable>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30652>
2024-09-18 15:29:16 +00:00
José Roberto de Souza
0a19d92ca5 anv: Add warning about mismatch between query queues
Cc: 24.2 <mesa-stable>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30652>
2024-09-18 15:29:16 +00:00
José Roberto de Souza
c5d79d533a anv: Fix context id or exec queue used to open perf stream
It was always using device->context_id what is not valid in i915 when
has_vm_control is true or when running with Xe KMD.

But anv_AcquireProfilingLockKHR() don't have the queue information so
at least for now we will only support queries in a single queue.

And for consistency doing the same in
anv_QueueSetPerformanceConfigurationINTEL() although here we have the
queue parameter but queries are only supported in render engine
so it would only expose other queues if user set some parameters.

Cc: 24.2 <mesa-stable>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30652>
2024-09-18 15:29:16 +00:00
Dylan Baker
27dd9fd677 anv: remove useless uint >= 0 check
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31214>
2024-09-17 21:16:36 +00:00
Dylan Baker
5809209316 anv: enforce state->cmd_buffer is never null in emit_Simpler_shader_init_fragment
We have a couple of checks where we allow this to be NULL, but later we
unconditionally and unavoidably dereference the pointer, which means
there's no way that it ever could have been NULL. Change the assert at
the top to not allow NULL, and remove checks for it being NULL

CID: 1616544
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31156>
2024-09-16 19:16:58 +00:00
Dylan Baker
5ebdfc8813 anv: assert we don't write past the end of an array
Our array has a fixed size of 32, and we know at the start of the block
that our type_count is < 32, but in the loop we grow the block, in
theory up to 31 times. Coverity notes that, and points out we could
write off the end of the array. Add an assert in the loop to ensure we
don't, and to help Coverity out.

CID: 1615171
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31173>
2024-09-16 17:42:40 +00:00
Dylan Baker
ed8d1d3c9b anv: if queue is NULL in vm_bind return early
In the error handling path we end up creating a vk_sync and then later
we vk_sync_wait() on it. If that wait fails somehow we'll end up calling
vk_queue_set_lost(&queue->vk, ...) which would segfault if queue is
NULL.

If we end up in this situation (no queue), return directly whatever the
backend's vm_bind function returned, propagating the error up if
necessary.

Fixes: dd5362c78a ("anv/xe: try harder when the vm_bind ioctl fails")
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31048>
2024-09-13 20:17:40 +00:00
Nanley Chery
e0157abec6 anv,iris: Pack depth pixels into initialized arrays
Coverity alerts that the uint32_t pointer I was passing into
isl_color_value_pack() could possibly be used as an array. The value is
being used as such, but only the first element of that array should be
accessed. That's because the depth buffer formats I'm also passing into
the function only have a single channel, R. Nonetheless, let's update
the code to avoid the warning.

Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31123>
2024-09-11 22:04:30 +00:00
Iván Briano
e4ee0a2ce1 anv: be consistent about aux usage with modifiers
In c1a7d520f3, we disabled AUX usage for imported images when they are
using an explicit modifier that doesn't support it.
We need to do the same when the modifier is picked by the driver,
otherwise the memory requirements reported for an exported image don't
match those we report for import.

Fixes: c1a7d520f3 ("anv: Disable aux if the explicit modifier lacks it")

Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31051>
2024-09-10 22:09:41 +00:00
Caio Oliveira
eb68e6e84c anv: Advertise VK_KHR_compute_shader_derivatives
This was promoted from VK_NV_compute_shader_derivatives.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30956>
2024-09-10 18:22:42 +00:00
Dave Airlie
7531f6fd9c radv/anv/video: handling encoding both sps and pps in same buffer
This API should allow encoding these back to back into the same
buffer, so handle it properly.

Cc: mesa-stable
Reviewed-by: Hyunjun Ko <zzoon@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31086>
2024-09-10 06:03:15 +00:00
Lionel Landwerlin
05dc524c75 anv: selectively disable binding table usage on Gfx20
Workaround broken Gfx20 dynamic BTI.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: e9f63df2f2 ("intel/dev: Enable LNL PCI IDs without INTEL_FORCE_PROBE")
Backport-to: 24.2
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30931>
2024-09-09 20:33:25 +00:00
Rohan Garg
5f3339e44a anv: enable the VK_KHR_shader_relaxed_extended_instruction feature
Fixes: 29a2e5 ('anv: enable KHR_shader_relaxed_extended_instruction')
Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Acked-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31098>
2024-09-09 17:46:32 +00:00
Daniel Stone
a78539e704 intel/tests: Reduce load from anv_tests
anv_tests tries to create a large number of threads, all of which wait
to be able to execute simultaneously, then launch a reasonable-size
workload.

Under load, cloning each of the 16 threads takes 15ms serially, for a
delay of 240ms before the tests start running; running the test 64
times gives us 15.36s for a single testcase in isolation, assuming that
the bits which aren't forking are free.

To give it the best shot at completing in time, mark it as a
non-parallelisable test (since Meson will also try to parallelise it
out), and also halve the number of runs it attempts. And then give it a
longer timeout so it doesn't fail even in extremis.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31059>
2024-09-09 12:54:34 +00:00
Tapani Pälli
39a1f53890 anv: initialize pixel struct to zero when setting clear color
Otherwise we can end up with uninitialized values, this fixes following
valgrind warning:

==31283== Uninitialised byte(s) found during client check request
==31283==    at 0x503E4DE: anv_batch_bo_finish (anv_batch_chain.c:345)
==31283==    by 0x504220A: anv_cmd_buffer_end_batch_buffer (anv_batch_chain.c:1103)
==31283==    by 0x55A0E4F: end_command_buffer (genX_cmd_buffer.c:3455)
==31283==    by 0x55A0E82: gfx11_EndCommandBuffer (genX_cmd_buffer.c:3466)
==31283==    by 0x11233A: ??? (in /usr/bin/vkcube)
==31283==    by 0x10BDEE: ??? (in /usr/bin/vkcube)
==31283==    by 0x49B5149: (below main) (in /usr/lib64/libc.so.6)
==31283==  Address 0xc10c4d8 is 1,240 bytes inside a block of size 8,192 client-defined
==31283==    at 0x5036EF6: anv_bo_pool_alloc (anv_allocator.c:1284)
==31283==    by 0x503E0E1: anv_batch_bo_create (anv_batch_chain.c:262)
==31283==    by 0x5040D3F: anv_cmd_buffer_init_batch_bo_chain (anv_batch_chain.c:868)
==31283==    by 0x504F9C1: anv_create_cmd_buffer (anv_cmd_buffer.c:147)
==31283==    by 0x6B718C4: vk_common_AllocateCommandBuffers (vk_command_pool.c:206)
==31283==    by 0x4FB06B2: vkAllocateCommandBuffers (trampoline.c:1996)
==31283==    by 0x111E6B: ??? (in /usr/bin/vkcube)
==31283==    by 0x10BDEE: ??? (in /usr/bin/vkcube)
==31283==    by 0x49B5149: (below main) (in /usr/lib64/libc.so.6)

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30990>
2024-09-06 13:19:04 +00:00
Jordan Justen
f817870aa9 anv: Don't warn about unsupported devices if INTEL_FORCE_PROBE was used
The user must have used INTEL_FORCE_PROBE to force the device to be
loaded, so they specifically opted-in to enabled unsupported device
support.

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31011>
2024-09-04 12:09:12 -07:00
Jordan Justen
aaaf9a3b87 anv: Do hasvk devices check first
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31011>
2024-09-04 12:09:05 -07:00
Jordan Justen
16a835ed3d anv: Drop "not yet supported" warning for Xe2
Backport-to: 24.2
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31011>
2024-09-04 12:09:01 -07:00
José Roberto de Souza
ca13e35304 anv: Add anv_device_perf_close()
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31026>
2024-09-04 10:04:38 -07:00
José Roberto de Souza
2d216c12fa anv: Drop useless '>= 0' check over a unsigned
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31026>
2024-09-04 10:04:38 -07:00
José Roberto de Souza
5d4e319aec anv: Nuke perf_metric
This is not used.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31026>
2024-09-04 10:04:37 -07:00
Lionel Landwerlin
14d772d678 anv: fix utrace compute timestamp reads on Gfx20
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30923>
2024-08-29 20:10:11 +00:00
Tapani Pälli
096acf8c0c anv: change existing ICL workaround to depend on BLEND_STATE
Commit f900b763b1 we started to dirty MS as WM changes. However
later on things changed with eebb6cd236, we need to dirty with
BLEND_STATE now.

Fixes: eebb6cd236 ("anv: stop using 3DSTATE_WM::ForceThreadDispatchEnable")
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30920>
2024-08-29 13:58:08 +00:00
Rohan Garg
51e05c2844 iris,anv: simplify and inline sampler count calculations
Use the CLAMP macro to clamp the value and simplify the sampler count
encoding.

Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30922>
2024-08-29 11:49:56 +00:00
Rohan Garg
32f606486f anv: prefetch samplers when dispatching compute shaders
Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30922>
2024-08-29 11:49:56 +00:00
Tapani Pälli
44e1cf2748 anv: set correct miplevel for anv_image_hiz_op
Fixes: 5efecc9782 ("anv: Enable HiZ on multi-LOD depth buffers.")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11787
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30892>
2024-08-29 04:50:44 +00:00
Faith Ekstrand
42114aa723 vulkan: Handle VIEW_INDEX_FROM_DEVICE_INDEX_BIT in the runtime
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30876>
2024-08-29 03:30:31 +00:00
Faith Ekstrand
8c60f1461b vulkan: Take a VkPipelineCreateFlags2KHR in vk_pipeline_*shader_stage*()
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30876>
2024-08-29 03:30:31 +00:00
Iván Briano
2261b298d1 anv: fix adding to wa_addr
Fixes: 6336e0fe7f ("anv: order data in wa_bo to leave wa_addr last")

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30881>
2024-08-27 18:10:58 -07:00
Sagar Ghuge
063715ed45 anv: Reduce clear color state alignment to 64B
Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26793>
2024-08-27 21:13:30 +00:00
Sviatoslav Peleshko
7e52b67801 anv: Add full subgroups WA for the shaders with barriers in Breaking Limit
When barriers are used in invalid shaders with non-uniform control flow
we might get a hang. Forcing 32-wide group can help by making it more
probable that barrier instruction is executed by at least one channel
in each thread, and thus hang will be avoided. This shouldn't affect
Xe2+, where active-thread-only barriers are used anyway.

Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11497
Signed-off-by: Sviatoslav Peleshko <sviatoslav.peleshko@globallogic.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30581>
2024-08-27 08:26:08 +00:00
Sviatoslav Peleshko
1904fe1186 anv: Release correct BO in anv_cmd_buffer_set_ray_query_buffer
If p_atomic_cmpxchg doesn't set the ray_query_shadow_bos[bucket] to new_bo
allocated by this thread, it returns the bucket BO allocated by the other
thread and we use it. But due to a mistake, we also release that BO, not
the candidate just allocated by this thread and never used again.

Fixes: 5d3e4193 ("anv: enable ray queries")
Signed-off-by: Sviatoslav Peleshko <sviatoslav.peleshko@globallogic.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30581>
2024-08-27 08:26:08 +00:00
Sviatoslav Peleshko
442cc7996e anv: Assert ray query BO actually exists
The crash will happen if the client tries to use ray queries without
enabling the KHR_ray_query extension. Add an assert to be able to catch
this sooner.

Signed-off-by: Sviatoslav Peleshko <sviatoslav.peleshko@globallogic.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30581>
2024-08-27 08:26:08 +00:00
Nanley Chery
4a8f3181ba intel: Support any depth fast-clear value on Xe2
Remove the restriction that a depth fast-clear must have a clear value
which matches an image-dependent heuristic.

Reviewed-by: Jianxun Zhang <jianxun.zhang@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30767>
2024-08-27 06:15:36 +00:00
Nanley Chery
4a9e45061a anv: Add and use anv_image_hiz_clear_value()
The benchmarks we're tracking tend to prefer clearing depth buffers to
0.0f when the depth buffers are part of images with multiple aspects.
Otherwise, they tend to prefer clearing depth buffers to 1.0f.

Replace the ANV_HZ_FC_VAL constant with a function which implements this
heuristic.

Reviewed-by: Jianxun Zhang <jianxun.zhang@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30767>
2024-08-27 06:15:36 +00:00
Nanley Chery
9fd79dc49e anv: Pass the VkClearDepthStencilValue for clears
Xe2 can easily support fast-clearing depth buffers to multiple clear
values. Instead of assuming a hard-coded value in various parts of the
driver, pass the clear value down the expected paths.

For consistency, also adjust the slow depth clear function to have a
matching parameter.

Reviewed-by: Jianxun Zhang <jianxun.zhang@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30767>
2024-08-27 06:15:36 +00:00
Lionel Landwerlin
6336e0fe7f anv: order data in wa_bo to leave wa_addr last
We want to make sure the workaround_address is the last item in the BO
so that we don't have to care about the size of the writes going
there, we'll be sure they won't overwrite other items in that BO.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 7b9400b7f7 ("intel/blorp: Don't use clear color conversion on gfx12")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11775
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30844>
2024-08-27 00:51:03 +00:00
Lionel Landwerlin
d8ec8acede anv: always use workaround_address, not workaround_bo
The workaround BO has some debug information at the beginning. The
workaround address is placed after that.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30844>
2024-08-27 00:51:03 +00:00
Nanley Chery
9b98cebe9a intel: Drop BLORP_BATCH_NO_UPDATE_CLEAR_COLOR
All drivers update the clear color themselves. So, drop the
functionality from BLORP as well as the flag controlling it.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30824>
2024-08-26 23:57:12 +00:00
Nanley Chery
721d0c3e77 anv,hasvk: Always use BLORP_BATCH_NO_UPDATE_CLEAR_COLOR
Store the clear color from within the drivers, rather than from BLORP.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30824>
2024-08-26 23:57:11 +00:00
Nanley Chery
5fd42500cf anv,hasvk: Add and use set_image_clear_color()
We're going to be storing clear colors from the drivers rather than
BLORP. Add a function for this purpose.

For now, the first use replaces init_fast_clear_color(). One change in
behavior is that the clear color initialization is now done without
write-checking on gfx12. This actually matches what anv does to other
writes to the image's fast-clear tracking state. We can fix this later
if and when we address the larger issue.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30824>
2024-08-26 23:57:11 +00:00
Lionel Landwerlin
1f9c40a8d1 anv: explicitly disable BT pool allocations at device init
The default state doesn't seem well defined (or kernel driver bug
maybe?). Let's just set it to disabled on platforms where we're not
using it.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Found-by: Chuansheng Liu <chuansheng.liu@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30841>
2024-08-26 10:34:31 +00:00
Nanley Chery
23658920d1 anv,iris: Skip tex invalidate for clear conversion
The hardware's clear color conversion feature requires invalidating the
texture cache for every fast clear. We're no longer using the hardware
feature, so we longer need the invalidation.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30646>
2024-08-23 15:28:34 +00:00
Lionel Landwerlin
778cb59086 anv: optimize STATE_BYTE_STRIDE emission
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30803>
2024-08-23 10:52:19 +00:00