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Author SHA1 Message Date
Dave Airlie
2f02af39b3 radv/video/encode: fix quality params on v2 hw. 
This should have the extra dword as well.

Fixes: 54d499818c ("radv/video: add initial support for encoding with h264.")
Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29098>
 2024-05-14 05:45:57 +00:00
Rhys Perry
38cbc3c605 radv: advertise VK_EXT_legacy_vertex_attributes 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Gitlab: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11094
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29071>
 2024-05-13 17:22:27 +00:00
Rhys Perry
d48c8905f1 radv: keep track of unaligned dynamic vertex access 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29071>
 2024-05-13 17:22:26 +00:00
Samuel Pitoiset
62b4e9a779 radv: simplify radv_emit_hw_gs() slightly 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29132>
 2024-05-13 16:10:20 +00:00
Samuel Pitoiset
bdefab362c radv: simplify radv_emit_hw_vs() slightly 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29132>
 2024-05-13 16:10:20 +00:00
Samuel Pitoiset
5572a83b00 radv: simplify radv_emit_hw_ngg() slightly 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29132>
 2024-05-13 16:10:20 +00:00
Samuel Pitoiset
dd3ae170a7 radv: do not emit VGT_GS_OUT_PRIM_TYPE to ctx_cs on GFX11 
Missed that one but it doesn't cause any context rolls.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29132>
 2024-05-13 16:10:20 +00:00
Samuel Pitoiset
f228e7ed2d radv: remove gfx10_emit_ge_pc_alloc() 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29132>
 2024-05-13 16:10:20 +00:00
Konstantin Seurer
406dda70e7 radv: Zero initialize capture replay group handles 
radv_serialized_shader_arena_block is not tightly packed and using an
initializer list leaves the gaps uninitialized.

cc: mesa-stable

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28961>
 2024-05-12 10:28:27 +00:00
Konstantin Seurer
df82221bb3 radv: Remove arenas from capture_replay_arena_vas 
Avoids an use after free when looking up an arena.

cc: mesa-stable

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28961>
 2024-05-12 10:28:27 +00:00
Konstantin Seurer
e050abc961 radv: Fix radv_shader_arena_block list corruption 
Remove it from the previous list befor adding it to a new one.

cc: mesa-stable

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28961>
 2024-05-12 10:28:27 +00:00
Tatsuyuki Ishi
e21ea25de9 radv: Remove radv_queue::device again 
It was mistakenly revived.

Fixes: 0fb19b8331 ("radv: add radv_queue.h")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29151>
 2024-05-12 09:58:22 +00:00
Marek Olšák
a6c46509cc ac/llvm: use new s_wait instructions and split the existing ones for gfx12 
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29007>
 2024-05-11 22:14:05 -04:00
Marek Olšák
2adc66e586 amd: add initial common code for gfx12 
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Timur Kristóf <timur.kristof@gmail.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29007>
 2024-05-11 22:14:05 -04:00
Marek Olšák
58a5de5c34 amd: add gfx12 register definitions into the register header generator 
The generator renamed some definitions to resolve conflicts.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Timur Kristóf <timur.kristof@gmail.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29007>
 2024-05-11 22:14:05 -04:00
Dr. David Alan Gilbert
8b6b327d1b treewide: Cleanup unused structs 
vk/wsi: Remove unused struct 'wsi_headless_format'

'wsi_headless_format' appears unused, and seems
to have been since initial commit.

radv: Remove unused struct 'blit_region'

'blit_region' appears unused, I think since initial commit.

r600: Remove unused structs

'eg_interp' and 'r600_shader_src' are unused.
I think they are just leftovers from the cleanup
in 20e6c31ba6.

i915: Remove unused struct 'i915_tracked_hw_state'

'i915_tracked_hw_state' appears unused. I think it's just
a leftover from 179cb58795.

llvmpipe: Remove unused struct 'linear_interp'

'linear_interp' doesn't ever seem to have been used.

radeonsi: Remove unused struct 'texture_orig_info'

'texture_orig_info' seems unused, I think since 46b2b3bda8.

svga: Remove unused struct 'svga_3d_invalidate_gb_image'

'svga_3d_invalidate_gb_image' appears unused since 1942c06f9c.
Remove it.

nir: Remove unused struct 'split_struct_state'

'split_struct_state' looks unused since the original commit.

Signed-off-by: Dr. David Alan Gilbert <dave@treblig.org>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29105>
 2024-05-11 17:30:59 +00:00
Samuel Pitoiset
43fbbc0732 radv: track and bind more VRS states from the graphics pipeline 
This doesn't change anything but this will allow us to emit all
graphics shaders from the cmdbuf.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29103>
 2024-05-09 08:15:56 +00:00
Samuel Pitoiset
8c17b05615 radv: do not emit non-context registers to radv_pipeline::ctx_cs 
These registers don't cause context rolls.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29103>
 2024-05-09 08:15:56 +00:00
Samuel Pitoiset
24814be08a radv: stop recomputing the last VGT API stage when emitting graphics shaders 
The last VGT shader is already set correctly.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29103>
 2024-05-09 08:15:56 +00:00
Samuel Pitoiset
6753f981b6 radv: remove unused parameter to radv_pipeline_emit_pm4() 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29103>
 2024-05-09 08:15:56 +00:00
Samuel Pitoiset
c6a22dd05c radv: precompute NGG register values 
To make emission faster.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29031>
 2024-05-09 06:29:29 +00:00
Samuel Pitoiset
751e5d8bd7 radv: move common registers between VS/GS and NGG 
For more clarity.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29031>
 2024-05-09 06:29:29 +00:00
Faith Ekstrand
ac500495ac radv: Use vk_physical_device_get_spirv_capabilities() 
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Iván Briano <ivan.briano@intel.com>
Acked-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28905>
 2024-05-09 01:14:23 +00:00
Faith Ekstrand
c1eaa03904 spirv: Drop the SubgroupUniformControlFlow check 
It's just a vtn_fail_if() and there's no actual cap for it.  It's not
really gaining us much to have the check.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Iván Briano <ivan.briano@intel.com>
Acked-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28905>
 2024-05-09 01:14:22 +00:00
Faith Ekstrand
eed3b56402 spirv: Move the old AMD extensions out of capabilities 
These aren't real capabilities.  They control whether or not we turn on
the extended instruction sets for these instruction types.

Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Iván Briano <ivan.briano@intel.com>
Acked-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28905>
 2024-05-09 01:14:22 +00:00
Samuel Pitoiset
1173058002 radv: add a new mechanism for tracking registers per cmdbuf 
We already track a couple of registers per cmdbuf and this introduces
a generic mechanism, instead of having a bunch of last_xxx fields.

Loosely based on RadeonSI.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28644>
 2024-05-08 11:45:52 +00:00
Samuel Pitoiset
31b039d8b7 radv: advertise VK_KHR_dynamic_rendering_local_read 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27263>
 2024-05-07 10:35:04 +00:00
Samuel Pitoiset
c533a79878 radv: implement VK_KHR_dynamic_rendering_local_read 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27263>
 2024-05-07 10:35:04 +00:00
Samuel Pitoiset
53a142ad23 aco: add support for remapping color attachments 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27263>
 2024-05-07 10:35:04 +00:00
Samuel Pitoiset
c9162034bc radv: precompute DB_SHADER_CONTROL for fragment shaders later 
To regroup all precomputed register values.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29022>
 2024-05-06 18:00:02 +00:00
Samuel Pitoiset
c658ed5136 radv: precompute vertex shader register values 
To make emission faster.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29022>
 2024-05-06 18:00:02 +00:00
Samuel Pitoiset
4b53d36f0d radv: precompute legacy GS register values 
To make emission faster.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29022>
 2024-05-06 18:00:02 +00:00
Samuel Pitoiset
fa9b0ee86c radv: precompute mesh shader register values 
To make emission faster.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29022>
 2024-05-06 18:00:02 +00:00
Samuel Pitoiset
7f7ef10bea radv: precompute fragment shader register values 
To make emission faster.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29022>
 2024-05-06 18:00:02 +00:00
Samuel Pitoiset
e5bc4d85bb radv: precompute existing legacy GS register values later 
To precompute all registers at the same place.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29022>
 2024-05-06 18:00:02 +00:00
Samuel Pitoiset
92337aff03 radv: split cmdbuf dirty flags into dirty/dirty_dynamic 
We are out of bits.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29039>
 2024-05-06 08:33:37 +02:00
Georg Lehmann
603982ea80 nir/opt_16bit_tex_image: optimize packed conversions too 
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28730>
 2024-05-04 15:01:45 +00:00
Georg Lehmann
e63afdc681 radv: always run nir_opt_16bit_tex_image 
The pass can optimize pack_half and constants sources even when
no 16bit instructions exist.

Foz-DB Navi21:
Totals from 3042 (3.83% of 79395) affected shaders:
MaxWaves: 69039 -> 69031 (-0.01%); split: +0.01%, -0.02%
Instrs: 2292054 -> 2291874 (-0.01%); split: -0.03%, +0.02%
CodeSize: 12567868 -> 12544888 (-0.18%); split: -0.23%, +0.05%
VGPRs: 145384 -> 145352 (-0.02%); split: -0.06%, +0.04%
SpillSGPRs: 451 -> 452 (+0.22%)
Latency: 23546543 -> 23536416 (-0.04%); split: -0.07%, +0.03%
InvThroughput: 5180446 -> 5164437 (-0.31%); split: -0.35%, +0.04%
VClause: 50537 -> 50535 (-0.00%); split: -0.05%, +0.04%
SClause: 84726 -> 84750 (+0.03%); split: -0.04%, +0.06%
Copies: 140384 -> 140421 (+0.03%); split: -0.34%, +0.37%
Branches: 40412 -> 40413 (+0.00%)
PreVGPRs: 120213 -> 120262 (+0.04%); split: -0.03%, +0.07%
VALU: 1607545 -> 1607593 (+0.00%); split: -0.03%, +0.03%
SALU: 215846 -> 215837 (-0.00%); split: -0.03%, +0.02%

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28730>
 2024-05-04 15:01:44 +00:00
Georg Lehmann
3a35522c8a radv, radeonsi: don't use D16 for f2f16_rtz 
D16 rounds towards zero for fp32 -> fp16, but for fixed point it rounds to
nearest even in fp16. MIMG without D16 also rounds to nearest even, but in fp32.
This means D16 and f2f16_rtz(tex@32) can produce different results.

Sadly this also means we can never use d16 if fp16 rounding isn't undefined.

Cc: mesa-stable

Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28730>
 2024-05-04 15:01:44 +00:00
Daniel Schürmann
ce51e48cb6 radv: move nir_opt_dead_cf() before nir_opt_loop() 
This can avoid unnecessary CF transformations.

Totals from 557 (0.70% of 79395) affected shaders: (GFX11)
MaxWaves: 12020 -> 12028 (+0.07%)
Instrs: 4237096 -> 4234110 (-0.07%); split: -0.08%, +0.01%
CodeSize: 21731952 -> 21719556 (-0.06%); split: -0.06%, +0.00%
VGPRs: 40492 -> 40480 (-0.03%)
SpillSGPRs: 467 -> 416 (-10.92%)
Latency: 25704891 -> 25684156 (-0.08%); split: -0.10%, +0.02%
InvThroughput: 5545224 -> 5542998 (-0.04%); split: -0.06%, +0.02%
VClause: 107850 -> 107838 (-0.01%); split: -0.02%, +0.01%
SClause: 90450 -> 90440 (-0.01%); split: -0.05%, +0.04%
Copies: 292714 -> 291354 (-0.46%); split: -0.50%, +0.03%
Branches: 133630 -> 133617 (-0.01%); split: -0.01%, +0.00%
PreSGPRs: 42299 -> 42104 (-0.46%); split: -0.48%, +0.02%
PreVGPRs: 36396 -> 36393 (-0.01%); split: -0.02%, +0.01%
VALU: 2321811 -> 2321192 (-0.03%); split: -0.03%, +0.01%
SALU: 505001 -> 503289 (-0.34%); split: -0.35%, +0.01%
SMEM: 132622 -> 132640 (+0.01%)

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28150>
 2024-05-03 13:01:29 +00:00
Daniel Schürmann
4453971fbb radv: mark nir_opt_loop() as not idempotent 
This pass misses opportunities because foreach_list_typed_safe()
might point to disconnected cf_nodes after some optimization got
applied. No fossil-db changes.

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28150>
 2024-05-03 13:01:29 +00:00
Samuel Pitoiset
d71d189790 radv: add a new dirty state for emitting the color output state 
SPI_SHADER_COL_FORMAT/CB_SHADER_MASK are used slightly differently
for PS epilogs, shader objects and monolithic graphics pipelines.

This introduces a new state that will allow us to emit these two
registers in only place. The main motivation is for depth-only RB+
support and for tracking context registers in the cmdbuf.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28976>
 2024-05-03 06:29:05 +00:00
Samuel Pitoiset
66d4188ec5 radv: store cb_shader_mask for fragment shaders and epilogs 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28976>
 2024-05-03 06:29:05 +00:00
Samuel Pitoiset
0ce1bfc040 radv: rename col_format_non_compacted to spi_shader_col_format 
This is always the non-compacted format because it's compacted right
before it's emitted. This looks much cleaner to me.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28976>
 2024-05-03 06:29:05 +00:00
Samuel Pitoiset
199f521804 radv: compact SPI_SHADER_COL_FORMAT as late as possible 
This will allow us to do more cleanups because this thing is a complete
mess.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28976>
 2024-05-03 06:29:05 +00:00
Samuel Pitoiset
e1483d022b radv: clear unwritten color attachments for monolithic PS earlier 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28976>
 2024-05-03 06:29:04 +00:00
Samuel Pitoiset
3b41fbd4b8 radv: precompute compute/task shader register values 
To make emission faster.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29014>
 2024-05-03 06:07:46 +00:00
Samuel Pitoiset
8c4d0b287f radv: emit compute pipelines directly from the cmdbuf 
Using this intermediate CS isn't really useful and it prevents us to
optimize register writes in the near future. This will also be removed
for graphics pipelines.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28977>
 2024-05-02 10:39:03 +00:00
Samuel Pitoiset
86281ef15f radv: add shaders BO to the cmdbuf BO list at bind time 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28965>
 2024-04-30 07:18:08 +00:00
Samuel Pitoiset
42554e81b9 radv: add RT prolog BO to the cmdbuf BO list at bind time 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28965>
 2024-04-30 07:18:08 +00:00