Commit graph

82384 commits

Author SHA1 Message Date
Jason Ekstrand
9bc72a9213 anv/image: Do swizzle remapping in anv_image.c
TODO: At some point, we really need to make an image_view_init_info that's
a flyweight and stop stuffing everything into image_view.
2016-01-26 20:23:59 -08:00
Jason Ekstrand
7d84fe9b1f HACK: Expose support for stencil blits
If someone actually tries to use them, they won't work, but at least we
don't fail to return format properties now.
2016-01-26 17:29:49 -08:00
Kenneth Graunke
32dcfc953e vtn: Delete references to IMix opcode.
This is being removed in SPIR-V.

Bugzilla: https://cvs.khronos.org/bugzilla/show_bug.cgi?id=15452
2016-01-26 17:02:35 -08:00
Ben Widawsky
c5dc6cdf26 i965/skl: Utilize new 5th bit for gateway messages
Cc: Jordan Justen <jordan.l.justen@intel.com>
Signed-off-by: Ben Widawsky <benjamin.widawsky@intel.com>
2016-01-26 15:44:48 -08:00
Jason Ekstrand
a1ea45b857 genX/pipeline: Don't make vertex bindings with holes 2016-01-26 15:44:18 -08:00
Jason Ekstrand
7ef0d39cb2 anv/cmd_buffer: Put base_instance in the second component 2016-01-26 15:44:02 -08:00
Francisco Jerez
6840cc1513 anv/image: clflush surface state map in anv_fill_buffer_surface_state().
Some of its users had the required clflush on non-LLC platforms, some
didn't.  Put the clflush in anv_fill_buffer_surface_state() so we
don't forget.
2016-01-26 15:14:50 -08:00
Francisco Jerez
fc7a7b31c5 anv/image: clflush the right state map in anv_fill_image_surface_state().
It was clflushing the nonrt_surface_state structure regardless of
which state structure was actually being initialized.
2016-01-26 15:14:50 -08:00
Francisco Jerez
a50dc70e21 anv/image: Upload raw buffer surface state for untyped storage image and texel buffer access. 2016-01-26 15:14:50 -08:00
Francisco Jerez
d2ec510dda anv/image: Fix image parameter initialization. 2016-01-26 15:14:50 -08:00
Francisco Jerez
d9e0b9a06a isl/gen9: Fix slice offset calculation for 1D array images.
The X component of the offset is set to the layer index times layer
height which is obviously bogus, return the vertical offset of the
slice as Y component instead.  Fixes a few image load/store tests that
use 1D arrays on SKL when forcing it to fall back to untyped reads and
writes.
2016-01-26 15:14:50 -08:00
Jason Ekstrand
cc065e0ad7 i965/fs_surface_builder: Mask signed integers after conversion 2016-01-26 15:14:50 -08:00
Jason Ekstrand
ba393c9d81 anv/image: Actually fill out brw_image_param structs 2016-01-26 15:14:50 -08:00
Jason Ekstrand
aa9987a395 anv/image_view: Add base mip and base layer fields
These will be needed by image_load_store
2016-01-26 15:14:50 -08:00
Jason Ekstrand
42cd994177 gen7: Add support for base vertex/instance 2016-01-26 14:56:37 -08:00
Jason Ekstrand
4bf3cadb66 gen8: Add support for base vertex/instance 2016-01-26 14:56:37 -08:00
Jason Ekstrand
6ba67795db nir/spirv: Add proper support for InstanceIndex 2016-01-26 14:56:37 -08:00
Jason Ekstrand
1c3b7fe1ee nir/lower_io: Lower INSTNACE_INDEX 2016-01-26 14:56:37 -08:00
Jason Ekstrand
b2b7c93318 glsl/enums: Add an enum for Vulkan instance index 2016-01-26 14:56:37 -08:00
Jason Ekstrand
da75492879 genX/pipeline: Break emit_vertex_input out into common code
It's mostly the same and contains some non-trivial logic, so it really
should be shared.  Also, we're about to make some modifications here that
we would really like to share.
2016-01-26 14:56:37 -08:00
Karol Herbst
19ae5de981 nv50/ir: fix memory corruption when spilling and redoing RA
When RA fails, and we spill, we have to clean everything up before doing
RA again. We were forgetting to reset the hi/lo linked lists - at
least the hi list is guaranteed to still have pointers to now-deleted
RIG nodes.

Signed-off-by: Karol Herbst <nouveau@karolherbst.de>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: mesa-stable@lists.freedesktop.org
2016-01-26 17:55:06 -05:00
Kristian Høgsberg Kristensen
fe6ccb6031 anv: Remove long unused anv_aub.h 2016-01-26 14:53:00 -08:00
Kristian Høgsberg Kristensen
074a7c7d7c anv: Dirty fragment shader descriptors in meta restore
We need to reemit render targets, so dirtying VK_SHADER_STAGE_VERTEX_BIT
doesn't help us much.
2016-01-26 14:44:02 -08:00
Kristian Høgsberg Kristensen
725d969753 anv: Reemit STATE_BASE_ADDRESS after second level cmd buffers
Otherwise the primary batch will continue using the state base addresses
set by the secondary.  Fixes remaining renderpass tests.
2016-01-26 14:44:02 -08:00
Timothy Arceri
d580a979a4 glsl: remove old FINISHME
This should have been removed long ago.

Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
2016-01-27 09:15:21 +11:00
Chad Versace
df5f6d824b anv/meta: Fix sample mask in clear pipelines
Once we begin emitting the correct sample mask,
genX_3DSTATE_SAMPLE_MASK_pack will hit an assertion if the mask contains
too many bits.
2016-01-26 11:04:44 -08:00
Marek Olšák
98cebc913c configure.ac: don't require EGL/DRM and GBM if OpenGL is disabled
This allows building VDPAU/OMX/VA drivers without OpenGL and its
dependencies.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2016-01-26 19:07:03 +01:00
Jan Vesely
efc4142acd r600,compute: Plug few memory leaks
v2: drop inline keyword
    drop radeon_llvm_dispose_kernel_module wrapper

v3: move definitions to .c file
    use in radeonsi

Signed-off-by: Jan Vesely <jan.vesely@rutgers.edu>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
2016-01-26 19:04:38 +01:00
Jan Vesely
e1dcd333e4 r600: Typos and whitespace fixes
Signed-off-by: Jan Vesely <jan.vesely@rutgers.edu>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2016-01-26 19:01:22 +01:00
Marek Olšák
2924ca131f radeonsi: fix clover crash
caused by ce1e7784d0

Trivial.
2016-01-26 18:53:41 +01:00
Marek Olšák
af57507e4f radeonsi: fix shader precompilation for shader-db
The addition of spi_shader_col_format killed all color outputs
in precompiled shaders.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> (v1)
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com> (v1)

v2: also set the alpha func (trivial)
2016-01-26 18:49:50 +01:00
Ilia Mirkin
38c63abf09 glsl: add GL_OES_geometry_point_size and conditionalize gl_PointSize
For now this will be enabled in tandem with GL_OES_geometry_shader.
Should a driver come along that wants to separate them out, another
enable can be added.

Also adds the missed GL_OES_geometry_shader define in glcpp.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marta Lofstedt <marta.lofstedt@intel.com>
2016-01-26 12:36:15 -05:00
Emil Velikov
eb63640c1d glsl: move to compiler/
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Acked-by: Matt Turner <mattst88@gmail.com>
Acked-by: Jose Fonseca <jfonseca@vmware.com>
2016-01-26 16:08:33 +00:00
Emil Velikov
a39a8fbbaa nir: move to compiler/
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Acked-by: Matt Turner <mattst88@gmail.com>
Acked-by: Jose Fonseca <jfonseca@vmware.com>
2016-01-26 16:08:30 +00:00
Emil Velikov
f694da80c7 compiler: move the glsl_types C wrapper alongside their C++ brethren
At a later stage we might want to split out the NIR specific [XXX:
which one was it], as to make things move obvious and rename the files
appropriately. This patch aims to split it out of nir.

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Acked-by: Matt Turner <mattst88@gmail.com>
Acked-by: Jose Fonseca <jfonseca@vmware.com>
2016-01-26 16:08:27 +00:00
Emil Velikov
24f984f64a nir: move glsl_types.{cpp,h} to compiler
Allows us to remove the SCons workaround :-)

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Acked-by: Matt Turner <mattst88@gmail.com>
Acked-by: Jose Fonseca <jfonseca@vmware.com>
2016-01-26 16:08:24 +00:00
Emil Velikov
1a882fd2ee nir: move shader_enums.[ch] to compiler
This way one can reuse it in glsl, nir or other infrastructure without
pulling nir as dependency.

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Acked-by: Matt Turner <mattst88@gmail.com>
Acked-by: Jose Fonseca <jfonseca@vmware.com>
2016-01-26 16:08:20 +00:00
Emil Velikov
2f86383091 compiler: introduce a libcompiler static library
Currently it's an empty library, although it'll be used to store common
code between GLSL and NIR that is compiler specific (rather than generic
as the one in src/util).

XXX: strictly speaking we could add a python/mako parser to generate the
relevant files instead including builtin_type_macros.h in such a manner.

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Acked-by: Matt Turner <mattst88@gmail.com>
Acked-by: Jose Fonseca <jfonseca@vmware.com>
2016-01-26 16:07:27 +00:00
Nicolai Hähnle
41875ac4ed gallium/ddebug: add 'verbose' option
This currently just writes out the name of dump files, which can be useful
to easily correlate those files with other log outputs (driver debug output,
apitrace calls, etc.)

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2016-01-26 09:58:55 -05:00
Nicolai Hähnle
f4c8fa4e49 gallium/ddebug: make 'noflush' also affect 'always' mode
This changes the default behavior of 'always' mode to be consistent with
hang detection mode.

I have used this to more easily compare dumped command streams using diff.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2016-01-26 09:58:49 -05:00
Nicolai Hähnle
8894b5f008 radeonsi: use llvm.amdgcn.s.barrier instead of llvm.AMDGPU.barrier.local
The new name for the intrinsic was introduced in LLVM r258558.

v2: use ternary operator instead of preprocessor

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> (v1)
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2016-01-26 09:57:06 -05:00
Jason Ekstrand
725fb3623f i965/compiler: Set nir_options.vertex_id_zero_based 2016-01-25 16:10:28 -08:00
Jason Ekstrand
6b6a8a99f8 HACK/i965: Default to scalar GS on BDW+ 2016-01-25 15:52:53 -08:00
Ben Widawsky
a443b5b732 i965/bxt: Fix conservative wm thread counts.
When setting the conservative thread counts, I halved everything. That isn't
correct for the wm, which has nothing to do with actual thread counts. I suck.

BXT only has 1 slice, and there is some ambiguity about subslices, so just
reserve the max possible for now. It looks like this might fix:
piglit.spec.glsl-1_50.execution.variable-indexing.gs-output-array-vec4-index-wr.bxtm64.
I kind of question why that is, but it is what Jenkins says.

Mark is current running some of the other blacklisted tests on this patch. (it
effects anything requiring scratch space).

Cc: mesa-stable <mesa-stable@lists.freedesktop.org>
Cc: Neil Roberts <neil@linux.intel.com>
Signed-off-by: Ben Widawsky <benjamin.widawsky@intel.com>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Tested-by: Mark Janes <mark.a.janes@intel.com>
2016-01-25 15:51:17 -08:00
Jason Ekstrand
e462d4d815 Merge remote-tracking branch 'mattst88/nir-lower-pack-unpack' into vulkan 2016-01-25 15:50:31 -08:00
Jason Ekstrand
6bbf3814dc gen7/state: Apply min/mag filters individually for samplers
This fixes tests which apply different min and mag filters, and depend on
the min filter to be correct.
2016-01-25 15:33:08 -08:00
Ben Widawsky
9c69f4632d gen8/state: Apply min/mag filters individually for samplers
This fixes tests which apply different min and mag filters, and depend on the
min filter to be correct.
2016-01-25 15:29:18 -08:00
Jason Ekstrand
2434ceabf4 i965/fs: Feel free to spill partial reads/writes
Now that we properly handle write-masking, this should be safe.
2016-01-25 15:23:10 -08:00
Jason Ekstrand
9c0109a1f6 i965/fs: Properly write-mask spills
For unspills (scratch reads), we can just set WE_all all the time because
we always unspill into a new GRF.  For spills, we have two options: If the
instruction has a 32-bit-per-channel destination and "normal" regioning,
then we just do a regular write and it will interleave channels from
different control-flow paths properly.  If, on the other hand, the the
regioning is non-normal, then we have to unspill, run the instruction, and
spill afterwards.  In this second case, we need to do the spill with
we_ALL.
2016-01-25 15:23:10 -08:00
Kristian Høgsberg Kristensen
8e07f7942e anv: Remove a few finished finishme 2016-01-25 15:16:13 -08:00