Commit graph

82384 commits

Author SHA1 Message Date
Nanley Chery
ab129a44ae mesa: Generate a helper function for each extension
Generate functions which determine if an extension is supported in the
current context. Initially, enums were going to be explicitly used with
_mesa_extension_supported(). The idea to embed the function and enums
into generated helper functions was suggested by Kristian Høgsberg.

For performance, the function body no longer uses
_mesa_extension_supported() and, as suggested by Chad Versace, the
functions are also declared static inline.

v2: Place function qualifiers on separate line (Chad)
v3: Move function curly brace to new line (Chad)

Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Chad Versace <chad.versace@intel.com>
2015-11-12 13:10:37 -08:00
Nanley Chery
eda15abd84 mesa/extensions: Replace extension::api_set with ::version
The api_set field has no users outside of _mesa_extension_supported().
Remove it and allow the version field to take its place.

The brunt of the transformation was performed with the following vim commands:
s/\(GL [^,]\+\),\s*\d*,\s*\d*\(,\s*\d*\)\(,\s*\d*\)/\1, GLL, GLC\2\3/g
s/\(GLL [^,]\+\)\,\s*\d*/\1, GLL/g
s/\(GLC [^,]\+\)\(,\s*\d*\),\s*\d*\(,\s*\d*\)\(,\s*\d*\)/\1\2, GLC\3\4/g
s/\( ES1[^,]*\)\(,\s*\(\w\|\d\)\+\)\(,\s*\(\w\|\d\)\+\),\s*\d*/\1\2\4, ES1/g
s/\( ES2[^,]*\)\(,\s*\(\w\|\d\)\+\)\(,\s*\(\w\|\d\)\+\)\(,\s*\(\w\|\d\)\+\),\s*\d*/\1\2\4\6, ES2/g

Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Chad Versace <chad.versace@intel.com>
2015-11-12 13:10:37 -08:00
Nanley Chery
a82bc779af mesa/extensions: Use _mesa_extension_supported()
Replace open-coded checks for extension support with
_mesa_extension_supported().

Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Chad Versace <chad.versace@intel.com>
2015-11-12 13:10:37 -08:00
Nanley Chery
f6a818e76d mesa/extensions: Create _mesa_extension_supported()
Create a function which determines if an extension is supported in the
current context.

v2: Use common variable names (Emil)
    Insert new line between variables and return statement (Chad)
    Rename api_set variable to api_bit (Chad)

Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Chad Versace <chad.versace@intel.com>
2015-11-12 13:10:37 -08:00
Nanley Chery
f47df8f729 mesa/extensions: Add extension::version
Enable limiting advertised extension support by context version with
finer granularity. This new field is currently unused and is set to
0 everywhere. When it is used, a value of 0 will indicate that the
extension is supported for any version of a context.

v2: Use uint*t type for version and note the expected values (Emil)
    Use an 8-bit data type
    Reformat macro for better readability (Chad)

v3: Note preparatory nature of commit (Chad)

Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Chad Versace <chad.versace@intel.com>
2015-11-12 13:10:37 -08:00
Nanley Chery
8bd82a91c0 mesa/extensions: Move entries entries to separate file
With this infrastructure set in place, we can now reuse the entries to
generate useful code.

v2: Add the new file into Makefile.sources (Emil)

Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Chad Versace <chad.versace@intel.com>
2015-11-12 13:10:37 -08:00
Nanley Chery
c0b568f3db mesa/extensions: Wrap array entries in macros
Now that we're using macros, remove the redundant text from each entry.

Remove comments between the entries to make editing easier and separate
the sections with blank lines. Structure the EXT macros in a way that
helps reviewers verify that no meaning has been altered.

v2: Indent the entries (Chad)

Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Chad Versace <chad.versace@intel.com>
2015-11-12 13:10:37 -08:00
Nanley Chery
e5af09f9ba mesa/extensions: Remove array sentinel
Simplify future updates to the extension struct array by removing
the sentinel.

Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Chad Versace <chad.versace@intel.com>
2015-11-12 13:10:37 -08:00
Chad Versace
c6493dff79 anv: Strip trailing space in anv_private.h 2015-11-12 12:24:01 -08:00
Chad Versace
addc2a9d02 anv: Remove redundant fields anv_format::bs,bw,bh,bd
Instead, use the equivalent fields in anv_format::isl_layout.
2015-11-12 12:23:49 -08:00
Chad Versace
cbc31f453d anv/formats: Re-indent the fmt() macro
Use one line per struct member.
2015-11-12 12:21:46 -08:00
Chad Versace
1bea1669c5 anv: Use enum isl_format in anv_format
This patch begins using isl.h in Anvil. More refactors will follow.

Change type of anv_format::surface_format from uint16_t -> enum
isl_format.
2015-11-12 12:21:46 -08:00
Chad Versace
bfb022a235 isl: Generate isl_format_layout.c
Generate an array of struct isl_format_layout, using
isl_format_layout.csv as input.

Each entry follows the patten:

   [ISL_FORMAT_R32G32B32A32_FLOAT] = {
      ISL_FORMAT_R32G32B32A32_FLOAT,
      .bs = 16, .bpb = 128,
      .bw = 1, .bh = 1, .bd = 1,
      .channels = {
          .r = { ISL_SFLOAT, 32 },
          .g = { ISL_SFLOAT, 32 },
          .b = { ISL_SFLOAT, 32 },
          .a = { ISL_SFLOAT, 32 },
          .l = {},
          .i = {},
          .p = {},
      },
      .colorspace = ISL_COLORSPACE_LINEAR,
      .txc = ISL_TXC_NONE,
   },
2015-11-12 12:21:46 -08:00
Chad Versace
7986efc644 isl: Add CSV of format layouts
Add file isl_format_layout.csv, which describes the block layout,
channel layout, and colorspace of all hardware surface formats.
2015-11-12 11:56:16 -08:00
Chad Versace
67362698a9 isl: Add enum isl_format 2015-11-12 11:34:45 -08:00
Matt Turner
74e48e9544 i965: Check instructions appear only on supported hardware.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-11-12 11:06:08 -08:00
Matt Turner
0b45d47f71 i965: Add initial assembly validation pass.
Initially just checks that sources are non-NULL, which would have
alerted us to the problem fixed by commit 6c846dc5.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-11-12 11:06:04 -08:00
Matt Turner
34ed45557e i965: Add annotation_insert_error() and support for printing errors.
Will allow annotations to contain error messages (indicating an
instruction violates a rule for instance) that are printed after the
disassembly of the block.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-11-12 11:00:10 -08:00
Matt Turner
a280e83d71 i965: Combine assembly annotations if possible.
Often annotations are identical between sets of consecutive
instructions. We can perhaps avoid some memory allocations by reusing
the previous annotation.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-11-12 11:00:10 -08:00
Matt Turner
93e371c140 i965: Set annotation_info's mem_ctx.
It was being memset to 0 previously.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2015-11-12 11:00:10 -08:00
Matt Turner
9ab45b4df9 i965: Don't consider control flow instructions to have sources.
And why did IFF have a destination?

I suspect that once upon a time the disassembler used this information
to know which fields to find the jump targets in. The jump targets have
moved, so the disassembler has to know how to handle these
per-generation anyway.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-11-12 11:00:10 -08:00
Matt Turner
0865e743c1 i965: Fill out instruction list.
Add some instructions: illegal, movi, sends, sendsc.

Remove some instructions with reused opcodes: msave, mrestore, push,
pop, goto. I did have some gross code for disassembling opcodes
per-generation, but there's very little meaningful overlap so it's
probably not needed.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-11-12 11:00:10 -08:00
Matt Turner
238877207e ralloc: Set *start in ralloc_vasprintf_rewrite_tail() if str is NULL.
We were leaving it undefined, even though we were writing a string to
*str.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-11-12 11:00:10 -08:00
Matt Turner
903050694b i965: Consolidate is_3src() functions.
Otherwise I'll have to add another later in this series.
2015-11-12 11:00:10 -08:00
Brian Paul
3e74038280 st/wgl: add a comment about recursive locking in stw_make_current()
Reviewed-by: Sinclair Yeh <syeh@vmware.com>
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
2015-11-12 11:21:25 -07:00
Brian Paul
f45b644e11 st/wgl: add a lock assertion in stw_framebuffer_from_hwnd_locked()
Reviewed-by: Sinclair Yeh <syeh@vmware.com>
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
2015-11-12 11:21:25 -07:00
José Fonseca
a1c9feafd5 st/wgl: add some mutex checking code
This would have caught the locking bug that was fixed in the earlier
"st/wgl: fix locking issue in stw_st_framebuffer_present_locked()"
patch.

v2: minor coding style changes by Brian.

Reviewed-by: Sinclair Yeh <syeh@vmware.com>
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
2015-11-12 11:21:25 -07:00
Brian Paul
166769fe4b st/wgl: rename stw_framebuffer_release() to stw_framebuffer_unlock()
To match the new stw_framebuffer_lock() function.

Reviewed-by: Sinclair Yeh <syeh@vmware.com>
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
2015-11-12 11:21:25 -07:00
Brian Paul
dabc423ed0 st/wgl: reimplement stw_framebuffer::mutex with CRITICAL_SECTION
v2: update comments on the stw_framebuffer::mutex field regarding locking
order.

Reviewed-by: Sinclair Yeh <syeh@vmware.com>
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
2015-11-12 11:21:25 -07:00
Brian Paul
f71508ae79 st/wgl: include u_debug.h
To get declaration for debug_printf() directly instead of getting it
indirectly through os_thread.h

Reviewed-by: Sinclair Yeh <syeh@vmware.com>
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
2015-11-12 11:21:25 -07:00
Brian Paul
fce68832c5 st/wgl: reimplement stw_device::fb_mutex with CRITICAL_SECTION
Reviewed-by: Sinclair Yeh <syeh@vmware.com>
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
2015-11-12 11:21:25 -07:00
Brian Paul
fa30de7643 st/wgl: re-implement stw_device::ctx_mutex with CRITICAL_SECTION
This is Windows-only code so we can use the native Win32 functions for
critical sections.  This will also allow us to (cleanly) add some mutex
check/debug code in subsequent patches.

Reviewed-by: Sinclair Yeh <syeh@vmware.com>
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
2015-11-12 11:21:24 -07:00
Brian Paul
a02385cd69 gallium/hud: add cpu graph support for Windows
We support "cpu" but not "cpu#" because there's no good way of querying
per-cpu usage.  Also, the cpu usage is for the process, not the whole
system.

Original code cobbled together by Brian and then fixed/polished by Jose.

Signed-off-by: Brian Paul <brianp@vmware.com>
2015-11-12 09:11:15 -07:00
Tapani Pälli
f2fe607261 glsl: set matrix_stride for non matrices with atomic counter buffers
Patch sets matrix_stride as 0 for non matrix uniforms that are in a
atomic counter buffer. Matrix stride calculation for actual matrix
uniforms is done during link_assign_uniform_locations.

From ARB_program_interface_query specification:

GL_MATRIX_STRIDE:

   "For active variables not declared as a matrix or array of matrices,
   zero is written to <params>.  For active variables not backed by a
   buffer object, -1 is written to <params>, regardless of the variable
   type."

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Marta Lofstedt <marta.lofstedt@intel.com>
2015-11-12 14:15:29 +02:00
Tapani Pälli
7e6dac1186 mesa: validate precision of varyings during ValidateProgramPipeline
Fixes following failing ES3.1 CTS tests:

   ES31-CTS.sepshaderobjs.InterfacePrecisionMatchingFloat
   ES31-CTS.sepshaderobjs.InterfacePrecisionMatchingInt
   ES31-CTS.sepshaderobjs.InterfacePrecisionMatchingUInt

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
2015-11-12 09:50:14 +02:00
Tapani Pälli
5bd122cad9 glsl: do not lose precision information when packing varyings
This information will be used by cross stage validation of varyings
for pipeline objects.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
2015-11-12 09:50:14 +02:00
Iago Toral Quiroga
f84bc57d7d glsl: Add precision information to ir_variable
We will need this later on when we implement proper support for
precision qualifiers in the drivers and also to do link time checks for
uniforms as indicated by the spec.

This patch also adds compile-time checks for variables without precision
information (currently, Mesa only checks that a default precision is set
for floats in fragment shaders).

As indicated by Ian, the addition of the precision information to
ir_variable has been done using a bitfield and pahole to identify an
available hole so that memory requirements for ir_variable stay the
same.

v2 (Ian):
  - Avoid if-ladders by defining arrays of supported sampler names and
    indexing
    into them with type->sampler_array + 2 * type->sampler_shadow
  - Make the code that selects the precision qualifier to use an utility
    function
  - Fix a typo

v3 (Tapani):
  - rebased
  - squashed in "Precision qualifiers are not allowed on structs"
  - fixed select_gles_precision for sampler arrays
  - fixed precision_qualifier_allowed for arrays of structs

v4 (Tapani):
  - add atomic_uint handling
  - do not allow precision qualifier on images
  (issues reported by Marta)

v5 (Tapani):
  - support precision qualifier on image types

v6 (Tapani):
  - set precision qualifier on interface block members

Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
2015-11-12 09:50:13 +02:00
Iago Toral Quiroga
9a00e1a69d glsl: Move the definition of precision_qualifier_allowed
We will need this to build later patches

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
2015-11-12 09:50:13 +02:00
Iago Toral Quiroga
e6629d814f glsl: Add user-defined default precision qualifiers to the symbol table
Notice that the spec requires that a default precision has been set for every
type used by a shader that can use a precision qualifier and does not have a
predefined precision, however, at the moment, Mesa only checks this for floats
in the fragment shader. This is probably because the GLSL ES 1.0 specs mentions
this case specifically, but GLSL ES 3.0 clarifies that the same applies to
other types:

"The fragment language has no default precision qualifier for floating point
 types. Hence for float, floating point vector and matrix variable
 declarations, either the declaration must include a precision qualifier or
 the default float precision must have been previously declared. Similarly,
 there is no default precision qualifier for the following sampler types in
 either the vertex or fragment language:

 sampler3D;
 samplerCubeShadow;
 sampler2DShadow;
 sampler2DArray;
 sampler2DArrayShadow;
 isampler2D;
 isampler3D;
 isamplerCube;
 isampler2DArray;
 usampler2D;
 usampler3D;
 usamplerCube;
 usampler2DArray;"

we will fix this in a later patch.

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
2015-11-12 09:50:13 +02:00
Iago Toral Quiroga
e3082fb273 glsl: Add default precision qualifiers to the symbol table
The GLSL ES spec specifies default precision qualifiers for certain types,
so populate the symbol table with these.

Notice that the desktop GLSL spec also indicates defaults for some types
but this is not really useful since precision qualifiers are completely
ignored in desktop GLSL.

v2: simplify and add samplerExternalOES, specified by
    OES_EGL_image_external (Tapani)

v3: add atomic_uint (reported missing by Marta)

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
2015-11-12 09:50:13 +02:00
Iago Toral Quiroga
d6a6167354 glsl: Add API to put default precision qualifiers in the symbol table
These have scoping rules that match the ones defined for other things such
as variables, so we want them in the symbol table.

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
2015-11-12 09:50:13 +02:00
Samuel Iglesias Gonsálvez
d4fdb84f80 i965/fs/nir: fix the number of register written by FS_OPCODE_GET_BUFFER_SIZE
FS_OPCODE_GET_BUFFER_SIZE is calculated with a resinfo's sampler message.

This patch adjusts the number of registers written by the opcode
following what the PRM spec says about the number of registers written
by the SIMD8 and SIMD16's writeback messages for sampler messages.

Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-11-12 08:39:14 +01:00
Ben Widawsky
55314c5be4 i965/skl/gt4: Fix URB programming restriction.
The comment in the code details the restriction. Thanks to Ken for having a very
helpful conversation with me, and spotting the blurb in the link I sent him :P.

There are still stability problems for me on GT4, but this definitely helps with
some of the failures.

v2: Comment fixes

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-11-11 18:13:19 -08:00
Ilia Mirkin
c4182bb9b0 nv50,nvc0: add ARB_clear_texture support
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-11-11 19:20:41 -05:00
Ilia Mirkin
ae39b0fda8 st/mesa: implement ARB_clear_texture
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2015-11-11 19:20:41 -05:00
Ilia Mirkin
3695b253f9 gallium: add PIPE_CAP_CLEAR_TEXTURE and clear_texture prototype
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2015-11-11 19:20:41 -05:00
Timothy Arceri
725fcdfbb1 glsl: add helper to check for enhanced layouts support
Reviewed-by: Emil Velikov <emil.velikov@collabora.co.uk>
2015-11-12 10:18:14 +11:00
Timothy Arceri
82e4f22d1e mesa: add ARB_enhanced_layouts
Reviewed-by: Emil Velikov <emil.velikov@collabora.co.uk>
2015-11-12 10:18:08 +11:00
Dave Airlie
df8af7d751 r600: initialised PGM_RESOURCES_2 for ES/GS
This fixes the corruption on rendering that we are seeing in
certain geometry shaders.

Fixes:  https://bugs.freedesktop.org/show_bug.cgi?id=91780
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Tested / Reviewed-by: Glenn Kennard <glenn.kennard@gmail.com>
Cc: "10.6" "11.0" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-11-12 09:03:13 +10:00
Kenneth Graunke
918bda23dd i965: Split nir_emit_intrinsic by stage with a general fallback.
Many intrinsics only apply to a particular stage (such as discard).
In other cases, we may want to interpret them differently based on
the stage (such as load_primitive_id or load_input).

The current method isn't that pretty - we handle all intrinsics in
one giant function.  Sometimes we assert on stage, sometimes we forget.
Different behaviors are handled via if-ladders based on stage.

This commit introduces new nir_emit_<stage>_intrinsic() functions,
and makes nir_emit_instr() call those.  In turn, those fall back to
the generic nir_emit_intrinsic() function for cases they don't want
to handle specially.

This makes it clear which intrinsics only exist in one stage, and makes
it easy to handle inputs/outputs differently for various stages.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2015-11-11 11:57:37 -08:00