Commit graph

422 commits

Author SHA1 Message Date
Grazvydas Ignotas
29f46488cc ac/nir: remove misleading condition
location is never set to INTERP_SAMPLE, and Nicolai comments:
"... that part is misleading. location refers to the base location, not
the final location of the sample, and it can never be INTERP_SAMPLE."

Suggested-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Signed-off-by: Grazvydas Ignotas <notasas@gmail.com>
2017-08-29 01:36:57 +03:00
Grazvydas Ignotas
2b4e31bc9b ac/nir: silence maybe-uninitialized warnings
These are likely false positives, but are also annoying because they
show up on every "make install", which causes ac_nir_to_llvm to be
rebuilt here. Initializing those variables to NULL should be harmless
even when unnecessary.

Signed-off-by: Grazvydas Ignotas <notasas@gmail.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-08-29 01:16:58 +03:00
Grazvydas Ignotas
15800180f3 amd: add .editorconfig
amd/common/ and amd/vulkan/ are using tabs for indent, which doesn't
match the settings in root .editorconfig, so let's override.

Signed-off-by: Grazvydas Ignotas <notasas@gmail.com>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-08-29 01:08:58 +03:00
Marek Olšák
39205f216e gallium/radeon: set EVENT_WRITE_EOP.INT_SEL = wait for write confirmation
Ported from Vulkan.
Not sure what this is good for.. maybe write confirmation from L2 flushes?

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-08-28 21:45:33 +02:00
Marek Olšák
d500c9b060 Revert "radeonsi: get the raster config from AMDGPU on SI"
This reverts commit fc99cb3c9e.

"The performance went down from 64.7 to 51.4 fps in Valley and from 30.8 to
25.1 fps in Heaven on Radeon HD 7970. Other games seem to have also a 10-25%
performance decrease."

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102429

It looks like we can't use the raster config values from the kernel.
2017-08-27 22:27:23 +02:00
Mauro Rossi
725741f10d ac/debug: use util_strchrnul() to fix android build error
Similar to e09d04cd56 "radeonsi: use util_strchrnul() to fix android build error"

Android Bionic does not support strchrnul() string function,
gallium auxiliary util/u_string.h provides util_strchrnul()

This change avoids the following warning and error:

external/mesa/src/amd/common/ac_debug.c:501:15: warning: implicit declaration of function 'strchrnul' is invalid in C99
                char *end = strchrnul(out, '\n');
                            ^
external/mesa/src/amd/common/ac_debug.c:501:9: error: incompatible integer to pointer conversion initializing 'char *' with an expression of type 'int'
                char *end = strchrnul(out, '\n');
                      ^     ~~~~~~~~~~~~~~~~~~~~
1 warning and 1 error generated.

Fixes: c2c3912410 "ac/debug: annotate IB dumps with the raw values"
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Rob Herring <robh@kernel.org>
2017-08-24 17:23:24 -05:00
Marek Olšák
fc99cb3c9e radeonsi: get the raster config from AMDGPU on SI
Not sure yet if we wanna do this on CIK and VI too.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-08-24 23:54:55 +02:00
Bas Nieuwenhuizen
180c1b924e ac/nir: Add shader support for multiviews.
It uses an user SGPR to pass the view index to the shaders, except
for the fragment shader where we use layer=view (which comes in
handy when we want to do the NV ext that allows us to execute pre-FS
stages once instead of per view).

Reviewed-by: Dave Airlie <airlied@redhat.com>
2017-08-24 19:20:47 +02:00
Bas Nieuwenhuizen
eec5578158 ac/nir: Make shader key a struct.
Some bits can be passed to almost every shader, and I don't like
adding 5 variables.

Reviewed-by: Dave Airlie <airlied@redhat.com>
2017-08-24 19:20:47 +02:00
Bas Nieuwenhuizen
3d5f29f5f9 ac/nir: Implement input attachments with layered rendering.
Reviewed-by: Dave Airlie <airlied@redhat.com>
2017-08-24 19:20:47 +02:00
Bas Nieuwenhuizen
c848e642d2 ac/nir: Determine if input attachments are used in the info pass.
Reviewed-by: Dave Airlie <airlied@redhat.com>
2017-08-24 19:20:47 +02:00
Bas Nieuwenhuizen
43595db302 ac/nir: Cast sources of integer ops to int.
The int32->float semantic conversion got dropped in a testcase,
because the src was already float. On closer inspection I decided
to add a few more casts for integer op operands to be safe too.

Cc: 17.2 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Dave Airlie <airlied@redhat.com>
2017-08-24 19:20:47 +02:00
Bas Nieuwenhuizen
6bafb56df6 radv: Implement bc optimize.
Seems like we actually enabled it already, but did not implement
the shader part. With this patch we do.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
2017-08-24 00:57:03 +02:00
Bas Nieuwenhuizen
a7f5545ede ac/nir: refactor input variable iteration.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
2017-08-24 00:57:03 +02:00
Nicolai Hähnle
8937ac9a13 ac/debug: invoke valgrind checks while parsing IBs
Help catch garbage data written into IBs.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-08-23 13:54:07 +02:00
Nicolai Hähnle
c2c3912410 ac/debug: annotate IB dumps with the raw values
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-08-23 13:54:05 +02:00
Nicolai Hähnle
cfb3824c23 ac/debug: use an explicit getter for fetching words from the IB
Guard against out-of-bounds accesses, and prepare for upcoming changes.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-08-23 13:54:03 +02:00
Marek Olšák
759526813b ac/surface/gfx9: don't allow DCC for the smallest mipmap levels
This fixes garbage there if we don't flush TC L2 after rendering.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-08-22 13:29:47 +02:00
Marek Olšák
776fcccabf gallium/radeon: clean up EOP_DATA_SEL magic numbers
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-08-22 13:29:47 +02:00
Marek Olšák
fdef2f0fd1 radeonsi/gfx9: properly handle imported textures with unexpected swizzle mode
Cc: 17.2 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-08-22 13:29:47 +02:00
Nicolai Hähnle
fbbb5f71cd amd/common: split out ac_parse_ib_chunk from ac_parse_ib
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-08-22 09:50:46 +02:00
Dave Airlie
b040f51b61 ac/nir: fixup layer/viewport export for GFX9.
GFX9 moved where the viewport index export goes.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Cc: "17.2" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-08-21 04:26:37 +01:00
Dave Airlie
4c02e2bd95 radv: disable texture gather workaround on gfx9.
Not required anymore.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Cc: "17.2" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-08-17 02:24:36 +01:00
Marek Olšák
4630ede102 ac: fail shader compilation if libelf is replaced by an incompatible version
UE4Editor has this issue.

This commit prevents hangs (release build) or assertion failures (debug
build). It doesn't fix the editor, but catastrophic scenarios are
prevented.

Cc: 17.1 17.2 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2017-08-10 13:24:23 +02:00
Connor Abbott
c12c2e40a3 ac/nir: fix saturate emission
The .f32 was already getting added by emit_intrin_2f_param(). Noticed
when enabling LLVM module verification.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2017-08-08 11:58:21 -07:00
Dave Airlie
3f389f75b6 radv: fix f16->f32 denorm handling for SI/CIK. (v2)
This just copies the code from the -pro shaders,
and fixes the tests on CIK.

With this CIK passes the same set of conformance
tests as VI.

Fixes: 83e58b03 (radv: flush f32->f16 conversion denormals to zero. (v2))
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-08-07 00:00:05 +01:00
Andres Rodriguez
6130c8e6e7 ac/gpu: add driver/device UUID query helpers
We need vulkan and gl to produce the same UUIDs. Therefore we should
keep the mechanism to compute these in a common location to guarantee
they are updated in lockstep.

Signed-off-by: Andres Rodriguez <andresx7@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-08-06 12:42:07 +10:00
Marek Olšák
c60c5accd1 ac/surface: align DCC size for surfaces that use tile swizzle
Note that dcc_alignment = pipe_interleave_bytes * num_pipes * num_banks,
which is greater than the previous open-coded alignment.

Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-08-04 02:10:04 +02:00
Marek Olšák
0141beadd8 ac/surface: limit tile swizzle to non-mipmaps on SI
Mipmapping with tile swizzle doesn't work.

Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-08-04 02:10:04 +02:00
Marek Olšák
2b7e85562a ac/surface: enable tile swizzle for mipmapped textures
The tile swizzle computation was done after the whole miptree was computed,
but that was too late, because at that point AddrSurfInfoOut contained
information about the smallest miplevel, which is never 2D-tiled.

The correct way is to do the computation before the second level is computed.

Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-08-04 02:10:04 +02:00
Marek Olšák
6fb382d9fb ac/surface: set structure size and handle errors for AddrComputeBaseSwizzle
Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-08-04 02:10:04 +02:00
Marek Olšák
59144d4bf5 ac/surface: increment surf_index only when tile swizzle is allowed
Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-08-04 02:10:04 +02:00
Marek Olšák
9059400247 ac/surface: compute tile swizzle only when it's allowed
Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-08-04 02:10:04 +02:00
Marek Olšák
4e757d591d ac/surface: add RADEON_SURF_SHAREABLE
Shareable textures won't use tile swizzle.

Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-08-04 02:10:04 +02:00
Marek Olšák
d311e837f4 ac/surface: remove RADEON_SURF_HAS_TILE_MODE_INDEX
it's useless

Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-08-04 02:10:04 +02:00
Marek Olšák
4662e45350 ac/surface: move tile_swizzle to ac_surface and document it
Gfx9 will use it too.

Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-08-04 02:10:04 +02:00
Nicolai Hähnle
dfc1502c84 radeonsi: fix streamout overflow predication on VI+
There is a firmware regression that causes failures. Work around it by
using the compute shader for query_buffer_objects to summarize the query
results.

v2: rename to PREDICATION_OP_BOOL64 (consistent with sid.h)

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-08-02 09:48:53 +02:00
Bas Nieuwenhuizen
341578a6ae ac/nir: Add float cast before shadow comparator clamp.
LLVM complained about passing an i32 to a float clamp.

Signed-off-by: Bas Nieuwenhuizen <basni@google.com>
Fixes: 0f9e32519b "ac/nir: clamp shadow texture comparison value on VI"
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-08-02 08:43:13 +02:00
Dave Airlie
cb6f16dce9 radeon/ac: use ds_swizzle for derivs on si/cik.
This looks like it's supported since llvm 3.9 at least,
so switch over radeonsi and radv to using it, -pro also
uses this. We can now drop creating lds for these operations
as the ds_swizzle operation doesn't actually write to lds at all.

Acked-by: Marek Olšák <marek.olsak@amd.com>
(stable requested due to fixing radv CIK conformance tests)
Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-08-02 00:12:01 +01:00
Connor Abbott
ddd9e11795 ac/nir: fix nir_op_unpack_64_2x32_split_y emission
This was broken thanks to a typo in b2367cf.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-08-01 12:20:49 -07:00
Connor Abbott
6d731c5651 ac/nir: fix lsb emission
This makes it match radeonsi. The LLVM backend itself will emit the
correct instruction, but LLVM might do incorrect optimizations since it
thinks the output is undefined when the input is 0, even though it's not
supposed to be. We really need a new intrinsic, or for the backend to
become smarter and recognize this pattern.

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Bas Nieuwenhuizen <basni@google.com>
2017-08-01 12:20:49 -07:00
Dave Airlie
df61a05019 radv: handle 10-bit format clamping workaround.
This fixes:
dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.*
for a2r10g10b10 formats as destination on SI/CIK hardware.

This adds support to the meta program for emitting 10-bit
outputs, and adds 10-bit support to the fragment shader key.

It also only does the int8/10 on SI/CIK.

Fixes: f4e499ec7 (radv: add initial non-conformant radv vulkan driver)
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-08-01 00:10:23 +01:00
Nicolai Hähnle
b7d36efc2d ac/nir: implement load_frag_coord intrinsic
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-07-31 14:55:44 +02:00
Nicolai Hähnle
bcf85fcd9a ac/nir: pass ac_llvm_context to unpack_param
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-07-31 14:55:44 +02:00
Nicolai Hähnle
1c64637c26 ac/nir,radeonsi: add and use ac_shader_abi::frag_pos
v2: update for LLVMValueRefs in ac_shader_abi

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-07-31 14:55:43 +02:00
Nicolai Hähnle
f03c54e05a ac/nir,radeonsi: add and use ac_shader_abi::{ancillary,sample_coverage}
v2: update for LLVMValueRefs in ac_shader_abi

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-07-31 14:55:43 +02:00
Nicolai Hähnle
7de445377c ac/nir,radv: move force_persample to ac_shader_info::force_persample
Avoid accessing radv-specific structures during the meat of NIR-to-LLVM
translation.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-07-31 14:55:43 +02:00
Nicolai Hähnle
a69afb68c9 radeonsi: use new function ac_build_umin for edgeflag clamping
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-07-31 14:55:42 +02:00
Nicolai Hähnle
0f9e32519b ac/nir: clamp shadow texture comparison value on VI
Needed for TC-compatible HTILE in radeonsi for test cases like
piglit spec/arb_texture_rg/execution/fs-shadow2d-red-01.shader_test

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-07-31 14:55:42 +02:00
Nicolai Hähnle
ac2ab5acad ac/nir: add always_vector argument to ac_build_gather_values_extended
This simplifies a bunch of places that no longer need special treatment
of value_count == 1. We rely on LLVM to optimize away the 1-element vector
types.

This fixes a bunch of bugs where 1-element arrays are indexed indirectly.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-07-31 14:55:42 +02:00