Commit graph

218828 commits

Author SHA1 Message Date
Rob Clark
28eadff6e4 freedreno/registers: Split out "blit" usage
Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39819>
2026-02-19 00:56:43 +00:00
Rob Clark
5a2def3200 freedreno/registers: Rename some unknown A2D regs
Also, these are only in a6xx, update variants accordingly.

Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39819>
2026-02-19 00:56:43 +00:00
Rob Clark
a4f8a3a529 freedreno/registers: Move binning regs to "cmd"
Move VSC and other binning related registers to "cmd" usage, to better
reflect their use.

Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39819>
2026-02-19 00:56:43 +00:00
Rob Clark
4b1cfc1b6a tu: Mark TU_CMD_DIRTY_COMPUTE_DESC_SETS after stomping
The rp_blit regstomping will stomp SP_CS_BINDLESS_BASE.  We need to
re-emit this state after stomping.

Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39819>
2026-02-19 00:56:43 +00:00
Rob Clark
e9b1b46faf tu: Split out stomp_regs() helper
A future commit will split out rp_blit usage into multiple more
fine-grained usages.  Make this easier to accomodate.

Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39819>
2026-02-19 00:56:43 +00:00
Rob Clark
0f1b1bf7a8 freedreno/registers: Update GRAS_BIN_FOVEAT
New bitfield for enabling FDM offsets in gen8.

Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39819>
2026-02-19 00:56:43 +00:00
Rob Clark
67dd667a62 freedreno/registers: Update CP_COND_WRITE
Noticed a new bit on gen8.

Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39819>
2026-02-19 00:56:43 +00:00
Rob Clark
66a394ad9a freedreno/decode: Fix endswith()
The existing implementation did not account for register names that
contain the suffix multiple times (ie. FOO_HIT_COUNT_HI).

Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39819>
2026-02-19 00:56:43 +00:00
Alyssa Rosenzweig
e172f97fdd nir/opt_constant_folding: optimize ballot(false)
Some checks are pending
macOS-CI / macOS-CI (dri) (push) Waiting to run
macOS-CI / macOS-CI (xlib) (push) Waiting to run
always zero. noticed on dEQP-VK.subgroups.ballot.graphics.graphic

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39948>
2026-02-18 23:40:44 +00:00
Jianxun Zhang
7899854e62 driconf: Refactor CCS modifier disabling entry
It can be in the above block that has the same gtk
version range. This is a following up of review

https://gitlab.freedesktop.org/mesa/mesa/-/
merge_requests/39223#note_3329542

Suggested-by: Tapani Pälli <tapani.palli@intel.com>

Signed-off-by: Jianxun Zhang <jianxun.zhang@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39950>
2026-02-18 22:57:31 +00:00
Mike Blumenkrantz
d47ba92d42 zink: only do pre-sync transfer barrier after a renderpass
Some checks are pending
macOS-CI / macOS-CI (dri) (push) Waiting to run
macOS-CI / macOS-CI (xlib) (push) Waiting to run
this is otherwise pointless and (for swapchain images) broken
(because they may never have acquired an image)

discovered by @valentine

cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39970>
2026-02-18 22:07:36 +00:00
Natalie Vock
47e4a68a83 radv: Initialize nir_lower_io_to_scalar progress variable
The NIR_PASS macro only overwrites this when the pass actually makes
progress. If the pass doesn't make progress, the variable stays
uninitialized.

Clang correctly spots this and warns about it.

Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39968>
2026-02-18 21:44:49 +00:00
Mike Blumenkrantz
44f2c40830 zink: fix broken compiler assert
cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39961>
2026-02-18 21:23:44 +00:00
Eric Engestrom
2a9bb91a97 nvk+zink/ci: add rusticl testing
Adds almost 2 minutes of runtime but we don't care anyway because this
is a nightly job :)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30073>
2026-02-18 20:19:41 +00:00
Eric Engestrom
48d3eb8d89 ci/build: include rusticl in debian-build-x86_64
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30073>
2026-02-18 20:19:41 +00:00
Frank Binns
74fd985c6c pvr/ci: move some timing out tests from fails to skips
Some checks are pending
macOS-CI / macOS-CI (dri) (push) Waiting to run
macOS-CI / macOS-CI (xlib) (push) Waiting to run
Some of these test cases where already in the skip list.

Signed-off-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39962>
2026-02-18 20:01:02 +00:00
Natalie Vock
59a397793e radv/rt: Only use ds_bvh_stack_rtn if the stack base is possible to encode
The hardware only provides 13 bits for encoding the stack base (in
dwords). That translates to the stack base being required to be below
8192 dwords, or 32kB. It's possible to exceed this - LDS is 64kB after
all. Add an explicit check to make sure we don't end up with offsets
that overflow the hw's address fields. This fixes Metro Exodus Enhanced
Edition, which was using ray queries in a 1024-thread sized workgroup,
resulting in exactly 64kB of LDS being required for the stack.

This check isn't required for RT pipelines as we always use 32 or 64
wide workgroups with no other LDS used, so it's impossible to reach this
stack base limit.

Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39691>
2026-02-18 19:12:18 +00:00
Collabora's Gfx CI Team
b0cc03dfbd Uprev VVL to snapshot-2026wk07
https://github.com/KhronosGroup/Vulkan-ValidationLayers/compare/snapshot-2026wk06...snapshot-2026wk07

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39907>
2026-02-18 18:30:28 +00:00
Olivia Lee
e10f29399f hk: fix passthrough GS key invalidation
Just seeing that a passthrough GS was already bound is not sufficient to
know that it is a *matching* passthrough GS. If the application binds a
new VS that requires a different passthrough GS key than the previous
VS, then we need to bind a different passthrough GS.

Fixes: 5bc8284816 ("hk: add Vulkan driver for Apple GPUs")
Signed-off-by: Olivia Lee <olivia.lee@collabora.com>
Reviewed-by: Mary Guillemard <mary@mary.zone>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39624>
2026-02-18 18:10:35 +00:00
Rohan Garg
dfa9df7cfd anv: refactor add_aux_state_tracking_buffer for conciseness
Some checks are pending
macOS-CI / macOS-CI (dri) (push) Waiting to run
macOS-CI / macOS-CI (xlib) (push) Waiting to run
Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39562>
2026-02-18 17:40:10 +00:00
Rohan Garg
11f8f333e2 anv: set a private binding when the image is not externally shared
This allows anv to use a suballocator for the clear color address, which
should decrease our memory requirement.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/13091
Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39562>
2026-02-18 17:40:10 +00:00
Janne Grunau
651a321ee2 hk: Use aligned vector fill in hk_CmdFillBuffer if possible
30% faster with 16KB buffers, more than twice as fast with 8MB and
larger buffers.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39780>
2026-02-18 17:20:48 +00:00
Janne Grunau
5c2d62c030 asahi: Implement clear_buffer using libagx_fill*
Use either libagx_fill_uint4 or libagx_fill based of size and object
alignment for clear_sizes which are a power of two up to 16.
Reported fill rate for 256MB buffers on a M1 Ultra (G13D) in
gpu-ratemeter is 355 GB/s for 16 byte aligned buffers and 155 GB/s for
4 byte aligned buffers.

Signed-off-by: Janne Grunau <janne-fdr@jannau.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39780>
2026-02-18 17:20:48 +00:00
Janne Grunau
3f5497ded8 asahi: Use GPU for buffer copies in resource_copy_region()
Use a compute shader to copy PIPE_BUFFERs. Based on hk's hk_cmd_copy().
For large copy sizes (>= 128MB) it achieves 3/4 of the available memory
bandwidth on a M1 Ultra (G13D). `gpu-ratemeter gl.bufbw` reports
~625 GB/s for 256MB buffer size. Apple specifies the memory bandwidth of
the M1 Ultra with 819.2 GB/s.

Signed-off-by: Janne Grunau <j@jannau.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39780>
2026-02-18 17:20:48 +00:00
Georg Lehmann
b05271f16c ci: disable debian-ppc64el and debian-s390x
They failed a lot today, no idea why. But having flakes in pre merge CI sucks.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39963>
2026-02-18 16:48:14 +00:00
Rob Clark
8cc99edb7b nir: Fill in missing conversion opts
Some checks are pending
macOS-CI / macOS-CI (dri) (push) Waiting to run
macOS-CI / macOS-CI (xlib) (push) Waiting to run
I noticed we were missing:

    (('u2f16', ('u2u64', 'a@32')), ('u2f16', a))

This was do to coupling the u2f/i2f opts with i2i/u2u in the same loop
(with different positionals).  The `if B <= S\ncontinue` doesn't apply
to the second part.  So just split these into two loops.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/14848
Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39899>
2026-02-18 15:13:21 +00:00
Rhys Perry
fd22c48b2a nir/algebraic: remove ignore_exact
This was used because the exact bit meant something different for
comparisons than it did for the replacement expression, but that isn't the
case anymore.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39809>
2026-02-18 14:04:22 +00:00
Rhys Perry
f44de53586 nir: only set fp_math_ctrl if meaningful
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39809>
2026-02-18 14:04:22 +00:00
Rhys Perry
12df083e0b nir: fix fmin_agx/fmax_agx constant folding
This seems to have two issues:
- since d7e88c0ccd, denormals would be flushed
- it did a f32->u32 conversion

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39809>
2026-02-18 14:04:22 +00:00
Frank Binns
cded3f213b pvr/ci: update fails to remove two tests that have started passing
Signed-off-by: Frank Binns <frank.binns@imgtec.com>
Reviewed-by: Simon Perretta <simon.perretta@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39916>
2026-02-18 13:45:39 +00:00
Frank Binns
929fc82b2f pvr: remove asserts in pvr_get_image_subresource_layout()
These asserts were there to validate this bit of the Vulkan spec:

   VUID-vkGetImageSubresourceLayout-mipLevel-01716
   The mipLevel member of pSubresource must be less than the mipLevels specified in image

   VUID-vkGetImageSubresourceLayout-arrayLayer-01717
   The arrayLayer member of pSubresource must be less than the arrayLayers specified in
   image

However, this function isn't just called via vkGetImageSubresourceLayout(), but
from elsewhere in the driver. At least in the case of arrayLayer, the assert
doesn't always hold true, for example, in the case of deferred RTA clears on a
2D array image view of a 3D image.

The array layer assert was being hit by the following test cases:
dEQP-VK.renderpass.remaining_array_layers.multi_layer_fb.*
dEQP-VK.renderpass2.remaining_array_layers.multi_layer_fb.*

As the asserts don't really add any value, rather than moving them into
pvr_GetImageSubresourceLayout(), just drop them entirely.

Fixes: ae29e1cf76 ("pvr: drop pvr_assert macro")
Signed-off-by: Frank Binns <frank.binns@imgtec.com>
Reviewed-by: Simon Perretta <simon.perretta@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39916>
2026-02-18 13:45:39 +00:00
Luigi Santivetti
7a6d3c2815 Revert "pvr: Fixup for deqp-vk.api 2d.optimal.* conformance"
The change being reverted relaxes the check for what formats
can be used for sampling and rendering beyond driver capabilities.

Revert it in order to mitigated regressions in nightly CI.
A follow up change will be needed for handling
dEQP-VK.api.info.image_format_properties.2d.optimal.*.

This reverts commit 58c7437d3a.

Signed-off-by: Luigi Santivetti <luigi.santivetti@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39916>
2026-02-18 13:45:39 +00:00
Luigi Santivetti
35a3cb8e2a pvr: stop using samples to determine what src and dst formats
The code was missing a number of special cases for the TQ.

For blits, there is a whole set of conditions that need accounting
for setting the input and output transfer queue surface formats.
When resolving DS, special flags need to be set according to src
and dst format, but this is only one case. Rework this whole logic.

Signed-off-by: Luigi Santivetti <luigi.santivetti@imgtec.com>
Acked-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39916>
2026-02-18 13:45:39 +00:00
Luigi Santivetti
099ab34977 pvr: drop redundant check on VK_FORMAT_X8_D24_UNORM_PACK32
vk_format_has_stencil() returns false for VK_FORMAT_X8_D24_UNORM_PACK32.

Signed-off-by: Luigi Santivetti <luigi.santivetti@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39916>
2026-02-18 13:45:39 +00:00
Luigi Santivetti
9f5cc58919 pvr: allow pvr_get_copy_format to handle ycbcr formats
Signed-off-by: Luigi Santivetti <luigi.santivetti@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39916>
2026-02-18 13:45:39 +00:00
Simon Perretta
9a25926bf3 pvr: set transfer flags based on derived formats
The src and dst formats can get modified while setting up the transfer;
ensure the transfer flags and the transfer op are set based on the final
derived formats.

Signed-off-by: Simon Perretta <simon.perretta@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39916>
2026-02-18 13:45:39 +00:00
Luigi Santivetti
c489e0f45e pvr: fixup for wrong conflict resolution in rebase
Caused by a bad rebase in !39654 on top of ycbcr change fa6704a523.

Fixes: 6a65b5dd4d ("pvr: fix src/dst image formats for DS resolve ops")
Signed-off-by: Luigi Santivetti <luigi.santivetti@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39916>
2026-02-18 13:45:39 +00:00
Luigi Santivetti
339a838b46 pvr: fix ds merge logic for blit image to image
Fixes: 407e692c3 ("pvr: fix logic for setting DSMERGE and PICKD")
Signed-off-by: Luigi Santivetti <luigi.santivetti@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39916>
2026-02-18 13:45:39 +00:00
Christian Gmeiner
3df3b97acb etnaviv: blt: Fix clear_bits overflow for 32-bit formats
Some checks are pending
macOS-CI / macOS-CI (dri) (push) Waiting to run
macOS-CI / macOS-CI (xlib) (push) Waiting to run
For formats with 32-bit channels (R32F, R32I, R32UI, etc.), the
expression (1 << channel_size) - 1 is undefined behavior in C when
channel_size is 32, as shifting a 32-bit integer by 32 bits overflows.
On most platforms this produces mask=0, resulting in BLT.CLEAR_BITS=0x0
which tells the hardware to write no pixel data during clear operations.

Use 1ull to perform the shift in 64-bit, correctly producing 0xFFFFFFFF
for 32-bit channels.

Fixes dEQP-GLES3.functional.fbo.blit.default_framebuffer.r32f_nearest_out_of_bounds_blit_from_default

Fixes: c156da579c ("etnaviv: blt: Enable masked clear for color and stencil")
Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Reviewed-by: Daniel Lang <dalang@gmx.at>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39949>
2026-02-18 11:59:45 +00:00
Rhys Perry
dfad15df0b nir/load_store_vectorize: don't update last_entry after a barrier
fossil-db (navi31):
Totals from 2 (0.00% of 84369) affected shaders:
Instrs: 7738 -> 7740 (+0.03%)
Latency: 333207 -> 333239 (+0.01%)
InvThroughput: 33320 -> 33324 (+0.01%)
VClause: 382 -> 384 (+0.52%)
VMEM: 656 -> 658 (+0.30%)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Fixes: 4ca7ee7bd7 ("nir/opt_load_store_vectorize: Allow to vectorize at most one entry of each type across blocks")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/14825
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39849>
2026-02-18 10:09:14 +00:00
Rhys Perry
b203329e0d nir/load_store_vectorize: more carefully add entries from loop preheader
This would fix both stores 'b' and 'c' from being vectorized:
a = load(0)
loop {
   b = load(0)
   if (break)
   store(0)
}
c = load(0)

fossil-db (navi31):
Totals from 8 (0.01% of 84369) affected shaders:
Instrs: 12035 -> 12066 (+0.26%)
CodeSize: 63016 -> 63208 (+0.30%)
Latency: 176091 -> 177013 (+0.52%)
InvThroughput: 43894 -> 43981 (+0.20%)
SClause: 194 -> 196 (+1.03%)
Copies: 803 -> 812 (+1.12%)
VALU: 7666 -> 7675 (+0.12%)
SALU: 1102 -> 1105 (+0.27%)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Fixes: 4ca7ee7bd7 ("nir/opt_load_store_vectorize: Allow to vectorize at most one entry of each type across blocks")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/14825
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39849>
2026-02-18 10:09:14 +00:00
Eric Engestrom
1ad7db762b nvk+zink/ci: update fails & flakes for nightly jobs
Some checks are pending
macOS-CI / macOS-CI (dri) (push) Waiting to run
macOS-CI / macOS-CI (xlib) (push) Waiting to run
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39955>
2026-02-18 09:54:23 +00:00
Christian Gmeiner
3602b6154e etnaviv: Validate MSAA sample count for depth/stencil formats
Move MSAA sample count validation into a gpu_supports_msaa() helper
and call it early in etna_screen_is_format_supported(). Previously,
the MSAA checks were only done for render targets inside
gpu_supports_render_format(), so depth/stencil formats with
unsupported sample counts were incorrectly reported as supported.

Fixes dEQP-GLES3.functional.fbo.msaa.2_samples.depth24_stencil8

Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Reviewed-by: Daniel Lang <dalang@gmx.at>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39946>
2026-02-18 09:35:01 +00:00
Pavel Ondračka
2b76f2e4a7 mesa: implement FRAMEBUFFER_RENDERABLE internalformat query
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Erik Faye-Lund <erik-faye-lund@collabora.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39896>
2026-02-18 09:05:13 +00:00
Konstantin Seurer
ae84d41d48 radv/meta: Rework saving/restoring state
Some checks are pending
macOS-CI / macOS-CI (dri) (push) Waiting to run
macOS-CI / macOS-CI (xlib) (push) Waiting to run
The current approach of explicitly saving/restoring some states is
unnecessarily complicated and inefficient. For example, some meta OPs
that use memory fills/copies will have nested save/restores. This patch
is the first step towards avoiding unnecessary state re-emits around
meta OPs.

The changes are:
- Move radv_meta_saved_state to radv_cmd_buffer::state
- Add radv_meta_begin/end helpers that initialize radv_meta_saved_state
and restore states used by the meta OP
- Remove all explicit saves/restores, use the new helpers

radv_meta_begin/end is called inside the entrypoint and not some nested
helper function which means that state is only restored once per meta
OP.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39774>
2026-02-18 09:37:55 +01:00
Konstantin Seurer
d3cb2978b8 radv/meta: Add and use helpers for setting state
It's less code and allows the next commit to track which states a meta
command uses.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39774>
2026-02-18 09:37:30 +01:00
Samuel Pitoiset
090b67a163 vulkan/runtime: add support for ETC2 emulation with copy_memory_indirect
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39908>
2026-02-18 07:04:43 +00:00
Samuel Pitoiset
b6f292e146 vulkan/runtime: add a separate function to build ETC2 decode core shader
This will allow us to re-use it for indirect.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39908>
2026-02-18 07:04:43 +00:00
Priya Hosur
0bfad39f15 ac/nir/ngg: re-enable use of known compile-time GS connectivity
Some checks are pending
macOS-CI / macOS-CI (dri) (push) Waiting to run
macOS-CI / macOS-CI (xlib) (push) Waiting to run
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38075>
2026-02-18 01:29:37 +00:00
Ryan Houdek
3b3485efa6 freedreno/fdl: Fix compiling with GCC and AVX2
Some checks are pending
macOS-CI / macOS-CI (dri) (push) Waiting to run
macOS-CI / macOS-CI (xlib) (push) Waiting to run
Clang is more lenient around casting same size vectors between the
different AVX types, GCC on the other hand is not. Add appropriate
casting between the different register typings to make GCC happy.

No functional change.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/14876
Fixes: b554e4c727c90b88a542b86989f6664537658f85
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39951>
2026-02-17 23:07:56 +00:00