It's required by the latest IO refactoring.
screen.rst explains it and it's not pretty. It can be argued that
finalize_nir shouldn't exist.
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32175>
Previously, double-buffer mode would apply to all jobs except msaa,
but this is not smart, since not all jobs can benefit from this. In
particular, if jobs load the tile buffer and don't store tiles
double buffer mode won't be effective and we would instead pay the
cost of the smaller tile size so we only want to enable in jobs
that meet these requirements.
In order to achieve this we need to postpone the decision about
double buffering until we know the loads and stores of the job,
which means we need to do this late after we have recorded draws.
This means that by default, we assume no double-buffer mode is
used and if we find we want to enable after emitting the draws
we need to re-compute tile sizes and rewrite the
TILE_BINNING_MODE_CFG packet accordingly.
Making the decison about double-buffer late will also enable us to
add heuristics to decide about double-buffer based on the draw calls
emitted in the job, but we will do this in a separate patch.
Reviewed-by: Jose Maria Casanova Crespo <jmcasanova@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32111>
We don't need this until we are ready to emit the RCL for
the job and we want to do this late because double-buffering
will impact how big the allocations need to be.
Reviewed-by: Jose Maria Casanova Crespo <jmcasanova@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32111>
We want to make the decision about double-buffer enablement much later
when we have enough information to make it. That means we might need
to rewrite this packet, so we need to save a pointer to its location
in the CL.
Reviewed-by: Jose Maria Casanova Crespo <jmcasanova@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32111>
This is useful to debug sync issues and can also can be used to
instrument tooling for dumping job execution times in the future.
Reviewed-by: Jose Maria Casanova Crespo <jmcasanova@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32111>
Two aux functions are updated to fix piglit test once CCS is enabled on
multi-sampled stencil resources in a following change. As reviewers
suggested, we don't see much value of the assertion.
https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31496#note_2601233
Piglit test:
fbo-depthstencil blit default_fb -samples=16 -auto
iris_resolve.c:972: iris_resource_get_aux_state: Assertion
`res->surf.samples == 1 || res->surf.msaa_layout == ISL_MSAA_LAYOUT_ARRAY' failed.
iris_resolve.c:996: iris_resource_set_aux_state: Assertion
`res->surf.samples == 1 || res->surf.msaa_layout == ISL_MSAA_LAYOUT_ARRAY' failed.
Signed-off-by: Jianxun Zhang <jianxun.zhang@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31496>
If nir_tcs_info::all_invocations_define_tess_levels is true, the pass
doesn't have to insert a barrier and use output loads to get tess level
output values. It can just use the SSA defs that are being stored (or phis
thereof) to get the tess level output values.
The remaining tcs_info fields will be used by the HS shader message.
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32171>
Separate KIL counts to the indirection limit, so try to schedule it
within the TEX block on R300/R400, except for small shaders, where we
already know we are fine.
42 gained shaders on R400 (40 Trine and 2 This war of mine) at the
expense of some increase in register pressure.
shader-db:
total temps in shared programs: 18107 -> 18129 (0.12%)
temps in affected programs: 262 -> 284 (8.40%)
helped: 0
HURT: 22
Signed-off-by: Pavel Ondračka <pavel.ondracka@gmail.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32023>
It is an easy way to check that the installation works and is in a
useful state.
The Python script is based on a example in the TensorFlow repository at:
tensorflow/lite/examples/python/label_image.py
The labels file is distributed by Google along the MobileNetV1 model
that we already have. These files are released under the Apache
license.
Reported-by: Jeffrey Hugo <quic_jhugo@quicinc.com>
Reviewed-by: Jeffrey Hugo <quic_jhugo@quicinc.com>
Tested-by: Jeffrey Hugo <quic_jhugo@quicinc.com>
Acked-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31860>
The Gallium API that Teflon uses now supports a variable number of
inputs per operation.
Adapt to this change without any change in functionality.
Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32105>
Operations other than tensor addition will also need to be able to
handle multiple inputs, and a variable number of them.
And for testing individual operations, we also need to support models
with multiple inputs.
Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32105>
A few bugs due to uninitialized buffers have cropped up. For now let's
zero them all and see if we want to do something else when we get
concerned about compilation times.
Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32104>
The BROADCOM_SAND128 modifier is usually used with an extra parameter
to pass in the stride via a side channel. Quoting from drm_fourcc.h:
> The pitch between the start of each column is set to optimally
> switch between SDRAM banks. This is passed as the number of lines
> of column width in the modifier (we can't use the stride value due
> to various core checks that look at it , so you should set the
> stride to width*cpp).
So apparently this is just a workaround for limitations in some kernel
APIs. DRM modifiers, however, are arguably a bad fit for extra
parameters that aren't known in advance. In the Wayland/KMS ecosystem
many components depend on being able to treat modifiers as opaque, e.g.
for negotiations etc. In practice the current approach requires various
software components to manually use the
`DRM_FORMAT_MOD_BROADCOM_SAND128_COL_HEIGHT()` macro - using the
`DRM_FORMAT_MOD_BROADCOM_SAND128` modifier directly with formats like
`NV12` results in a rejection in the KMS driver and corrupted output
in Mesa (because we'd bail out early in `v3d_sand8_blit()`).
Fortunately the stride check limitations mentioned above don't seem to
apply to Mesa though. Thus we can just add support for the base modifier
and stride (coming from V4L2), allowing various toolkits, Wayland
compositors and V4L2 decoder implementations to support e.g.
`NV12` + `DRM_FORMAT_MOD_BROADCOM_SAND128` (`NC12` in V4L2) in a generic
way.
Notes:
1. Wayland compositors trying to offload composition to KMS will still
fail when doing a test commit.
2. There is another limitation - in the V4L2 MPLANE API - that
requires userspace to know the correct offset of the second plane. That's
a known API limitation though and only affects V4L2 decoder implementations.
Cc: mesa-stable
Signed-off-by: Robert Mader <robert.mader@collabora.com>
Reviewed-by: Jose Maria Casanova Crespo <jmcasanova@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32033>
Currently pointless, Pentium II or Celeron and later has SSE.
Cc: mesa-stable # 24.3
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Yonggang Luo <luoyonggang@gmail.com>
Signed-off-by: David Heidelberg <david@ixit.cz>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31998>
It's generally useful to use mesa_log for error messages etc. This makes
it easier to forward diagnostics into the right logs etc.
So let's be more consistent about where we're logging things.
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32094>
The V8 hardware supports a faster way of executing depthwise
convolutions, instead of having to fully lower them to regular
convolutions.
Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31842>
Because of how depthwise convolutions are implemented on V8, we
sometimes don't need reshuffling the input with strided convolutions.
Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31842>
