util: Remove MMX/MMXext detection code

Currently pointless, Pentium II or Celeron and later has SSE.

Cc: mesa-stable # 24.3
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Yonggang Luo <luoyonggang@gmail.com>
Signed-off-by: David Heidelberg <david@ixit.cz>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31998>
This commit is contained in:
David Heidelberg 2024-11-06 01:53:14 -05:00 committed by Marge Bot
parent ae85e6920c
commit a78c2bf2a4
3 changed files with 2 additions and 12 deletions

View file

@ -2161,12 +2161,11 @@ struct x86_reg x86_fn_arg( struct x86_function *p,
static void x86_init_func_common( struct x86_function *p )
{
p->caps = 0;
if(util_get_cpu_caps()->has_mmx)
if(util_get_cpu_caps()->has_sse) {
p->caps |= X86_MMX;
if(util_get_cpu_caps()->has_mmx2)
p->caps |= X86_MMX2;
if(util_get_cpu_caps()->has_sse)
p->caps |= X86_SSE;
}
if(util_get_cpu_caps()->has_sse2)
p->caps |= X86_SSE2;
if(util_get_cpu_caps()->has_sse3)

View file

@ -878,7 +878,6 @@ _util_cpu_detect_once(void)
}
/* general feature flags */
util_cpu_caps.has_mmx = (regs2[3] >> 23) & 1; /* 0x0800000 */
util_cpu_caps.has_sse = (regs2[3] >> 25) & 1; /* 0x2000000 */
util_cpu_caps.has_sse2 = (regs2[3] >> 26) & 1; /* 0x4000000 */
util_cpu_caps.has_sse3 = (regs2[2] >> 0) & 1; /* 0x0000001 */
@ -891,7 +890,6 @@ _util_cpu_detect_once(void)
((xgetbv() & 6) == 6); // XMM & YMM
util_cpu_caps.has_f16c = ((regs2[2] >> 29) & 1) && util_cpu_caps.has_avx;
util_cpu_caps.has_fma = ((regs2[2] >> 12) & 1) && util_cpu_caps.has_avx;
util_cpu_caps.has_mmx2 = util_cpu_caps.has_sse; /* SSE cpus supports mmxext too */
#if DETECT_ARCH_X86_64
util_cpu_caps.has_daz = 1;
#else
@ -935,9 +933,6 @@ _util_cpu_detect_once(void)
if (regs[0] >= 0x80000001) {
cpuid(0x80000001, regs2);
util_cpu_caps.has_mmx |= (regs2[3] >> 23) & 1;
util_cpu_caps.has_mmx2 |= (regs2[3] >> 22) & 1;
util_cpu_caps.has_xop = util_cpu_caps.has_avx &&
((regs2[2] >> 11) & 1);
}
@ -986,8 +981,6 @@ _util_cpu_detect_once(void)
printf("util_cpu_caps.x86_cpu_type = %u\n", util_cpu_caps.x86_cpu_type);
printf("util_cpu_caps.cacheline = %u\n", util_cpu_caps.cacheline);
printf("util_cpu_caps.has_mmx = %u\n", util_cpu_caps.has_mmx);
printf("util_cpu_caps.has_mmx2 = %u\n", util_cpu_caps.has_mmx2);
printf("util_cpu_caps.has_sse = %u\n", util_cpu_caps.has_sse);
printf("util_cpu_caps.has_sse2 = %u\n", util_cpu_caps.has_sse2);
printf("util_cpu_caps.has_sse3 = %u\n", util_cpu_caps.has_sse3);

View file

@ -88,8 +88,6 @@ struct util_cpu_caps_t {
unsigned cacheline;
unsigned has_intel:1;
unsigned has_mmx:1;
unsigned has_mmx2:1;
unsigned has_sse:1;
unsigned has_sse2:1;
unsigned has_sse3:1;