Commit graph

33590 commits

Author SHA1 Message Date
Scott D Phillips
1f4d2433e7 meson: Add build option for tools
Add a build option to control building some of the misc tools we
have. Also set the executables to install, presumably you want
that if you're asking for the build.

v2: set 'install:' to the with_tools value, not true (Jordan)
    handle 'all' in a the comma list (Dylan)
    Add freedreno's tools (Dylan)

Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
2018-02-08 11:24:42 -08:00
Brian Paul
11e92889aa gallium/util: silence clang warning in blitter code
Silence "warning: comparison of constant 4294967295 with expression
of type 'ubyte'".

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2018-02-08 10:27:31 -07:00
Brian Paul
4b0a45da25 tgsi: s/unsigned/enum tgsi_semantic/ in ureg_DECL_output()
So the function matches the prototype.  Found with clang.
v2: fix copy&paste error

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2018-02-08 10:27:19 -07:00
Brian Paul
d95c2d86cc tgsi: use TGSI_INTERPOLATE_x arguments instead of zeros in ureg code
TGSI_INTERPOLATE_CONSTANT and TGSI_INTERPOLATE_LOC_CENTER have the
value zero so there's no change in behavior.  It seems funny to
declare these fs input registers with constant interpolation.  But
it looks like ureg_DECL_input_layout() is not called anywhere and
ureg_DECL_input() is only called from
util_make_geometry_passthrough_shader().

Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2018-02-08 09:49:03 -07:00
Brian Paul
26948ba761 gallium/util: s/uint/enum tgsi_semantic/ in simple shader code
Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2018-02-08 09:49:03 -07:00
Brian Paul
0f40f4ffda tgsi: s/unsigned/enum pipe_shader_type/ in ureg code
And add a default switch case to silence a compiler warning.

Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2018-02-08 09:49:03 -07:00
Brian Paul
c0dc337ecd gallium/util: s/uint/enum tgsi_semantic/ in u_blitter.c
And put static qualifier on const arrays.

Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2018-02-08 09:49:03 -07:00
Brian Paul
93b3d38176 gallium/util: trivial whitespace/formatting fixes in u_blit.c
Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2018-02-08 09:49:03 -07:00
Brian Paul
b03ade55b9 cso: add a couple sanity check assertions in cso_draw_vbo()
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2018-02-08 09:49:03 -07:00
Dave Airlie
3f7a7bd897 r600: implement tg4 integer workaround. (v2)
This ports the texture gather integer workaround from radeonsi.

This fixes:
KHR-GL45.texture_gather.plain-gather-uint/int*

v2: add rect support, fix 2d array shadow
Reviewed-by: Roland Scheidegger <sroland@vmware.com> (on irc)
Signed-off-by: Dave Airlie <airlied@redhat.com>
2018-02-08 16:21:40 +10:00
Glenn Kennard
77b1b33724 r600: clean up initial shader register setup
This is taken from Glenn Kennards scratch series, but separated
out as a cleanup by me.

Reviewed-By: Gert Wollny <gw.fossdev@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2018-02-08 16:21:35 +10:00
Roland Scheidegger
b936f4d1ca r600: partly fix sampleMaskIn value
The hw gives us coverage for pixel, not for individual fragment shader
invocations, in case execution isn't per pixel (eg, unlike cm, actually
cannot do "real" minSampleShading, it's either per-pixel or per-fragment,
but it doesn't really make a difference here).
Also, with msaa disabled, the hw still gives us a mask corresponding to
the number of samples, where GL requires this to be 1.
Fix this up by masking the sampleMaskIn bits with the bit corresponding to
the sampleID, if we know this shader is always executed at per-sample
granularity. (In case of a per-sample frequency shader and msaa disabled,
the sampleID will always be 0, so this works just fine there.)
Fixing this for the minSampleShading case will need a shader key (radeonsi
uses the prolog part for) (for eg, could get away with a single bit, cm
would need more bits depending on sample/invocation ratio, or read the
bits from a uniform), unless we'd want to always use a sample mask uniform
(which is probably not a good idea, as it would make the ordinary common
msaa case slower for no good reason).
This fixes some parts of piglit arb_sample_shading-samplemask (with fixed
test), in particular those which use a sampleID, still failing others
as expected.

Reviewed-by: Dave Airlie <airlied@redhat.com>
2018-02-08 04:07:52 +01:00
Roland Scheidegger
07d724326a r600: clean up fragment shader input scan code
For some reason, we were iterating through the code twice (first just for
instructions needing barycentrics, then for instructions and input dcls).
Move things around slightly so this is no longer necessary.
There also was a unnedeed enabling of the fixed_pt_position_gpr - this is only
needed if the per-sample interpolation comes from an input, not from an
instruction (just move the assert where it belongs) (since the sample id to
sample from comes from a tgsi src in this case, and isn't sampleID).
Otherwise there should be no functional change.

Reviewed-by: Dave Airlie <airlied@redhat.com>
2018-02-08 04:07:52 +01:00
Roland Scheidegger
becc7faae2 r600/cm: (trivial) code cleanup for emitting msaa state
No functional change (compile tested only).

Reviewed-by: Dave Airlie <airlied@redhate.com>
2018-02-08 04:07:52 +01:00
Brian Paul
b99cb13002 tgsi: use tgsi_semantic enum type in ureg code
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2018-02-07 18:43:01 -07:00
Brian Paul
0f7be4fc16 tgsi: use TGSI enum types in ureg code
v2: fix enum tgsi_interpolate_mode/loc typo.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2018-02-07 18:42:39 -07:00
Brian Paul
6321b1bd40 gallium/util: replace uint with tgsi enum types
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2018-02-07 18:38:04 -07:00
Brian Paul
15874338ff gallium/util: replace unsigned with tgsi enum types
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2018-02-07 18:38:04 -07:00
Dave Airlie
5dd385f378 r600: fix rendering regression on r6/7 gpus
Fixes: 2d5b5d267e (r600: work out target mask at framebuffer bind.)
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104989

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2018-02-08 09:37:09 +10:00
Grazvydas Ignotas
f91aa68ac6 radeonsi: avoid int-to-pointer-cast warnings on 32bit
I hope the actual dropping of MSB is ok, but that's what's already
happened before this change.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2018-02-08 01:13:58 +02:00
Grazvydas Ignotas
13ada91740 gallium/hud: update some query functions
It seems these were missed when struct pipe_context * argument was
added to hud_graph::query_new_value.

Fixes: 3132afdf4c "gallium/hud: pass pipe_context explicitly to most functions"
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2018-02-08 01:12:07 +02:00
Roland Scheidegger
09f49b9e50 Revert "gallium: build ddebug, noop, rbug, trace as part of auxiliary"
This reverts commit 6f82b8d8d0.

This broke scons build, and reportedly clover with autotools/meson too.
2018-02-07 23:47:39 +01:00
Marek Olšák
6f82b8d8d0 gallium: build ddebug, noop, rbug, trace as part of auxiliary
Building gallium is faster by 7.5 seconds on a 4core/8thread 3GHz CPU.
(gallium build time is reduced by 15% when building only radeonsi)

Non-recursive makefiles are great!
2018-02-07 22:08:34 +01:00
Roland Scheidegger
def09f8db0 u_blit: (trivial) fix bogus argument order for set_fragment_shader
Amazingly this still worked sometimes, albeit I'm not even sure why...
This fixes d7bec6f7a6.
2018-02-07 22:03:18 +01:00
Roland Scheidegger
d7bec6f7a6 u_blit,u_simple_shaders: add shader to convert from xrbias format
We need this to handle some oddball dx10 format
(DXGI_FORMAT_R10G10B10_XR_BIAS_A2_UNORM). What you can do with this
format is very limited, hence we don't want to add it as a gallium
format (we could not express the properties of this format as
ordinary format properties neither, so like all special formats
it would need specific code for handling it in any case).
While here, also nuke the array for different shaders for different
writemasks, as it was not actually used (always full masks are
passed in for generating shaders).

Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2018-02-07 17:09:37 +01:00
Roland Scheidegger
afd1e9be17 u_simple_shaders: fix mask handling in util_make_fragment_tex_shader_writemask
The writemask handling was busted, since writing defaults to output
meant they got overwritten by the tex sampling anyway. Albeit the
affected components were undefined, so maybe with some luck it
still would have worked with some drivers - if not could as well
kill it... (This would have affected u_blitter but not u_blit since
the latter always used xyzw mask.)

Reviewed-by: Brian Paul <brianp@vmware.com>
2018-02-07 17:08:24 +01:00
Timothy Arceri
e2ea9e1191 radeonsi/nir: add nir support for compiling compute shaders
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2018-02-07 08:43:08 +11:00
Timothy Arceri
9c52902c76 ac/radeonsi: add num_work_groups to the abi
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2018-02-07 08:43:08 +11:00
Timothy Arceri
b7b89bbddb ac/radeonsi: create ac_build_shader_clock() helper
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2018-02-07 08:43:08 +11:00
Timothy Arceri
d116af383f ac/radeonsi: add load_local_group_size() to the abi
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2018-02-07 08:43:08 +11:00
Timothy Arceri
f6932d1ef3 radeonsi: add get_block_size() helper
This will be reused by the nir backend in a later patch.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2018-02-07 08:43:08 +11:00
Timothy Arceri
c8066cdfa7 ac/radeonsi: add local_invocation_ids to the abi
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2018-02-07 08:43:08 +11:00
Timothy Arceri
fa5239c153 ac/radeonsi: add workgroup_ids to the abi
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2018-02-07 08:43:08 +11:00
Timothy Arceri
64c10c9737 radeonsi/nir: gather some compute info in si_nir_scan_shader()
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2018-02-07 08:43:08 +11:00
Timothy Arceri
1142b1d3e1 radeonsi/nir: always set input_usage_mask as using all components
This fixes a regression for now, in the future we should gather
the used components properly.

V2: just set for VS and correctly handle doubles

Fixes: be973ed21f "radeonsi: load the right number of components for VS inputs and TBOs"

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2018-02-07 08:38:52 +11:00
Dave Airlie
6c691081a1 r600: fixup sparse color exports.
If we have gaps in the shader mask we have to have 0x1 in them
according to a comment in radeonsi, and this is required to fix
the test at least on cayman.

We also need to record the highest one written to write to the
ps exports reg.

This fixes:
KHR-GL45.enhanced_layouts.fragment_data_location_api

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2018-02-07 06:16:59 +10:00
Dave Airlie
2d5b5d267e r600: work out target mask at framebuffer bind.
If we only get 1,2,3,6 framebuffers we want a sparse target mask.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2018-02-07 06:16:55 +10:00
Dave Airlie
5b14e06d8b r600: work out shader export mask at shader build time (v1.1)
Since enhanced layouts allows setting specific MRT outputs, we
can get sparse outputs, so we have to calculate the shader
mask earlier.

v1.1: update checks for state update (Roland)

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2018-02-07 06:16:27 +10:00
Dave Airlie
f292eceae1 r600: fix xfb stream check.
This fixes:
KHR-GL45.enhanced_layouts.xfb_vertex_streams

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2018-02-07 06:08:12 +10:00
Dave Airlie
680cb9898a r600/compute: add render cond support.
Set render cond and emit atom.

Fixes:
KHR-GL45.compute_shader.conditional-dispatching

Reviewed-by: Roland Scheidegger <sorland@vmware.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2018-02-07 06:08:12 +10:00
Dave Airlie
5fd7b282b3 r600: fix not-very indirect compute
We need to get the grid sizes earlier to fill in to the const
buffer.

Fixes:
KHR-GL45.compute_shader.built-in-variables
and
KHR-GL45.compute_shader.dispatch-indirect

Reviewed-by: Roland Scheidegger <sorland@vmware.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2018-02-07 06:08:12 +10:00
Dave Airlie
00a112641b r600: overhaul buffer resource query.
This cleans up and fixes the previous fix even more.

Buffers from textures start at max const,
buffers from buffers/images come in from the 168 offset.

This fixes a bunch of:
KHR-GL45.shader_storage_buffer_object*

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2018-02-07 06:08:12 +10:00
Dave Airlie
736b150768 r600/eg: fix buffer sizing.
For buffers we want the size in bytes,
For images we want it in elements.

This fixes:
KHR-GL45.shader_storage_buffer_object.advanced-unsizedArrayLength-cs-std430-vec-pad

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2018-02-07 06:08:12 +10:00
Dave Airlie
c9c4f0b722 r600/images: set offset for compute shaders with number of declared samplers
for frag shaders we get a value in the key, I expect I need
to make compute work better

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2018-02-07 06:08:12 +10:00
Dave Airlie
ab5cee4c24 r600/compute: only mark buffer/image state dirty for fragment shaders
The compute emission path always emits this currently, and emitting
it on the fragment path breaks the blitter.

This fixes gpu hangs in KHR-GL45.compute_shader.resource-texture

Reviewed-by: Roland Scheidegger <sorland@vmware.com>
Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2018-02-07 06:08:12 +10:00
Dave Airlie
4e3b43f180 r600/atomic: fix ATOMCAS instruction.
This has 4 srcs.

This fixes:
KHR-GL45.shader_atomic_counter_ops_tests.ShaderAtomicCounterOpsExchangeTestCase

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2018-02-07 06:08:11 +10:00
Dave Airlie
8bdad9fa1f r600/sb/cayman: fix indirect ubo access on cayman
With sb enabled on cayman, this was overwriting the proper
cf index value with random ones if the dst gpr was 2 or 3,
only save the value for a MOVA instruction.

Fixes:
KHR-GL45.gpu_shader5.uniform_blocks_array_indexing
(on cayman with sb)

Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2018-02-07 06:08:11 +10:00
Dave Airlie
012100b809 r600/eg: use texture target to pick array size not view target (v2)
This fixes a few CTS cases in :
KHR-GL45.texture_view.view_sampling

some multisample cases are still broken, but not sure this is
the same problem.

v2: fix more cases

Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2018-02-07 06:08:11 +10:00
Michal Navratil
4081e08896 winsys/amdgpu: allow non page-aligned size bo creation from pointer
Fix INVALID_OPERATION caused by BufferData with target
EXTERNAL_VIRTUAL_MEMORY_BUFFER_AMD when the buffer size is
not page aligned.

Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Cc: 17.3 18.0 <mesa-stable@lists.freedesktop.org>
2018-02-06 18:51:12 +01:00
Jon Turney
9440599c8e meson: ensure xmlpool/options.h is generated for libgallium
In file included from ../src/gallium/targets/dri/target.c:1:
In file included from ../src/gallium/auxiliary/target-helpers/drm_helper.h:8:
../src/util/xmlpool.h:103:10: fatal error: 'xmlpool/options.h' file not found

See also 26bde1e3.

Signed-off-by: Jon Turney <jon.turney@dronecode.org.uk>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
2018-02-06 15:56:12 +00:00