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Author SHA1 Message Date
Chris Forbes
1c4f141a54 docs: Mark off ARB_conditional_render_inverted for i965 
Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
 2014-08-20 07:49:17 +12:00
Chris Forbes
06ca96daad i965: Enable ARB_conditional_render_inverted on Gen6+. 
The extension requires GL 3.0, so enable on just the generations
exposing that.

Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
 2014-08-20 07:49:17 +12:00
Chris Forbes
3f8ad32627 mesa: Add support for inverted s/w conditional rendering 
Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
 2014-08-20 07:49:17 +12:00
Matt Turner
9a071e3339 i965/vec4: Add a pass to reduce swizzles. 
total instructions in shared programs: 4344280 -> 4288033 (-1.29%)
instructions in affected programs:     397468 -> 341221 (-14.15%)

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
 2014-08-19 12:37:11 -07:00
Eric Anholt
5833680e7a vc4: Plumb the texture index from TGSI through to the sampler uniforms. 
This commit and the last one fix ARB_fragment_program/sparse-samplers and
6 other tests.
 2014-08-19 08:47:13 -07:00
Eric Anholt
c8097afe29 vc4: Avoid a null-deref if a sampler index isn't used. 
Part of fixing ARB_fragment_program/sparse-samplers
 2014-08-19 08:47:13 -07:00
Brian Paul
31ce84a81f mesa: fix NULL pointer deref bug in _mesa_drawbuffers() 
This is a follow-on fix to commit 39b40ad144.  Fixes a crash if the
user calls glDrawBuffers(0, NULL).

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=82814
Cc: "10.2" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
 2014-08-19 09:29:16 -06:00
Glenn Kennard
dfa10ed264 r600g: Fix missing SET_TEXTURE_OFFSETS 
SB needs a bit of special handling to handle
instructions without obvious side effects, to
avoid it deleting them.

Fixes failing non-const ARB_gpu_shader5
textureOffsets piglits with sb enabled.

Signed-off-by: Glenn Kennard <glenn.kennard@gmail.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
 2014-08-19 16:30:13 +02:00
Alexander von Gluck IV
ef1cf69cd3 gallium/target: Add needed mesautil lib to haiku-softpipe 
Acked-by: Brian Paul <brianp@vmware.com>
 2014-08-19 10:03:05 -04:00
Alexander von Gluck IV
8cbf01f12a gallium/aux: Fill in Haiku get process name code 
Acked-by: Brian Paul <brianp@vmware.com>
 2014-08-19 10:03:05 -04:00
Alexander von Gluck IV
82c23dd962 haiku/swrast: Add missing src include search path for missing util/macros.h 
Acked-by: Brian Paul <brianp@vmware.com>
 2014-08-19 10:03:05 -04:00
Tobias Klausmann
eed8b19aac docs: Update status of ARB_conditional_render_inverted 
Done for: nvc0, softpipe and llvmpipe

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Signed-off-by: Tobias Klausmann <tobias.johannes.klausmann@mni.thm.de>
 2014-08-19 09:02:29 -04:00
Tobias Klausmann
544c54114a llvmpipe/softpipe: enable ARB_conditional_render_inverted 
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Signed-off-by: Tobias Klausmann <tobias.johannes.klausmann@mni.thm.de>
 2014-08-19 09:02:29 -04:00
Tobias Klausmann
a2fc85f5d0 nvc0: Handle ARB_conditional_render_inverted and enable it 
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Tobias Klausmann <tobias.johannes.klausmann@mni.thm.de>
 2014-08-19 09:02:29 -04:00
Tobias Klausmann
7a48858fcb mesa/st: Support ARB_conditional_render_inverted modes 
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Signed-off-by: Tobias Klausmann <tobias.johannes.klausmann@mni.thm.de>
 2014-08-19 09:02:29 -04:00
Tobias Klausmann
fd5edee700 gallium: Add and handle PIPE_CAP_CONDITIONAL_RENDER_INVERTED 
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Signed-off-by: Tobias Klausmann <tobias.johannes.klausmann@mni.thm.de>
 2014-08-19 08:54:35 -04:00
Tobias Klausmann
64cc1876fa mesa: add ARB_conditional_render_inverted flags 
Also add an extension bit so we can safely enable

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
Signed-off-by: Tobias Klausmann <tobias.johannes.klausmann@mni.thm.de>
 2014-08-19 08:54:35 -04:00
Tobias Klausmann
1a51751e93 glapi: add GL_ARB_conditional_render_inverted 
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
Signed-off-by: Tobias Klausmann <tobias.johannes.klausmann@mni.thm.de>
 2014-08-19 08:54:35 -04:00
Chia-I Wu
58511b62c4 ilo: fix PIPE_CAP_VIDEO_MEMORY 
I changed Emil's patch in f921131a5c to report
raw values in the winsys, but forgot to convert the values to megabytes in the
pipe driver.
 2014-08-19 19:56:07 +08:00
Chia-I Wu
17401896dd ilo: enable HiZ in more cases on GEN6 
With layer offsetting killed, we no longer need to restrict HiZ to
non-mipmapped and non-arary depth buffers.
 2014-08-19 19:53:37 +08:00
Chia-I Wu
5b4fc5f156 ilo: remove layer offsetting 
Follow i965 to kill layer offsetting for GEN6.
 2014-08-19 19:53:37 +08:00
Chia-I Wu
fb3d506431 ilo: migrate to ilo_layout 
Embed an ilo_layout in ilo_texture, and remove now duplicated members.
 2014-08-19 19:53:37 +08:00
Chia-I Wu
925359bc78 ilo: add new resource layout code 
Based on the old code, the new layout code describes the layout with the new,
well-documented, ilo_layout.  It also gains new features such as MCS support
and extended ARYSPC_LOD0 that i965 comes up with (see
6345a94a9b).
 2014-08-19 19:53:37 +08:00
Niels Ole Salscheider
5ae9bdafd4 gallium/radeon: Do not use u_upload_mgr for buffer downloads 
Instead create a staging texture with pipe_buffer_create and
PIPE_USAGE_STAGING.

u_upload_mgr sets the usage of its staging buffer to PIPE_USAGE_STREAM.
But since 150ac07b85 CPU -> GPU streaming buffers
are created in VRAM. Therefore the staging texture (in VRAM) does not offer any
performance improvements for buffer downloads.

Signed-off-by: Niels Ole Salscheider <niels_ole@salscheider-online.de>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
 2014-08-19 12:56:04 +02:00
Marek Olšák
498dc676ea r600g: copy IA_MULTI_VGT_PARAM programming from radeonsi for Cayman 
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
 2014-08-19 12:20:18 +02:00
Marek Olšák
f62f88274a radeonsi: bump PRIMGROUP_SIZE for some cases 
Recommended by hw people.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
 2014-08-19 12:20:18 +02:00
Marek Olšák
4be7ff5567 radeonsi: set PARTIAL_VS_WAVE(0) when appropriate 
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
 2014-08-19 12:20:18 +02:00
Marek Olšák
94e474f3c3 radeonsi: set IA_MULTI_VGT_PARAM on SI the same as on CIK (v2) 
Nothing's changed for CIK here.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
 2014-08-19 12:20:18 +02:00
Marek Olšák
a333309979 radeonsi: simplify si_num_banks function 
This makes it easier to use.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
 2014-08-19 12:20:18 +02:00
Marek Olšák
db51ab6d6a radeonsi: use r600_draw_rectangle from r600g 
Rectangles are easier than triangles for the rasterizer.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
 2014-08-19 12:20:18 +02:00
Marek Olšák
7792f9858b radeonsi: save scissor state and sample mask for u_blitter 
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
 2014-08-19 12:20:18 +02:00
Marek Olšák
25633c85e1 radeonsi: don't set CB_SHADER_MASK=1 if there are no color outputs 
This hack isn't needed anymore because of the previous u_blitter commit.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
 2014-08-19 12:20:18 +02:00
Marek Olšák
a6fcdbf560 gallium/u_blitter: don't use an empty fragment shader if there's a colorbuffer 
This is custom code used by some drivers.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
 2014-08-19 12:20:18 +02:00
Marek Olšák
406ab1662c gallium/util: handle PIPE_BUFFER in util_pipe_tex_to_tgsi_tex 
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
 2014-08-19 12:20:18 +02:00
Marek Olšák
8db7dacf29 rbug: only add textures to the list 
rbug-gui cannot display buffers, so it's pointless to add them.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
 2014-08-19 12:20:18 +02:00
Marek Olšák
ddcbe9c526 rbug: fix a crash in sampler_view_destroy caused by incorrect context 
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
 2014-08-19 12:20:18 +02:00
Marek Olšák
ba81a3784b rbug: send the actual number of layers to the client 
This sends the correct value for array textures.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
 2014-08-19 12:20:18 +02:00
Marek Olšák
90d10f467f rbug: implement streamout context functions 
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
 2014-08-19 12:20:18 +02:00
Marek Olšák
b7b1ad9c6c rbug: fix crash in set_vertex_buffers 
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
 2014-08-19 12:20:17 +02:00
Marek Olšák
4a3f156dd1 rbug: remove contexts from the list properly 
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
 2014-08-19 12:20:17 +02:00
Emil Velikov
f921131a5c ilo: fold drm_intel_get_aperture_sizes() within probe_winsys() 
... and store the value in intel_winsys_info/ilo_dev_info.

Suggested-by: Chia-I Wu <olvaffe@gmail.com>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>

olv: check for errors and report raw values
 2014-08-19 17:45:00 +08:00
Matt Turner
a4359bcaa5 i965/cfg: Add a foreach_block_and_inst_safe macro. 
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
 2014-08-18 19:08:53 -07:00
Matt Turner
26624b85e7 i965/cfg: Add a foreach_inst_in_block_safe macro. 
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
 2014-08-18 19:05:59 -07:00
Matt Turner
c51b0861e4 i965/cfg: Add a foreach_block_safe macro. 
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
 2014-08-18 19:05:59 -07:00
Matt Turner
a3d0ccb037 i965: Pass a cfg pointer to generate_{code,assembly}. 
The loop over all instructions is now two-fold, over all of the blocks
and all of the instructions in each block.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
 2014-08-18 19:05:59 -07:00
Matt Turner
596990d91e i965: Add and use foreach_block macro. 
Use this as an opportunity to rename 'block_num' to 'num'. block->num is
clear, and block->block_num has always been redundant.
 2014-08-18 18:56:30 -07:00
Matt Turner
d688667c7f i965/cfg: Embed link in bblock_t for main block list. 
The next patch adds a foreach_block (block, cfg) macro, which works
better if it provides a direct bblock_t pointer, rather than a
bblock_link pointer that you have to use to find the actual block.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
 2014-08-18 18:56:30 -07:00
Matt Turner
19c6617adf i965/fs: Optimize gl_FrontFacing calculation on Gen4/5. 
Doesn't use fewer instructions, but it does avoid writing the flag
register and if we want to switch the representation of true for Gen4/5
in the future, we can just delete the AND instruction.
 2014-08-18 18:35:56 -07:00
Matt Turner
d1c43ed487 i965/fs: Optimize gl_FrontFacing calculation on Gen6+. 
total instructions in shared programs: 4288650 -> 4282838 (-0.14%)
instructions in affected programs:     595018 -> 589206 (-0.98%)

Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
 2014-08-18 18:35:54 -07:00
Matt Turner
2e51dc838b i965: Use ~0 to represent true on Gen >= 6. 
total instructions in shared programs: 4292303 -> 4288650 (-0.09%)
instructions in affected programs:     299670 -> 296017 (-1.22%)

Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
 2014-08-18 18:35:53 -07:00