Commit graph

218069 commits

Author SHA1 Message Date
Christoph Pillmayer
1a9fd2b10e pan/bi: Fix spill limit value order
When the register pressure is at the allowed maximum and we have
instructions like the following, preferring rematerializable values
in cmp_dist means that we evict the source of an instruction before
it is even used. This makes no sense.

10 = LOAD_CONST
11 = LOAD_CONST     // here we would evict 10!
12 = USE 10!, 11!

Happens in dEQP-VK.spirv_assembly.instruction.compute.opphi.wide
at the beginning of block1.

Reviewed-by: Eric R. Smith <eric.smith@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39305>
2026-02-03 13:26:13 +00:00
Christoph Pillmayer
6b81eb58f3 pan: Add some missing ForEachMacros to .clang-format
Reviewed-by: Eric R. Smith <eric.smith@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39305>
2026-02-03 13:26:12 +00:00
Maaz Mombasawala
bea618b4de svga: Update CI expectations
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Marking test as failure as seen in job -
https://gitlab.freedesktop.org/mombasa/mesa/-/jobs/92373639
so that we can enable vmware ci farm.

Signed-off-by: Maaz Mombasawala <maaz.mombasawala@broadcom.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39665>
2026-02-03 08:33:33 +00:00
Qiang Yu
f20cd07e21 radeonsi: fix mesh shader outputs kill
Mesh shader uses store per vertex output for point size
and store per primitive output for layer id.

This fixes gpu-ratemeter run slow for kill point size
and layer id cases when mono shader is used which expect
to kill these outputs.

Also gather fragment shader per primitive input info
to kill mesh shader per primitive output.

Fixes: e6e21dfbf2 ("radeonsi: kill outputs for mesh shader")
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39644>
2026-02-03 07:52:07 +00:00
Qiang Yu
5b159025d7 radeonsi: not overlap ib print for multi context
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39644>
2026-02-03 07:52:07 +00:00
Qiang Yu
a0678f3c00 radeonsi: be able to record sqtt for frame 0|1 and no swap
It was not possible to enable sqtt for first and second
frame because AMD_THREAD_TRACE_TRIGGER must be positive
and we missed call si_handle_sqtt at the beginning of
the first frame.

To support some test which does not swap buffer, add a
call to si_handle_sqtt when destroy context.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39644>
2026-02-03 07:52:07 +00:00
Qiang Yu
3aea4691bb radeonsi: mesh shader support sqtt
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39644>
2026-02-03 07:52:07 +00:00
Qiang Yu
1ca7d564b6 radeonsi: move sqtt draw code to shared function with mesh pipeline
No function change.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39644>
2026-02-03 07:52:07 +00:00
Kenneth Graunke
6ea4fe9806 iris: Switch to SPDX headers
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Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39663>
2026-02-03 01:30:41 +00:00
Valentine Burley
0f3b51a165 ci/deqp: Retry GitHub API lookup for main-branch check
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The GitHub compare API used to verify that DEQP_MAIN_COMMIT is based
on main is very fragile, causing many container build failures.

Add simple retry logic to make the check more robust.

Signed-off-by: Valentine Burley <valentine.burley@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39649>
2026-02-03 00:01:22 +00:00
Alyssa Rosenzweig
bc69e4364f intel: report code size in shader stats
This is missing from ANV's statistics currently.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39633>
2026-02-02 23:30:24 +00:00
Alyssa Rosenzweig
fc53da9c39 intel: simplify shader stats names
This brings what ANV reports closer to what Iris reports, and is mostly dropping
redundancies.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39633>
2026-02-02 23:30:24 +00:00
Alyssa Rosenzweig
3d5170c705 intel: add scheduling mode statistic
This is for parity with what we do in the current GL shader-db path.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39633>
2026-02-02 23:30:24 +00:00
Alyssa Rosenzweig
fcaf6a52a7 util: hide hashes from GL shader stats
Traditionally we don't print these for GL and tooling doesn't know about this.
Just drop them. Note that neither AMD nor Intel uses the common GL print path
yet which is why this hadn't been hit.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39633>
2026-02-02 23:30:24 +00:00
Alyssa Rosenzweig
0718a2e74c util: allow string shader "statistics"
This is useful for Intel reporting scheduling strategy.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39633>
2026-02-02 23:30:24 +00:00
Alyssa Rosenzweig
3b20cfc589 pvr,pan,agx: drop cargo-culted nir_opt_loop calls
The comment claims this was to unroll loops, but nir_opt_loop doesn't do that.
Whatever issue the AGX code was originally working around, it doesn't apply now
(I confirmed we produce similar code with or without the pass). In the meantime,
Panfrost and PowerVR cargo-culted the same broken logic. Drop it all.

Closes: #14732
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39588>
2026-02-02 23:16:22 +00:00
Ian Forbes
27474b2ce3 svga: Always emit VGPU10_OPCODE_DCL_GLOBAL_FLAGS for VGPU10
The NOP that sometimes gets emitted when no flags are set was causing
problems with the TC shader declarations on the device side causing the
arb_tesselation_shader@execution@built-in-functions piglit test to fail.

We can always emit the declaration and leave the flags as zero if they
are not enabled rather than outputting the problematic NOP.

Signed-off-by: Ian Forbes <ian.forbes@broadcom.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39660>
2026-02-02 22:59:34 +00:00
Marek Olšák
a3f022d0a2 nir: reassociate a $op (b ? #c : #d) for div, mod, rem
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This eliminates expensive div, mod, rem opcodes with non-constant src1 being
constant src1 hiding behind bcsel.

gcc and LLVM are missing this.

Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39560>
2026-02-02 21:34:48 +00:00
Marek Olšák
ee16f76a1e radeonsi: don't allocate a VB descriptor upload buffer if it's not needed
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39536>
2026-02-02 21:09:46 +00:00
Marek Olšák
bdb36e5be5 radeonsi: move VB descriptor emission and upload into separate functions
This reduces duplication by putting the IS_DRAW_VERTEX_STATE constant
inside the loops.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39536>
2026-02-02 21:09:46 +00:00
Marek Olšák
f096652aec ac/llvm: pass soffset to buffer_load/store_format
this will be needed in the future

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39536>
2026-02-02 21:09:46 +00:00
Marek Olšák
d6a5bb3808 ac/llvm: simplify emitting FP intrinsics
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39536>
2026-02-02 21:09:46 +00:00
Marek Olšák
74bc4ee9f3 ac/llvm: remove scalarizing emit_intrin_1f_param_scalar
we scalarize this in NIR

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39536>
2026-02-02 21:09:45 +00:00
Tapani Pälli
6979f9f0d5 anv: use workaround framework for Wa_1508208842
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Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39622>
2026-02-02 19:40:26 +00:00
Tapani Pälli
8fa360fb30 intel/dev: update mesa_defs.json from workaround database
This adds LNL entries to recently added RHWO and autostrip workarounds
and a media workaround for vulkan video on gfx12.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39622>
2026-02-02 19:40:26 +00:00
Collabora's Gfx CI Team
96e62abdd4 Uprev ANGLE to 63d1dd7c2dfccf6acbd92af224b48aa6ada45f1c
b406401e42...63d1dd7c2d

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39224>
2026-02-02 19:05:23 +00:00
Nanley Chery
835b2a99c0 anv: Drop anv_image::wsi_blit_src
This is equivalent to anv_image::from_wsi &&
!isl_surf_usage_is_display().

Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39618>
2026-02-02 18:40:50 +00:00
Nanley Chery
c429d7479e anv: Don't set the display flag on WSI blit sources
These images are never used with scanout hardware.

Fixes: 2c00b7d1e6 ("anv: flag WSI images as scanout images for ISL")
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39618>
2026-02-02 18:40:50 +00:00
Nanley Chery
f616d4fb2a anv: Treat non-WSI PRESENT_SRC as TRANSFER_SRC
For non-WSI images, explicitly map VK_IMAGE_LAYOUT_PRESENT_SRC_KHR to
VK_IMAGE_LAYOUT_TRANSFER_SRC_OPTIMAL in anv_layout_to_aux_state().

Before this patch, the function passed PRESENT_SRC into
vk_image_layout_to_usage_flags() and got a return value of 0 from it
(that function expects that layout to be explicitly handled by the
caller). This caused the logic dependent on the return value to be
unreliable.

Fixes: c5cad407f8 ("anv: handle non-wsi images in anv_layout_to_aux_state")
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39618>
2026-02-02 18:40:50 +00:00
Nanley Chery
476f461ce7 anv: Fix clear state of WSI blit sources during presentation
On gfx12+, this fixes assert failures in hybrid GPU scenarios.

Fixes: 811c413f98 ("anv: Don't return the Xe2+ fast-clear type early")
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39618>
2026-02-02 18:40:49 +00:00
Marek Olšák
fc9f56556a ac/llvm: fix buffer_load_format with TFE by replacing inline asm with LLVM code
It was broken with gfx12 at least. This fixes vkd3d-proton tests with
RADV_DEBUG=llvm and removes the hard-to-maintain inline assembly.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39474>
2026-02-02 17:56:55 +00:00
Marek Olšák
bac80013e6 ac: remove image_load buffer code from ACO & LLVM
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com> (aco)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39474>
2026-02-02 17:56:55 +00:00
Marek Olšák
c05d340184 ac: remove txf buffer code from ACO & LLVM
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com> (aco)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39474>
2026-02-02 17:56:55 +00:00
Marek Olšák
85916c8af0 ac/nir: lower buffer image_load to load_buffer_amd in NIR
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39474>
2026-02-02 17:56:54 +00:00
Marek Olšák
ef3d43085a ac/nir: lower buffer txf to load_buffer_amd in NIR
This also:
- removes the sparse flag (TFE) if it has no uses
- removes trailing unused components (if not sparse) or all contiguous unused
  components before the sparse flag (if sparse)
- lowers 64-bit formatted buffer loads to 32 bits

Everything here could also be used by 64-bit non-buffer image loads
and txf if needed.

Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39474>
2026-02-02 17:56:54 +00:00
Marek Olšák
30ee7044bc ac/nir: rename ac_nir_lower_tex -> ac_nir_lower_image_tex
It will lower txf and buffer image loads to load_buffer_amd.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39474>
2026-02-02 17:56:54 +00:00
Marek Olšák
94058ff179 ac/llvm: handle ACCESS_SPARSE in load_buffer_amd
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39474>
2026-02-02 17:56:54 +00:00
Marek Olšák
21d79dc22f aco,ac/llvm: force IDXEN=1 for buffer format opcodes on GFX9
This fixes txf and image_load lowered to buffer_load_amd.

Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39474>
2026-02-02 17:56:53 +00:00
Marek Olšák
61bfc298ba ac: set missing dest_type for image_deref_load
required for lowering to load_buffer_amd

Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39474>
2026-02-02 17:56:53 +00:00
Marek Olšák
4a7728c436 aco: handle ACCESS_SPARSE and ACCESS_SKIP_HELPERS for load_buffer_amd
buffer txf and buffer image_load will be lowered to load_buffer_amd

Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39474>
2026-02-02 17:56:53 +00:00
Marek Olšák
fbfac92738 ac,radeonsi: add AC_NIR_TEX_BACKEND_FLAG_IS_IMAGE
image_load lowered to tex will use this (descriptor loads only for now)

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39474>
2026-02-02 17:56:53 +00:00
Marek Olšák
45136f4a6f radeonsi: unify tex descriptor loads
it will be extended

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39474>
2026-02-02 17:56:52 +00:00
Marek Olšák
30e9f0bdf3 nir/opt_16bit_tex_image: lower dst of load_buffer_amd
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39474>
2026-02-02 17:56:52 +00:00
Marek Olšák
44bc1e6bf4 nir: add dest_type to load_buffer_amd
for lowering the result to 16 bits

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39474>
2026-02-02 17:56:52 +00:00
Marek Olšák
9eaaf9e525 nir: add ACCESS_SPARSE
trying to reduce the combinatorial explosion of intrinsics

Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39474>
2026-02-02 17:56:52 +00:00
Marek Olšák
3350bca3eb nir/print: fix a crash due to unhandled GLSL_SAMPLER_DIM_EXTERNAL
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39474>
2026-02-02 17:56:52 +00:00
Duncan Brawley
dfddb3fef1 pvr: Add support for VK_KHR_pipeline_executable_properties
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This adds support for receiving additional statistics about PowerVR shaders for
the Rogue architecture.

vkGetPipelineExecutablePropertiesKHR and vkGetPipelineExecutableStatisticsKHR
are fully supported. vkGetPipelineExecutableInternalRepresentationsKHR does not
currently return any internal representations.

Tests used:
dEQP-VK.pipeline.monolithic.executable_properties.*

Signed-off-by: Duncan Brawley <duncan.brawley@imgtec.com>
Reviewed-by: Simon Perretta <simon.perretta@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39607>
2026-02-02 16:55:38 +00:00
Sergi Blanch Torne
693a3e1c50 Revert "ci: disable Collabora's farm due to maintenance"
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This reverts commit 353bc835b8.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39645>
2026-02-02 15:56:09 +00:00
Utku Iseri
def66055ad zink: track which stages a sampler gets bound to
and use this information to avoid splitting renderpasses even harder

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39651>
2026-02-02 15:38:21 +00:00
Utku Iseri
2093c44835 zink: add an rpstores debug option
this is useful for reproducing an invalidated rp gettting split
or when the result of an invalidated rp ends up getting used

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39651>
2026-02-02 15:38:21 +00:00