This should make it a lot more clear how depth clip enables work.
Annoyingly, because of the way they originally worked in Vulkan 1.0,
it's dependent on the depth clamp if the state isn't set in the pipeline
and isn't declared dynamic. The enum is explicitly set up so that
drivers don't need to be aware of this change unless they already
implement VK_EXT_extended_dynamic_state3. If depth clamp/clamp are not
dynamic, depth clip will be either TRUE or FALSE which map to 1/0 so the
field can still be treated as a boolean.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18889>
and when some argument reads both from rgb and apha. We would fail to
properly rewrite the sources in such case.
Consider the following instructions:
2: src0.xyz = const[3], src1.xyz = temp[6], srcp.xyz = (src1 - src0)
CMP temp[8].x, src0.0__, src0.1__, srcp.x__
...
5: src0.xyz = const[1], src0.w = const[1]
MAX temp[10].xy, |src0.xz_|, |src0.yw_|
We can merge them together into pair like
2: src0.xyz = const[3], src1.xyz = temp[6], src2.xyz = const[1], src2.w = const[1], srcp.xyz = (src1 - src0)
MAX temp[10].xy, |src2.xz_|, |src2.yw_|
CMP temp[8].w, src0.0, src0.1, srcp.x
However the current code fails to do so properly and we end with this:
2: src0.xyz = const[3], src0.w = const[1], src1.xyz = temp[6], src2.xyz = const[1], srcp.xyz = (src1 - src0)
MAX temp[10].xy, |src2.xz_|, |src2.yw_|
CMP temp[8].w, src0.0, src0.1, srcp.x
where the src2.w is undefined.
Just check for the the case where the arguments reads both from rgb and
alpha and bail out from the merge.
Fixes the following dEQPs:
dEQP-GLES2.functional.uniform_api.random.47
dEQP-GLES2.functional.uniform_api.value.initial.render.array_in_struct.float_vec4_both
dEQP-GLES2.functional.uniform_api.value.initial.render.basic_array.vec4_both
Only a minor change in shader-db with RV530:
total instructions in shared programs: 180847 -> 180864 (<.01%)
instructions in affected programs: 3178 -> 3195 (0.53%)
helped: 2
HURT: 16
Signed-off-by: Pavel Ondračka <pavel.ondracka@gmail.com>
Reviewed-by: Filip Gawin <filip@gawin.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18991>
Will be used in combination with Nitrogen8M boards.
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13691>
Make it possible to provide per device mkimage.py params.
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: David Heidelberg <david.heidelberg@collabora.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13691>
The layout calculation accidentally thought these would be
stored in variables, but that's not the case.
Fixes: 697ea02202
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18846>
Consistent whitespace, move var decls to first use, add some const
qualifiers, etc.
Signed-off-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18954>
Now the state tracker's responsible to lower away for us (and the state tracker
can do it correctly, our implementation is incorrect with a strict reading of
the Gallium contract).
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18658>
The cso code hashes these as a block of bytes. This silences some
Valgrind uninitialized memory warnings and possibly avoids creating
some redundant sampler instances.
Signed-off-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18953>
Rejig some dirty state checks to avoid continue and make it consistent
with surrounding code.
Signed-off-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18953>
Maybe the frontend should map for us in this case, but it's easy enough
here: ETC2 is an extension to use undefined states from ETC1, and is
backwards compatible.
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18957>
Without this, the frontend would decompress them for us without even the
kindness of a perf debug warning.
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18957>
Like on adreno 3xx, hw binning and scissor optimizations don't work correctly
together on a4xx and a5xx GPUs.
Disable binning as a workaround if scissor optimizations are being used.
Fixes: f68c6951b88efaae3e19
Signed-off-by: Alejandro Tafalla <atafalla@dnyon.com>
Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18925>
On my ppc64le machine with 32 hardware threads, this speeds up OpenArena
(1920x1200) from 7.2 fps to 8.1 fps.
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18415>
We have the correct merged color write enable state as a local var here,
use that instead of the zero cmd->state.color_write_enable. Fixes
blending in many traces with ANGLE on turnip. In the process of fixing,
clarify the logic a little bit.
Fixes: 169e03800d ("tu: Implement VK_EXT_color_write_enable")
Fixes: #7328
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18956>
Some of the generic code tries to load from things it has no
types for, mip offsets, row and image strides.
Fix the interfaces to allow returning types for these.
Reviewed-by: Mihai Preda <mhpreda@gmail.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18947>
Continuing the work to split i915_drm.h specific code.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18942>
This will make easier to spot more places where the code can
simplified after the hasvk split.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18942>
Move everything that depends on i915_drm.h to its own function,
in a future MR will move the parameters that are also needed by
Iris to intel_device_info.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18942>
Continuing the work to split i915_drm.h specific code.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18942>
There is too much i915_drm.h code spread, this patch start to fix that
by re-organizing engine related code.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18942>
Previously we would use patch control points if there was no GS, but
it wasn't immediately obvious that this driver param is unused if there
is no GS. Make it output 0 instead, making it clear that we can emit it
even if we don't know the patch control points. This change in the
cmdstream is split out from the next commit.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18773>
Even though it's tessellation-related, it's set based on the
tessellation variant which is only known after linking. The param stride
may change due to LTO if fast linking is not used.
Fixes: e9f5de11d4 ("tu: Initial implementation of VK_EXT_graphics_pipeline_library")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18773>
It turns out that the ir3_setup_const_state() already includes reserved
consts, so we were accidentally counting it twice. This makes us use
less consts, and if there are enough reserved consts can make it go
negative and wrap around. Fix this while also making sure the previous
bug remains fixed.
Fixes: 8cb1deded6 ("ir3/analyze_ubo_ranges: Account for reserved consts")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18840>
This fixes the case where fixup_regfootprint() adds to the reg footprint
but it isn't accounted for when determining whether we should double
threadsize in ir3_collect_info(). This would produce a hang on a650 and
above where we have a reg footprint of 33 and doubled threadsize.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18840>
