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Author SHA1 Message Date
Georg Lehmann
177dba62a1 aco: use v_add_f{16,32} with clamp for fsat 
v_add can be dual issued on gfx11, v_med3 cannot.
Don't use v_add directly to still optimize omod(fsat(x)).

Foz-DB GFX1100:
Totals from 32702 (24.24% of 134913) affected shaders:
Latency: 475008203 -> 474928037 (-0.02%); split: -0.02%, +0.00%
InvThroughput: 59226198 -> 59140787 (-0.14%); split: -0.14%, +0.00%

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21402>
 2023-06-07 12:30:11 +00:00
Georg Lehmann
3a0bc8f007 aco/statistics: improve v_fma_mix dual issuing detection 
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21402>
 2023-06-07 12:30:11 +00:00
Georg Lehmann
0f023d90c0 aco/ir: return true in hasRegClass for Operand(reg, rc) 
Makes isOfType() usable after lower_to_hw_instr.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21402>
 2023-06-07 12:30:11 +00:00
Yonggang Luo
b687fa4ccb vulkan: move nir_convert_ycbcr into vulkan runtime 
This only used by vulkan drivers and depends on vulkan util, so do the move to decouple
nir from vulkan utils

Reviewed-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23444>
 2023-06-07 08:42:03 +00:00
Eric Engestrom
9316ab74ef ci/radv: update expectations 
Signed-off-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23465>
 2023-06-06 20:24:24 +00:00
Alyssa Rosenzweig
99a00e2247 treewide: Use nir_trim_vector more 
Via Coccinelle patches

    @@
    expression a, b, c;
    @@

    -nir_channels(b, a, (1 << c) - 1)
    +nir_trim_vector(b, a, c)

    @@
    expression a, b, c;
    @@

    -nir_channels(b, a, BITFIELD_MASK(c))
    +nir_trim_vector(b, a, c)

    @@
    expression a, b;
    @@

    -nir_channels(b, a, 3)
    +nir_trim_vector(b, a, 2)

    @@
    expression a, b;
    @@

    -nir_channels(b, a, 7)
    +nir_trim_vector(b, a, 3)

Plus a fixup for pointless trimming an immediate in RADV and radeonsi.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23352>
 2023-06-06 18:52:25 +00:00
Marek Olšák
218c00319b amd: remove unused PKT0 definitions 
We never use type 0 packets.

Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22833>
 2023-06-06 18:01:36 +00:00
Marek Olšák
dd5604b94d radeonsi: don't use SET_SH_REG_INDEX if the kernel doesn't use CU reservation 
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22833>
 2023-06-06 18:01:36 +00:00
Marek Olšák
52ca879cdd radeonsi: export non-zero edgeflags for GS and tess 
because edge flags are always enabled when polygon mode is enabled

Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22833>
 2023-06-06 18:01:35 +00:00
Marek Olšák
ed8250360f amd: add radeon_info* into ac_llvm_context and radv_nir_compiler_options 
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22833>
 2023-06-06 18:01:35 +00:00
Marek Olšák
192b2c7c31 ac/nir/ngg: always use load_initial_edgeflags_amd, choose the value in drivers 
radeonsi will have a more complicated condition here

Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22833>
 2023-06-06 18:01:35 +00:00
Marek Olšák
d6e70334ff ac/surface: fix R32G3B32 image format regression for gfx6-8 
This is a different fix from the one reviewed because that one broke gfx9.

Fixes: ea7c89d1f5 - ac/surface: move determing ADDR_FMT_* into a helper function
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22833>
 2023-06-06 18:01:35 +00:00
Rhys Perry
b9c1d74ff4 radv: correctly skip vertex loads with packed formats 
This is supposed to check whether any channels of the element is used, but
skipped_start is always 0 for packed formats.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Fixes: a46acdbc3f ("radv: Lower non-dynamic VS inputs in NIR.")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9062
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23370>
 2023-06-06 16:59:16 +00:00
Rhys Perry
69e259dcff radv: initialize aco_compiler_options::is_opengl 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Fixes: 8d5cc23c18 ("aco: use gds reg when ordered xfb counter add")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23434>
 2023-06-06 16:09:28 +00:00
Rhys Perry
53383fe8a5 aco: fix ds_sub_gs_reg_rtn validation 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Fixes: 8d5cc23c18 ("aco: use gds reg when ordered xfb counter add")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23434>
 2023-06-06 16:09:28 +00:00
Samuel Pitoiset
8a22f5c372 radv: initialize the device cache UUID even if on-disk cache is disabled 
Otherwise the pipeline cache UUID isn't initialized as well, and the
RADV meta shaders cache can be corrupted.

Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9150
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23439>
 2023-06-06 12:47:31 +00:00
Qiang Yu
bd88c75d4c aco,radv: remove unused gs aco shader info 
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23432>
 2023-06-06 10:55:10 +00:00
Erik Faye-Lund
6d142078bc nir: use generated immediate comparison helpers 
This makes the code a bit less verbose, so let's use the helpers.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23393>
 2023-06-05 13:40:08 +00:00
Erik Faye-Lund
28b1c5bca1 nir: use nir_i{ne,eq}_imm helpers 
We already have these, so let's use them more.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23393>
 2023-06-05 13:40:07 +00:00
Rhys Perry
9ae5c942da aco/tests: add discard export target tests 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23371>
 2023-06-05 11:42:21 +00:00
Rhys Perry
21867b45c1 aco: fix has_color_exports=true for mrtz exports 
V_008DFC_SQ_EXP_NULL is after V_008DFC_SQ_EXP_MRTZ.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Tested-by: Mikhail Gavrilov mikhail.v.gavrilov@gmail.com
Fixes: d3611af389 ("aco: support nir_export_amd with ps targets")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9135
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23371>
 2023-06-05 11:42:21 +00:00
Eric Engestrom
cf323446e7 amd/ci: run gl(es) cts & piglit on radeonsi on vangogh 
Manual/post-merge for now because radeonsi isn't a priority for the few
steamdecks that we have in CI and we need to keep them free for merging
MRs.

Signed-off-by: Eric Engestrom <eric@igalia.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22990>
 2023-06-03 04:40:02 +00:00
Yonggang Luo
12256136e0 compiler: Rename shader_prim to mesa_prim and replace all usage of pipe_prim_type with mesa_prim 
This is a prepare step to remove depends on p_defines.h in src/util/*

This is done by:
replace pipe_prim_type with mesa_prim
replace shader_prim with mesa_prim
replace PIPE_PRIM_MAX  with MESA_PRIM_COUNT
replace SHADER_PRIM_  with MESA_PRIM_
replace PIPE_PRIM_ with MESA_PRIM_

This patch only replace code only

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23369>
 2023-06-03 03:29:03 +00:00
David Heidelberg
5140ff1948 ci: rename x86 and amd64 to x86_64, armhf to arm32, and i386 to x86_32 
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8049

Reviewed-by: Yonggang Luo <luoyonggang@gmail.com>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23282>
 2023-06-02 21:30:15 +02:00
Konstantin Seurer
46cd332c36 radv/rt: Fix pipeline libraries 
This was completely broken, because radv_create_group_handles would
access OOB stages.

Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23128>
 2023-06-02 14:19:37 +00:00
Tatsuyuki Ishi
5a85c4432c radv: Guard against misplaced RGP barrier markers. 
RGP will crash if we emit a layout transition marker outside a barrier.
If this happens, trigger an assertion if its enabled or silently discard
the marker otherwise to avoid traces that cannot be opened.

Also, guard against attempts to start barrier markers recursively, since
this will corrupt the internal start/end matching.

Closes: <https://gitlab.freedesktop.org/mesa/mesa/-/issues/7971>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21033>
 2023-06-02 11:55:03 +00:00
Tatsuyuki Ishi
7c48e886ec radv: Add RGP barrier markers for render pass transition and copy. 
This allows them to be attributed to the correct event instead of being
blend to the previous barrier.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21033>
 2023-06-02 11:55:03 +00:00
Qiang Yu
8db2d6181b ac/llvm: remove unused barrier implementation 
memory buffer barrier is still used when nir lowering, will
be removed later.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23096>
 2023-06-02 17:51:20 +08:00
Qiang Yu
5351209632 nir,ac/llvm,radeonsi: replace nir_buffer_atomic_add_amd with ssbo atomic 
Now that radeonsi support pass desc to ssbo atomic ops,
we can use ssbo atomic instead. aco does not implement
nir_buffer_atomic_add either.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23096>
 2023-06-02 17:51:02 +08:00
Qiang Yu
d39fd98a47 ac/llvm,radeonsi: lower nir_load_ring_esgs_amd in abi 
It's not implemented by aco. So move the code from llvm
to nir.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23096>
 2023-06-02 17:50:58 +08:00
Qiang Yu
b21098779d ac/llvm,radeonsi: lower nir_load_ordered_id_amd in abi 
aco does not implement it.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23096>
 2023-06-02 17:50:55 +08:00
Qiang Yu
19d9bca39e ac/llvm,radeonsi: lower nir_load_packed_passthrough_primitive_amd in abi 
aco does not implement it.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23096>
 2023-06-02 17:50:52 +08:00
Qiang Yu
bbcb02fac4 ac/llvm,radeonsi: lower nir_load_initial_edgeflags_amd in abi 
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23096>
 2023-06-02 17:50:49 +08:00
Qiang Yu
dc07743106 ac/llvm,radeonsi: lower load_workgroup_num_input_(vertices|primitives) in abi 
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23096>
 2023-06-02 17:50:46 +08:00
Qiang Yu
c8680f1f90 ac/llvm,radeonsi: lower nir_load_merged_wave_info_amd in abi 
aco does not implement it.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23096>
 2023-06-02 17:50:42 +08:00
Qiang Yu
327e35f667 ac/llvm,radeonsi: lower nir_load_gs_vertex_offset_amd in abi 
aco does not implement this.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23096>
 2023-06-02 17:50:38 +08:00
Qiang Yu
2d0e8e0258 aco: use ac_get_image_dim for array check when image intrinsic 
This is to avoid missing array flag when <=GFX8 and 3D image
in which case is treated as 2D array image.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23094>
 2023-06-02 09:21:59 +00:00
Qiang Yu
ed97cd92dc aco: implement nir_bindless_image_fragment_mask_load_amd 
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Sigend-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23094>
 2023-06-02 09:21:59 +00:00
Qiang Yu
50f9d644e8 aco: implement nir_xfb_counter_sub_amd 
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23094>
 2023-06-02 09:21:59 +00:00
Qiang Yu
8d5cc23c18 aco: use gds reg when ordered xfb counter add 
This is currently only used by radeonsi.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23094>
 2023-06-02 09:21:59 +00:00
Qiang Yu
438dcf6d0f aco/assembler: handle ds_(add|sub)_gs_reg_rtn encoding 
They are different than normal DS instructions, only
use DATA[0], not use ADDR.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23094>
 2023-06-02 09:21:59 +00:00
Qiang Yu
460b528c9e aco: implement load buffer with ACCESS_USES_FORMAT_AMD 
This is used by radeonsi for vs input load and cdna
image load emulation.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23094>
 2023-06-02 09:21:59 +00:00
Qiang Yu
c5c98d2f20 ac/nir/ngg: don't use 8bit alu ops 
aco doesn't support 8bit alu ops and radeonsi won't
call nir_lower_bit_size for most alu ops, so just
don't use 8bit alu ops (they will be lowered to 32bit
anyway if we do).

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23094>
 2023-06-02 09:21:58 +00:00
Qiang Yu
12ee7eccf7 aco,radv: remove unused aco_shader_info fields 
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23094>
 2023-06-02 09:21:58 +00:00
Qiang Yu
89dab66561 aco: implement two load lds ngg intrininsic for radeonsi 
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23094>
 2023-06-02 09:21:58 +00:00
Georg Lehmann
79821d7afb aco: p_start_linear_vgpr doesn't always need exec mask 
Foz-DB Navi21:
Totals from 1605 (1.21% of 132657) affected shaders:
CodeSize: 14023700 -> 14020320 (-0.02%)
Instrs: 2589881 -> 2589052 (-0.03%)
Latency: 22478420 -> 22473359 (-0.02%)
InvThroughput: 3851237 -> 3851092 (-0.00%)
Copies: 215316 -> 215438 (+0.06%); split: -0.39%, +0.44%

Allows more vcmpx usage.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23302>
 2023-06-01 20:18:23 +00:00
Rhys Perry
27047e11fb radv: allow wave32 for geometry shaders 
Because is_ngg wasn't set early enough, radv_get_wave_size() would always
return 64.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23336>
 2023-06-01 19:20:50 +00:00
Marek Olšák
7d066330e0 ac/surface: relax custom pitch requirements to any multiple of 256B on gfx10.3+ 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23015>
 2023-06-01 18:46:20 +00:00
Marek Olšák
3f7ddaf281 radv: implement setting a custom pitch to any multiple of 256B on gfx10.3+ 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23015>
 2023-06-01 18:46:20 +00:00
Marek Olšák
10c45fcc3f ac/nir: handle DEPTH as PITCH in ac_nir_lower_resinfo 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23015>
 2023-06-01 18:46:20 +00:00