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ac/llvm,radeonsi: lower nir_load_initial_edgeflags_amd in abi

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Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23096>
This commit is contained in:
Qiang Yu 2023-04-28 16:31:37 +08:00
parent dc07743106
commit bbcb02fac4
4 changed files with 15 additions and 24 deletions
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15
src/amd/llvm/ac_llvm_build.c
View file

@ -3759,21 +3759,6 @@ void ac_export_mrt_z(struct ac_llvm_context *ctx, LLVMValueRef depth, LLVMValueR
args->enabled_channels = mask;
}
LLVMValueRef ac_pack_edgeflags_for_export(struct ac_llvm_context *ctx,
const struct ac_shader_args *args)
{
/* Use the following trick to extract the edge flags:
* extracted = v_and_b32 gs_invocation_id, 0x700 ; get edge flags at bits 8, 9, 10
* shifted = v_mul_u32_u24 extracted, 0x80402u ; shift the bits: 8->9, 9->19, 10->29
* result = v_and_b32 shifted, 0x20080200 ; remove garbage
*/
LLVMValueRef tmp = LLVMBuildAnd(ctx->builder,
ac_get_arg(ctx, args->gs_invocation_id),
LLVMConstInt(ctx->i32, 0x700, 0), "");
tmp = LLVMBuildMul(ctx->builder, tmp, LLVMConstInt(ctx->i32, 0x80402u, 0), "");
return LLVMBuildAnd(ctx->builder, tmp, LLVMConstInt(ctx->i32, 0x20080200, 0), "");
}
static LLVMTypeRef arg_llvm_type(enum ac_arg_type type, unsigned size, struct ac_llvm_context *ctx)
{
LLVMTypeRef base;

3
src/amd/llvm/ac_llvm_build.h
View file

@ -520,9 +520,6 @@ struct ac_ngg_prim {
LLVMValueRef passthrough;
};
LLVMValueRef ac_pack_edgeflags_for_export(struct ac_llvm_context *ctx,
const struct ac_shader_args *args);
LLVMTypeRef ac_arg_type_to_pointee_type(struct ac_llvm_context *ctx, enum ac_arg_type type);
static inline LLVMValueRef ac_get_arg(struct ac_llvm_context *ctx, struct ac_arg arg)

6
src/amd/llvm/ac_nir_to_llvm.c
View file

@ -3729,12 +3729,6 @@ static bool visit_intrinsic(struct ac_nir_context *ctx, nir_intrinsic_instr *ins
case nir_intrinsic_load_packed_passthrough_primitive_amd:
result = ac_get_arg(&ctx->ac, ctx->args->gs_vtx_offset[0]);
break;
case nir_intrinsic_load_initial_edgeflags_amd:
if (ctx->stage == MESA_SHADER_VERTEX && !ctx->info->vs.blit_sgprs_amd)
result = ac_pack_edgeflags_for_export(&ctx->ac, ctx->args);
else
result = ctx->ac.i32_0;
break;
case nir_intrinsic_is_subgroup_invocation_lt_amd: {
LLVMValueRef count = LLVMBuildAnd(ctx->ac.builder, get_src(ctx, instr->src[0]),
LLVMConstInt(ctx->ac.i32, 0xff, 0), "");

15
src/gallium/drivers/radeonsi/si_nir_lower_abi.c
View file

@ -519,6 +519,21 @@ static bool lower_intrinsic(nir_builder *b, nir_instr *instr, struct lower_abi_s
case nir_intrinsic_load_workgroup_num_input_primitives_amd:
replacement = ac_nir_unpack_arg(b, &args->ac, args->ac.gs_tg_info, 22, 9);
break;
case nir_intrinsic_load_initial_edgeflags_amd:
if (stage == MESA_SHADER_VERTEX && !sel->info.base.vs.blit_sgprs_amd) {
/* Use the following trick to extract the edge flags:
* extracted = v_and_b32 gs_invocation_id, 0x700 ; get edge flags at bits 8, 9, 10
* shifted = v_mul_u32_u24 extracted, 0x80402u ; shift the bits: 8->9, 9->19, 10->29
* result = v_and_b32 shifted, 0x20080200 ; remove garbage
*/
nir_ssa_def *tmp = ac_nir_load_arg(b, &args->ac, args->ac.gs_invocation_id);
tmp = nir_iand_imm(b, tmp, 0x700);
tmp = nir_imul_imm(b, tmp, 0x80402);
replacement = nir_iand_imm(b, tmp, 0x20080200);
} else {
replacement = nir_imm_int(b, 0);
}
break;
default:
return false;
}