Commit graph

66874 commits

Author SHA1 Message Date
Chia-I Wu
f1662e3670 ilo: sanity check ilo_render_get_*_len()
Assert that we never write more than what ilo_render_get_*_len() returns.

Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
2014-09-26 21:15:55 +08:00
Chia-I Wu
7fc7415316 ilo: simplify ilo_render_get_query_len()
For all supported query types, we always emit a PIPE_CONTROL.  Call
ilo_render_get_flush_len() for simplicity and clarity.

Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
2014-09-26 21:15:55 +08:00
Chia-I Wu
0afc17ea49 ilo: make ilo_render_emit_query() direct
Remove emit_query() and ILO_RENDER_QUERY indirections.

Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
2014-09-26 21:15:55 +08:00
Chia-I Wu
18cbd3cc34 ilo: make ilo_render_emit_flush() direct
Remove emit_flush() and ILO_RENDER_FLUSH indirections.

Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
2014-09-26 21:15:55 +08:00
Chia-I Wu
e3451552d2 ilo: simplify ilo_render invalidation
ilo_render is based on ilo_builder.  We should only care if the builder
buffers are invalidated, or if the hardware context is invalidated.  Replace
ilo_render_invalidate() with flags by ilo_render_invalidate_builder() and
ilo_render_invalidate_hw().

Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
2014-09-26 21:15:55 +08:00
Chia-I Wu
ce2bda300d ilo: add ilo_builder_{dynamic,surface}_used()
Return how many DWords are used in dynamic and surface buffers respectively.

Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
2014-09-26 21:15:55 +08:00
Chia-I Wu
2df2f60e8d ilo: rename state buffer to dynamic buffer
Both dynamic buffer and surface buffer are state buffers.  We should not use
state buffer to refer to the former.

Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
2014-09-26 21:15:55 +08:00
Chia-I Wu
a7f2ab668c ilo: constify ilo_render in ilo_render_get_sample_position()
It is a getter and is not supposed to modify ilo_render.

Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
2014-09-26 21:15:55 +08:00
Chia-I Wu
23d66a42a3 ilo: rename 3d_pipeline to render
Follow the file renaming.

Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
2014-09-26 21:15:55 +08:00
Chia-I Wu
3afe30e64b ilo: remove struct ilo_3d
Move members of ilo_3d that still make sense to ilo_context.  With ilo_3d
gone, rename functions whose names begin with ilo_3d to something more
appropriate.

Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
2014-09-26 21:15:55 +08:00
Chia-I Wu
b6443ae969 ilo: rename ilo_3d_pipeline*.[ch] to ilo_render*.[ch]
They are used to build render engine commands, which can be more than 3D.

Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
2014-09-26 21:15:55 +08:00
Chia-I Wu
392890d5de ilo: rename ilo_3d.[ch] to ilo_draw.[ch]
There is not much left in struct ilo_3d.  We want to kill it and ilo_3d.[ch]
will be bad names.

Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
2014-09-26 21:15:55 +08:00
Michel Dänzer
7e55c3b352 st/mesa: Use PIPE_USAGE_STAGING for GL_STATIC/DYNAMIC/STREAM_READ buffers
Such buffers can only be useful by reading from them with the CPU, so we
need to make sure CPU reads are fast.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=84178
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Cc: mesa-stable@lists.freedesktop.org
2014-09-26 16:53:13 +09:00
Tapani Pälli
9caa5c3b13 glsl: remove unused link_assign_uniform_block_offsets
ubo offsets are assigned by link_uniform_blocks since 514f8c7e

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2014-09-26 08:29:10 +03:00
Kalyan Kondapally
e018ea81bf glsl: Structures must have same name to be considered same type.
According to GLSL(4.2) and GLSL-ES (1.0, 3.0) spec, Structures must
have the same name to be considered same type. We currently ignore
the name check while checking if two records are same. This patch
fixes this.

Patch fixes failing tests in WebGL conformance test
'shaders-with-uniform-structs' when running Chrome on OpenGL ES.

v2: Do not force name comparison with unnamed types (Tapani)
v3: Cleanups (Matt)

Signed-off-by: Kalyan Kondapally <kalyan.kondapally@intel.com>
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=83934
2014-09-26 08:29:10 +03:00
Tapani Pälli
1cb81d3a9b glsl: fix uniform location count used for glsl types
Patch fixes the slot count used by vector types and adds 1 slot
to be used by image and sampler types.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=82921
2014-09-26 08:29:10 +03:00
Ilia Mirkin
a5bbfeda97 gm107/ir: take relative pfetch offset into account
There is no dedicated instruction for this, so just combine it with the
constant offset.

Acked-by: Ben Skeggs <bskeggs@redhat.com>
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "10.3" <mesa-stable@lists.freedesktop.org>
2014-09-26 01:13:06 -04:00
Michel Dänzer
4a38b154fd gallivm: More fallout from disabling with LLVM 3.6
The draw module would still try to use gallivm, causing many piglit tests
to fail with an assertion failure. llvmpipe might have been similarly
affected.

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
2014-09-26 11:35:52 +09:00
Ilia Mirkin
cdc4de1215 gm107/ir: add support for indirect const buffer selection
This was missed in the commit that enabled it for fermi/kepler as part
of ARB_gpu_shader5

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "10.3" <mesa-stable@lists.freedesktop.org>
2014-09-25 22:15:50 -04:00
Ilia Mirkin
0532a5fd00 gm107/ir: fix texture argument order
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "10.3" <mesa-stable@lists.freedesktop.org>
2014-09-25 22:15:50 -04:00
Ilia Mirkin
d3c3bba6d0 gm107/ir: fix manual TXD for array targets
This parallels the fixes in commit afea9bae.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "10.3" <mesa-stable@lists.freedesktop.org>
2014-09-25 22:15:49 -04:00
Ilia Mirkin
d78b533c29 nouveau: fix glCompressedTexImage
mesa_texstore expects pixel data, not compressed data. For compressed
textures, we want to just copy the bits in without any conversion.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Acked-by: Francisco Jerez <currojerez@riseup.net>
2014-09-25 22:15:49 -04:00
Ilia Mirkin
0147c10c5f nv50/ir: avoid deleting pseudo instructions too early
What happens is that a SPLIT operation is part of the spill node, and as
a pseudo op, the instruction gets erased after processing its first def.
However the later defs still need to refer to it, so instead delay
deleting until after that whole RA node is done processing.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=79462
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "10.2 10.3" <mesa-stable@lists.freedesktop.org>
2014-09-25 22:15:49 -04:00
Ilia Mirkin
9d2e298dd4 mesa/st: NumLayers is only valid for array textures
For 3d textures, NumLayers is set to 1, which is not what we want. This
fixes the newly added gl-layer-render-storage test (which constructs
immutable 3d textures). Fixes regression introduced in d82bd7eb06.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=84145
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Tested-by: Michel Dänzer <michel.daenzer@amd.com>
Acked-by: Chris Forbes <chrisf@ijw.co.nz>
2014-09-25 22:15:49 -04:00
Ilia Mirkin
fca2216ced nv50/ir: add some comments on edge classification
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2014-09-25 22:15:49 -04:00
Ilia Mirkin
1ae32e24ca nv50,nvc0: fix 3d blit logic for odd depth/stencil formats
Reported-by: David Heidelberger <david.heidelberger@ixit.cz>
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2014-09-25 22:15:49 -04:00
Ilia Mirkin
b49dfb68ed nv50,nvc0: add missing depth/stencil formats to tile flag selection
Reported-by: David Heidelberger <david.heidelberger@ixit.cz>
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2014-09-25 22:15:49 -04:00
Eric Anholt
db11eb92cf vc4: Switch from errx() to fprintf() and abort().
These are pretty catastrophic, "should never happen" failure paths (though
4 tests in piglit hit them currently, due to a single bug).  An abort()
that you can gdb on easily is probably more useful than a clean exit,
particularly since a bug in piglit framework right now is causing early
exit(1)s to simply not be recorded in the results at all.
2014-09-25 16:41:25 -07:00
Eric Anholt
45962fbeee vc4: Fix miplevel validation for raster textures.
We were using the un-minified value, meaning we'd reject correctly laid
out textures.
2014-09-25 16:41:25 -07:00
Matt Turner
43267a325f mesa: Replace IS_NEGATIVE(x) with x < 0.0f.
I only made IS_NEGATIVE(x) use signbit in commit 0f3ba405 in an attempt
to fix 54805, but it didn't help. We didn't use signbit on some
platforms and instead defined it to x < 0.0f.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2014-09-25 13:57:29 -07:00
Matt Turner
50e2f70093 radeon: Use PRINTLIKE macro. 2014-09-25 13:57:29 -07:00
Matt Turner
b66791d47f configure.ac: Replace gallium_check_st with gallium_require_drm. 2014-09-25 13:57:29 -07:00
Matt Turner
28e84c93bb configure.ac: Drop gallium directory tracking.
Was only tracked to be printed at the end of configure, but configure
quits if it can't build something we requested, rather than silently
dropping it, so printing these directories has little use.
2014-09-25 13:57:29 -07:00
Matt Turner
691bd9b9df configure.ac: Use autoconf macro for GNU make. 2014-09-25 13:57:28 -07:00
Matt Turner
e4be17fd04 ralloc: Mark ralloc functions with gcc's malloc attribute.
Cuts a few hundred bytes from the DRI drivers, so it must give gcc some
extra information.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2014-09-25 13:52:55 -07:00
Matt Turner
976464c210 mesa: Replace a priori knowledge of gcc attributes with configure tests.
Note that I had to add support for testing the packed attribute to
m4/ax_gcc_func_attribute.m4.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com> [C bits]
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2014-09-25 13:52:55 -07:00
Matt Turner
4a96df73e7 mesa: Replace a priori knowledge of gcc builtins with configure tests.
Presumbly this will let clang and other compilers use the built-ins as
well.

Notice two changes specifically:
   - in _mesa_next_pow_two_64(), always use __builtin_clzll and add a
     static assertion that this is safe.
   - in macros.h, remove the clang-specific definition since it should
     be able to detect __builtin_unreachable in configure.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com> [C bits]
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2014-09-25 13:52:55 -07:00
Matt Turner
3e00822619 i965/compaction: Document instruction compaction capabilities.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2014-09-25 11:02:37 -07:00
Matt Turner
54e30dbf4d i965: Emit ELSE/ENDIF JIP with type D on Gen 7.
The spec says the type must be W (JIP is 16-bits after all), but we've
been emitting it with a UD type all along and have experienced no
adverse effects. Changing the type to D allows ELSE and ENDIF
instructions to be compacted.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2014-09-25 11:02:36 -07:00
Matt Turner
6a4e84edfa i965/compaction: Support compaction of control flow instructions.
We're currently emitting compactable control flow instruction the wrong
types, preventing their compaction. The next patch will fix this and
actually enable compaction.

On chips that cannot compact control flow instructions, attempts to find
a match in the datatype table will fail.

Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2014-09-25 11:02:36 -07:00
Matt Turner
14e44f896f i965/compaction: Add support for G45.
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2014-09-25 11:02:36 -07:00
Matt Turner
5a559557e6 i965: Add BRW_OPCODE_NENOP for G45.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2014-09-25 11:02:36 -07:00
Matt Turner
64c0f62018 i965/compaction: Add support for Gen5.
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Acked-by: Ian Romanick <ian.d.romanick@intel.com>
2014-09-25 11:02:36 -07:00
Matt Turner
bb05b530ab i965/compaction: Reduce size of compacted_counts[] array.
The array was previously indexed in units of brw_compact_inst (8-bytes),
but before compaction all instructions are uncompacted, so every odd
element was unused.

Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2014-09-25 11:02:36 -07:00
Matt Turner
90c982a8a8 i965/compaction: Use sizeof brw_inst/brw_compact_inst.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2014-09-25 11:02:36 -07:00
Matt Turner
b92a1e2174 i965/compaction: Increment offset in for loop.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2014-09-25 11:02:36 -07:00
Matt Turner
eebf1f5441 i965/compaction: Make src_offset local to the for loop.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2014-09-25 11:02:36 -07:00
Matt Turner
cde887ccb1 i965/compaction: Remove unnecessary is-compacted? check.
Used to pass over previously compacted instructions in this loop, but no
longer. No point in checking.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2014-09-25 11:02:36 -07:00
Matt Turner
118021f929 i965/compaction: Don't set UIP on ELSE on Gen < 8.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2014-09-25 11:02:36 -07:00
Matt Turner
45c3ece266 i965/compaction: Rework 3-src compaction logic.
It may be possible to create a contrived example in which a 3-src
instruction would have been compacted on Gen < 8. I'd rather not
discover it in the wild.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2014-09-25 11:02:36 -07:00