Commit graph

105005 commits

Author SHA1 Message Date
Dave Airlie
2631fd3b0b gallivm: rework lp_build_tgsi_soa to take a struct
The parameters were getting messy and I have to add a few more
for compute shaders, so clean it up before proceeding.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2019-07-24 09:20:09 +10:00
Jason Ekstrand
9700e45463 nir/lower_io: Return SSA defs from helpers
I can't find a single place where nir_lower_io is called after going out
of SSA which is the only real reason why you wouldn't do this. Returning
SSA defs is more idiomatic and is required for the next commit.

Reviewed-by: Matt Turner <mattst88@gmail.com>
2019-07-23 17:48:49 -05:00
Dylan Baker
7cf50af6f5 meson: allow building all glx without any drivers
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111016
Fixes: a47c525f32
       ("meson: build glx")
Acked-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
2019-07-23 15:34:23 -07:00
Jan Zielinski
3d6cffffcf swr/rasterizer: Fix 3D resource copies.
Ensure constant attributes stay constant with barycentric interpolation.

Reviewed-by: Alok Hota <alok.hota@intel.com>
2019-07-23 21:55:09 +02:00
Jan Zielinski
ec4a5f5e13 swr/rasterizer: Fix return type on SIMD8 version of Clamp and Normalize utility functions
Reviewed-by: Alok Hota <alok.hota@intel.com>
2019-07-23 21:55:09 +02:00
Jan Zielinski
47cdb0ac27 swr/rasterizer: small formatting changes
Reviewed-by: Alok Hota <alok.hota@intel.com>
2019-07-23 21:55:09 +02:00
Jan Zielinski
ccc6b4f96b swr/rasterizer: Adding support for unhandled clipEnable state
Clipping is not correctly handled by the rasterizer - fixing this.

Reviewed-by: Alok Hota <alok.hota@intel.com>
2019-07-23 21:55:09 +02:00
Bas Nieuwenhuizen
e5b3f0a867 radv/gfx10: Enable binning.
Numbers for Talos:

gfx10 without binning: 77.0 77.7 77.2 77.6
gfx10 with binning: 82.3 82.0 82.7 82.4

Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2019-07-23 21:26:59 +02:00
Bas Nieuwenhuizen
3268c806fb radv/gfx10: Implement bin size calculation.
Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2019-07-23 21:26:59 +02:00
Bas Nieuwenhuizen
4b757697e9 radv/gfx9: Select between depth/color bins based on area.
Mirrors radeonsi.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
2019-07-23 21:26:59 +02:00
Bas Nieuwenhuizen
22f2f76789 radv: Generalize binning settings.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
2019-07-23 21:26:59 +02:00
Bas Nieuwenhuizen
793cbf6161 radv/gfx10: Use new scan converter.
Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2019-07-23 21:26:59 +02:00
Bas Nieuwenhuizen
4058b354c5 radv: Set FLUSH_ON_BINNING_TRANSITION.
Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2019-07-23 21:26:59 +02:00
Bas Nieuwenhuizen
906fcfccfd radv: Use pbb_allow for framebuffer BREAK_BATCH.
Ported from radeonsi.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
2019-07-23 21:26:59 +02:00
Marek Olšák
264ab6ffcd radeonsi/nir: set tgsi_shader_info::uses_fbfetch for KHR_blend_equation_adv.
This doesn't implement the color buffer load.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
2019-07-23 15:08:37 -04:00
Marek Olšák
45556731b6 tgsi/scan: add uses_fbfetch
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
2019-07-23 15:08:37 -04:00
Marek Olšák
ee858871bd radeonsi: fail if importing a texture with incorrect last_level or samples
v2: don't fail if the texture comes from an incompatible driver.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> (v1)
2019-07-23 15:08:27 -04:00
Marek Olšák
f8b6c5a1a6 radeonsi: rewrite si_get_opaque_metadata, also for gfx10 support
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
2019-07-23 15:03:51 -04:00
Marek Olšák
e718f8e713 radeonsi: simplify si_get_input_prim and remove incorrect TODO comment
u_vertices_per_prim(QUADS) is the same as TRIANGLES.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
2019-07-23 15:03:49 -04:00
Marek Olšák
16392cc3f3 radeonsi/gfx10: fix and enable CLEAR_STATE
it was a driver bug.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
2019-07-23 15:03:47 -04:00
Marek Olšák
ad642d5b3a radeonsi: stop using info.opcode_count[TGSI_OPCODE_INTERP_SAMPLE]
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
2019-07-23 15:03:46 -04:00
Marek Olšák
6ac2146a98 ac/nir: implement nir_op_pack_{us}norm_2x16
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
2019-07-23 15:03:44 -04:00
Pierre-Eric Pelloux-Prayer
079e5f73d7 mesa/st: rewrite src var when lowering tex_src_plane
The assign_extra_samplers() adds the needed extra samplers but they need
to be used in the nir_tex_instr.
Otherwise the plane information is simply lost and all nir_tex_instr use the
same sampler.
Here's an example of the bug:

NIR before st_nir_lower_tex_src_plane:
	vec1 32 ssa_8 = load_const (0x00000000 /* 0.000000 */)
	vec4 32 ssa_9 = tex ssa_0 (texture_deref), ssa_0 (sampler_deref), ssa_5 (coord), ssa_8 (plane)
	vec1 32 ssa_10 = load_const (0x00000001 /* 0.000000 */)
	vec4 32 ssa_11 = tex ssa_0 (texture_deref), ssa_0 (sampler_deref), ssa_5 (coord), ssa_10 (plane)

After:

	vec4 32 ssa_9 = tex ssa_0 (texture_deref), ssa_0 (sampler_deref), ssa_5 (coord)
	vec4 32 ssa_11 = tex ssa_0 (texture_deref), ssa_0 (sampler_deref), ssa_5 (coord)

This fixes the following piglit test for radeonsi + NIR:
  - ext_image_dma_buf_import-sample_nv12
  - ext_image_dma_buf_import-sample_yuv420
  - ext_image_dma_buf_import-sample_yvu420

Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
2019-07-23 15:00:43 -04:00
Pierre-Eric Pelloux-Prayer
e9cf8c1d30 u_blitter: add a msaa parameter to util_blitter_clear
Fixes: ea5b7de138 ("radeonsi: make gl_SampleMaskIn = 0x1 when MSAA is disabled")

Tested-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2019-07-23 14:42:20 -04:00
Pierre-Eric Pelloux-Prayer
d811446e6c u_blitter: enable msaa when dst num samples is > 1
Commit ea5b7de138 broke some piglit tests on radeonsi (Bonaire hardware).
This commit fixes half of the regression by enabling msaa if the dest surface has
more than 1 sample (instead of hardcoding it to false).

Fixes: ea5b7de138 ("radeonsi: make gl_SampleMaskIn = 0x1 when MSAA is disabled")

Tested-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2019-07-23 14:42:20 -04:00
Jason Ekstrand
ae392d73c9 nir/gather_info: Look for uses of helper invocations
The one obvious omission here is gl_HelperInvocation itself.  However,
the spec doesn't require that we generate then when gl_HelperInvocation
is used, it merely mandates that we report them if they are there.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2019-07-23 13:40:41 -05:00
Jason Ekstrand
41ab92a327 nir/gather_info: Move setting uses_64bit out of the switch
Otherwise, as we add things to the switch, we're going to forget and add
some 64-bit op at some point in the future and it'll stop getting
flagged.  There's no reason why we can't do the check for derivatives.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2019-07-23 13:40:41 -05:00
Jason Ekstrand
0e6cb481fa nir: Add a nir_tex_instr_has_implicit_derivatives helper
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2019-07-23 13:40:41 -05:00
Jason Ekstrand
7a98c7804c nir: Move nir_alu_instr_is_comparison to the ALU section
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2019-07-23 13:40:41 -05:00
Rafael Antognolli
1f4cbc9a06 intel/genxml: Add new test for subgroups.
Make sure that a <group> tag within another <group> tag work just fine.

v2: rename 'halfbyte' to 'byte' to match the size (Lionel).

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2019-07-23 17:45:19 +00:00
Rafael Antognolli
fe5ae96d66 intel/genxml: Add basic infra for encoding/decoding unit tests.
Adding option to print quiet.

v2: Add license header.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2019-07-23 17:45:19 +00:00
Rafael Antognolli
e25ebe2ec9 intel/gen_decoder: Decode <group> inside <group>.
Now we can decode a <group> tag inside another <group> tag, and properly
print its indices and content.

v2: Use push/pop stack to fields, groups and iters (Lionel).
v3: Add assert(iter->level < DECODE_MAX_ARRAY_DEPTH) (Lionel).

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2019-07-23 17:45:19 +00:00
Rafael Antognolli
f670c2e1ff intel/gen_decoder: Add the concept of array "levels".
We currently only support one level, which is the basic level of a
<group> tag.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2019-07-23 17:45:19 +00:00
Rafael Antognolli
618d054283 intel/gen_decoder: Add array field.
We currently use the group->next pointer to iterate through the <group>
tags. This change them to be a type of field, so we can descend into
them while iterating, and then go back to the original position. Will be
useful when we want to decode <group>'s inside <group>'s, and when there
are more <field>'s after a <group> tag.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2019-07-23 17:45:19 +00:00
Rafael Antognolli
21bdd51942 intel/gen_decoder: Rename internally "group" to "array".
A gen_group (group in most of the code) can be of several types:
   - instruction
   - struct
   - register
   - group (?!?)

The <group> tag actually represents an array of elements. So at least
in our code, lets call it an array to avoid confusion with gen_group.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2019-07-23 17:45:19 +00:00
Rafael Antognolli
69506cbb74 intel/gen_decoder: Add gen_spec_load_filename() function.
Refactor the code from gen_spec_load_from_path() into a separate
function, that can be used with a xml file that doesn't fit the genX.xml
filename format.

Will be used soon for implementing unit tests for gen_decoder.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2019-07-23 17:45:19 +00:00
Rafael Antognolli
1f2b22a6bd intel/gen_decoder: Fix parsing of small genxml file.
When using gen_spec_load_from path, only abort decoding if the read
length is 0. Previously, we were aborting if finding an EOF, even if
something was read from the file.

Also only kill the decoded file if no commands or structs were found,
and print a message in such case.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2019-07-23 17:45:19 +00:00
Guido Günther
85996567f5 kmsro: Extend to include mxsfb-drm
This allows using the LCDIF display controllers (with the mxsfb drm
modesetting driver) along with the Etnaviv render-only drivers. LCDIF is
found on i.MX SoCs.

Signed-off-by: Guido Günther <agx@sigxcpu.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
2019-07-23 17:12:10 +00:00
Sagar Ghuge
806e5a37ed anv: Implement VK_KHR_imageless_framebuffer
v2: Pass pointer instead of struct instance (Lionel)

v3: 1) Fix small nits (Jason)
    2) Add way to detect anv_framebuffer don't have attachments (Jason)
    3) Get rid of unncessary pNext chain walk (Jason)
    4) Keep framebuffer instance in anv_cmd_state (Jason)

v4: 1) Dump attachments from cmd_buffer (Jason)

v5: 1) Fix condition check and add assertion (Lionel)

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2019-07-23 10:01:45 -07:00
Alyssa Rosenzweig
840b806d64 panfrost/midgard: Allocate registers once (per-screen)
This should save a lot of per-compile time by using the RA the way it's
actually supposed to be used.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
2019-07-23 09:06:21 -07:00
Lionel Landwerlin
772a5f9814 anv: fix use of comma operator
This doesn't fix any bug at the moment because the next statement is
'true' which happens to be APIMODE_D3D, but if that changes it could.

The fixes tags is as far I could go but the error predates it (2016 is
probably far enough).

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 8db6f2e6eb ("anv/pipeline: Roll genX_pipeline_util.h into genX_pipeline.c")
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2019-07-23 15:54:48 +00:00
Andrii Simiklit
79ab2c3e57 nir: use | instead of || operator
warning: use of logical '||' with constant operand
note: use '|' for a bitwise operation

Fixes: 758fdce9fe ("nir: Add some generic helpers for writing lowering passes")
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Signed-off-by: Andrii Simiklit <andrii.simiklit@globallogic.com>
2019-07-23 18:08:58 +03:00
Arnaud Patard
397f9ba69f panfrost: Fix T6XX Support
While testing kmscube with mesa master, it turns out that kmscube is not
working anymore. After bisecting, commit
5a7688fdec is the culprit. A short trial
and error session allowed to find the removed bit of code making kmscube
working again.

This patch adds it back.

Fixes: 5a7688fde ("panfrost: Use 64-bit descriptors globally")

v2: Add comment pointing out this is magic. [Alyssa, trivial]

Signed-off-by: Arnaud Patard <arnaud.patard@rtp-net.org>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
2019-07-23 08:04:42 -07:00
Alyssa Rosenzweig
83a1d5544a panfrost: Use correct definition for is_t6xx
Rather than anything "early Midgard", limit us specifically to T6XX, as
certain workarounds only apply to genuine T6XX, not T7XX.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
2019-07-23 08:04:42 -07:00
Eric Engestrom
3acc4278ad nir: don't return void
Fixes: 14531d676b ("nir: make nir_const_value scalar")
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
2019-07-23 16:02:37 +01:00
Eric Engestrom
7797823afa util: fix asprintf() fallback
Fixes: 9607d499dc ("util: add asprintf() wrapper for MSVC")
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
2019-07-23 14:59:07 +00:00
Michel Dänzer
22c7738520 st/mesa: Try re-importing resource if necessary in st_vdpau_map_surface
This can be the case if the resource was obtained from
st_vdpau_output/video_surface_gallium.

st_vdpau_output/video_surface_dma_buf do a similar dance internally.

v2:
* Pass PIPE_HANDLE_USAGE_FRAMEBUFFER_WRITE instead of 0 for usage.

Bugzilla: https://bugs.freedesktop.org/111099
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> # v1
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2019-07-23 16:28:02 +02:00
Michel Dänzer
7499e7362d radeonsi: Allow PIPE_TEXTURE_2D_ARRAY in si_texture_from_handle
Needed for the following st/mesa fix.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2019-07-23 16:26:04 +02:00
Alyssa Rosenzweig
2f93ecd654 panfrost: Fake CAPs for dEQP-GLES31
We still have some big ticket items left on GLES 3.0, but it's often
helpful to be able to access higher dEQP levels for debugging features
that just don't quite match a particular API.

Plus, this opens up a whole slew of new features to poke at if boredom
overtakes, ahem.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
2019-07-23 06:36:48 -07:00
Mark Menzynski
7493fbf032 nvc0/ir: Fix assert accessing null pointer
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111007
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111167

Signed-off-by: Mark Menzynski <mmenzyns@redhat.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Tobias Klausmann<tobias.klausmann@freenet.de>
2019-07-23 15:08:25 +02:00