Commit graph

11465 commits

Author SHA1 Message Date
Brian Paul
fe043ae554 svga: assorted cleanups in shader code
Reviewed-by: José Fonseca <jfonseca@vmware.com>
2014-01-23 08:23:00 -07:00
Brian Paul
2a30379dcd svga: rename shader_result -> variant
To be more consisten with other parts of gallium.  Plus, update/add
various comments.

Reviewed-by: José Fonseca <jfonseca@vmware.com>
2014-01-23 08:22:58 -07:00
José Fonseca
ab6f9fccd4 radeon: More missing stdio.h includes. 2014-01-23 14:20:20 +00:00
José Fonseca
6b6fdb6aa9 radeon: Adding missing stdio.h include.
Became apparent with the C11 thread changes.  Unfortunately I didn't
have all dependencies to build the driver, and only noticed
this issue on build server.
2014-01-23 13:23:43 +00:00
José Fonseca
fd33a6bcd7 gallium: Use C11 thread abstractions.
Note that PIPE_ROUTINE now returns an int.

Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
2014-01-23 12:55:55 +00:00
Marek Olšák
d382e90614 gallium: remove PIPE_CAP_SCALED_RESOLVE
If any driver doesn't support this, it can use a blit after resolving
the samples.

Reviewed-by: Brian Paul <brianp@vmware.com>
2014-01-23 01:47:14 +01:00
Marek Olšák
a8930adbf8 radeonsi: use hardware scissors correctly
Use the WINDOW and VPORT scissors for the framebuffer and scissor test,
respectively. The other two scissors are disabled (they cover the max fb size).

We actually have 16 VPORT scissors, which will map well to ARB_viewport_array.

Also, we don't need to write SC_WINDOW_OFFSET with this commit, because it's
disabled everywhere.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2014-01-23 01:47:14 +01:00
Marek Olšák
69c29cb147 radeonsi: handle R600_CONTEXT_PS_PARTIAL_FLUSH in si_emit_cache_flush
For consistency only, This is unused by radeonsi currently.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2014-01-23 01:47:14 +01:00
Marek Olšák
5dfb10b2f5 r600g,radeonsi: if discarding whole buffer range, discard whole resource instead
Also set the unsynchronized flag if the whole resource was discarded
to avoid doing buffer-busy checks again.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2014-01-23 01:47:14 +01:00
Dave Airlie
2212a97fe3 llvmpipe: dump geometry shaders when using LP_DEBUG=tgsi
for consistency with vs and fs dumpers.

Reviewed-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2014-01-22 14:08:03 +10:00
Brian Paul
b9f68d927e svga: implement TGSI_PROPERTY_FS_COLOR0_WRITES_ALL_CBUFS
Fixes several colorbuffer tests, including piglit "fbo-drawbuffers-none"
for "gl_FragColor" and "glDrawPixels" cases.

v2: rework patch to only avoid creating extra shader variants when
TGSI_PROPERTY_FS_COLOR0_WRITES_ALL_CBUFS is not specified.  Per Jose.
Use a write_color0_to_n_cbufs key field to replicate color0 to N
color buffers only when N > 0 and WRITES_ALL_CBUFS is set.

Reviewed-by: José Fonseca <jfonseca@vmware.com>
2014-01-21 10:53:51 -08:00
Brian Paul
384fd64ab1 svga: rename color output variables
Just to be bit more readable.

Reviewed-by: José Fonseca <jfonseca@vmware.com>
2014-01-21 10:53:51 -08:00
Brian Paul
f6bc7d6586 svga: fix clearing for null color buffers
Fixes piglit "fbo-drawbuffers-none glClear" test.

Reviewed-by: José Fonseca <jfonseca@vmware.com>
2014-01-21 10:53:51 -08:00
Brian Paul
3ede8dd5f1 softpipe: fix crash when accessing null colorbuffer
Fixes piglit fbo-missing-attachment-blit test.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=73755

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2014-01-20 08:18:21 -08:00
José Fonseca
a1e528a0f0 i915,r200,radeon,vega: Change vendor from "VMware, Inc." to "Mesa Project".
These are components which were originally developed by Tungsten Graphics,
which was in turn acquired by VMware, but are de facto now being maintained
by third-party contributors of the Mesa open-source community.

This matches what's reported by swrast driver and a few other components.

Suggested by Ian Romanick.
2014-01-20 14:15:27 +00:00
Emil Velikov
66fd5057d3 nv50: drop obsolete check from error path
At 'out_err' the nv50_context has been calloc-ated.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2014-01-18 19:17:45 +00:00
Emil Velikov
e1e30f6dfb nv50: assert before trying to out-of-bounds access framebuffer.cbufs
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2014-01-18 19:17:41 +00:00
Emil Velikov
3805a864b1 nv50: assert before trying to out-of-bounds access samplers
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2014-01-18 19:17:37 +00:00
Emil Velikov
6a53b81086 nv50: assert before trying to out-of-bounds access textures
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2014-01-18 19:17:34 +00:00
Emil Velikov
19069803be nv50: pass vtxbuf index as unsigned
The index passed to the function is already unsigned, and internally
we threat it as unsigned.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2014-01-18 19:17:28 +00:00
Emil Velikov
1773611c52 nv50: assert before trying to out-of-bounds access vtxbuf
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2014-01-18 19:17:24 +00:00
Emil Velikov
741e935a72 nv50: typecast the result of ffs() to unsigned
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2014-01-18 19:17:20 +00:00
Emil Velikov
5e130f2371 nv50: assert before trying to out-of-bounds access constbuf
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2014-01-18 19:17:15 +00:00
Emil Velikov
12e744abbb nv50: access only the available amount of constbuf
The textures array is defined as a number of NV50_MAX_PIPE_CONSTBUFS
per shader stage. Currently the nv50 driver handles only 3 shader
stages, thus we wreck chaos when accessing array-out-of-bounds.

Cc: 9.1 9.2 10.0 <mesa-stable@lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2014-01-18 19:17:09 +00:00
Emil Velikov
d606ca37eb nv50: access only the available amount of textures
The textures array is defined as a number of PIPE_MAX_SAMPLERS per shader stage.
Currently nv50 driver handles only 3 shader stages, thus we wreck chaos when
accessing array-out-of-bounds.

Fixes a segfault in piglit/bin/arb_texture_buffer_object-data-sync -fbo -auto

Cc: 9.1 9.2 10.0 <mesa-stable@lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2014-01-18 19:16:16 +00:00
José Fonseca
8771285054 s/Tungsten Graphics/VMware/
Tungsten Graphics Inc. was acquired by VMware Inc. in 2008.  Leaving the
old copyright name is creating unnecessary confusion, hence this change.

This was the sed script I used:

    $ cat tg2vmw.sed
    # Run as:
    #
    #   git reset --hard HEAD && find include scons src -type f -not -name 'sed*' -print0 | xargs -0 sed -i -f tg2vmw.sed
    #

    # Rename copyrights
    s/Tungsten Gra\(ph\|hp\)ics,\? [iI]nc\.\?\(, Cedar Park\)\?\(, Austin\)\?\(, \(Texas\|TX\)\)\?\.\?/VMware, Inc./g
    /Copyright/s/Tungsten Graphics\(,\? [iI]nc\.\)\?\(, Cedar Park\)\?\(, Austin\)\?\(, \(Texas\|TX\)\)\?\.\?/VMware, Inc./
    s/TUNGSTEN GRAPHICS/VMWARE/g

    # Rename emails
    s/alanh@tungstengraphics.com/alanh@vmware.com/
    s/jens@tungstengraphics.com/jowen@vmware.com/g
    s/jrfonseca-at-tungstengraphics-dot-com/jfonseca-at-vmware-dot-com/
    s/jrfonseca\?@tungstengraphics.com/jfonseca@vmware.com/g
    s/keithw\?@tungstengraphics.com/keithw@vmware.com/g
    s/michel@tungstengraphics.com/daenzer@vmware.com/g
    s/thomas-at-tungstengraphics-dot-com/thellstom-at-vmware-dot-com/
    s/zack@tungstengraphics.com/zackr@vmware.com/

    # Remove dead links
    s@Tungsten Graphics (http://www.tungstengraphics.com)@Tungsten Graphics@g

    # C string src/gallium/state_trackers/vega/api_misc.c
    s/"Tungsten Graphics, Inc"/"VMware, Inc"/

Reviewed-by: Brian Paul <brianp@vmware.com>
2014-01-17 20:00:32 +00:00
José Fonseca
27307a73e5 trace: Re-license trace.xsl under MIT license.
I was the sole author, as Tungsten Graphics employee, which was since
then acquired by VMware Inc.

Reviewed-by: Brian Paul <brianp@vmware.com>
2014-01-17 20:00:32 +00:00
Brian Paul
3618ac4f20 svga: fix crash when clearing null color buffer
Fixes regression since 9baa45f78b
but some of the piglit fbo-drawbuffers-none tests still don't
pass.

v2: use the right pointer type for 'h'

Reviewed-by: José Fonseca <jfonseca@vmware.com>
2014-01-17 08:52:37 -08:00
Brian Paul
d6fa71fbb0 llvmpipe: handle NULL color buffer pointers
Fixes regression from 9baa45f78b

v2: incorporate a few small changes suggested by Roland.

Reviewed-by: José Fonseca <jfonseca@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2014-01-17 08:52:11 -08:00
Brian Paul
7b4ceec0b7 softpipe: handle NULL color buffer pointers
Fixes regression from 9baa45f78b

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2014-01-17 08:52:11 -08:00
Roland Scheidegger
3b64714da4 llvmpipe: fix large point rasterization with point_quad_rasterization
The whole round-pointsize-to-int stuff must only be done with GL legacy
rules (no point_quad_rasterization) or all the wrong edges are lit up.
This was previously in a private branch (d3d pointsprite test complains
loudly otherwise) and got lost in a merge. However, it should certainly
apply to GL point sprite rasterization as well.

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2014-01-17 17:01:01 +01:00
Roland Scheidegger
4b9bcf31f4 gallium: add bits for clipping points as tris (d3d-style)
OpenGL does whole-point clipping, that is a large point is either fully
clipped or fully unclipped (the latter means it may extend beyond the
viewport as long as the center is inside the viewport). d3d9 (d3d10 has
no large points) however requires points to be clipped after they are
expanded to a rectangle. (Note some IHVs are known to ignore GL rules at
least with some hw/drivers.)
Hence add a rasterizer bit indicating which way points should be clipped
(some drivers probably will always ignore this), and add the draw interaction
this requires. Drivers wanting to support this and using draw must support
large points on their own as draw doesn't implement vp clipping on the
expanded points (it potentially could but the complexity doesn't seem
warranted), and the driver needs to do viewport scissoring on such points.

Conflicts:

	src/gallium/drivers/llvmpipe/lp_context.c
	src/gallium/drivers/llvmpipe/lp_state_derived.c

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2014-01-17 17:01:01 +01:00
Zack Rusin
93b953d139 llvmpipe: do constant buffer bounds checking in shaders
It's possible to bind a smaller buffer as a constant buffer, than
what the shader actually uses/requires. This could cause nasty
crashes. This patch adds the architecture to pass the maximum
allowable constant buffer index to the jit to let it make
sure that the constant buffer indices are always within bounds.
The behavior follows the d3d10 spec, which says the overflow
should always return all zeros, and overflow is only defined
as access beyond the size of the currently bound buffer. Accesses
beyond the declared shader constant register size are not
considered an overflow and expected to return garbage but consistent
garbage (we follow the behavior which some wlk tests expect which
is to return the actual values from the bound buffer).

Signed-off-by: Zack Rusin <zackr@vmware.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2014-01-16 16:33:57 -05:00
Ilia Mirkin
dd687fb8d0 nv50, nvc0: initialize ctx->sample_mask to ~0
Commit 95bf222603 (cso_context: Fix cso_context::sample_mask initial
value.) fixed the cso sample mask to be initialized to ~0. The cso code
is also careful not to needlessly call set_sample_mask, so we ended up
with the ctx->sample_mask never being set. This broke a number of
EXT_framebuffer_multisample piglit tests.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2014-01-16 19:26:05 +01:00
Aaron Watry
5ac3229f76 radeon: Move gfx/dma cs cleanup to r600_common_context_cleanup
The radeonsi code was not cleaning up either of these items leading to
leaked memory.

v2: Move cleanup to r600_common_context_cleanup instead of duplicating
    the logic for SI

CC: "10.0" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2014-01-16 10:10:04 -06:00
Chia-I Wu
fa772aa92b ilo: handle NULL renderbuffers correctly
Renderbuffers may be NULL since 9baa45f78b.
2014-01-14 16:27:57 +08:00
Chia-I Wu
7fdab3b201 ilo: disable HiZ for misaligned levels
We need to disable HiZ for non-8x4 aligned levels, except for level 0, layer
0.  For the very first layer we can adjust Width and Height fields of
3DSTATE_DEPTH_BUFFER to make it aligned.

Specifically, add ILO_TEXTURE_HIZ and set the flag only for properly aligned
levels.  ilo_texture_can_enable_hiz() is updated to check for the flag.

In tex_layout_validate(), align the depth bo to 8x4 so that we can adjust
Width/Height of 3DSTATE_DEPTH_BUFFER without introducing out-of-bound access.

Finally in rectlist blitter, add the ability to adjust 3DSTATE_DEPTH_BUFFER.
2014-01-14 15:43:20 +08:00
Chia-I Wu
18645d1533 ilo: use a helper to determine if HiZ is enabled
Add ilo_texture_can_enable_hiz and replace all checks for tex->hiz.bo by calls
to ilo_texture_can_enable_hiz().
2014-01-14 15:43:20 +08:00
Chia-I Wu
1427c3f79f ilo: decide on hiz first in texture allocation
Add tex_layout_init_hiz() before tex_layout_init_format() to decide whether
HiZ should be enabled.

On GEN6, because of layer offsetting, HiZ is enabled only when the texture is
non-mipmapped and non-array.  PIPE_USAGE_STAGING is also taken as a hint to
disable HiZ.
2014-01-14 15:43:20 +08:00
Chia-I Wu
194a61cd39 ilo: emit gen7_wa_pipe_control_wm_max_threads_stall on Haswell
Rename the workaround, as it is for 3DSTATE_PS instead of 3DSTATE_WM, and emit
it on Haswell too.

This does not fix any app, but an assertion failure.
2014-01-14 15:43:19 +08:00
Chia-I Wu
c6605c51de ilo: use HALIGN_4 on GEN7 for depth buffers
The comment was no longer true since 6642381e75.
2014-01-14 15:42:53 +08:00
Chia-I Wu
e90e3e39c2 ilo: OOM for HiZ is fatal on GEN6
On GEN6, HiZ and Separate Stencil Buffer must be enabled at the same time.
2014-01-14 15:19:41 +08:00
Chia-I Wu
5b1c516080 ilo: fix a HiZ bo leakage
Dereference the HiZ bo when the texture is destroyed.
2014-01-14 15:19:41 +08:00
Chia-I Wu
af57378e59 ilo: simplify ilo_texture_set_slice_flags()
Call ilo_texture_get_slice() for the last slice so that we can get rid of the
duplicated assert().
2014-01-14 15:19:41 +08:00
Andreas Hartmetz
aa7ae4fd6e radeonsi: Rename the commonly occurring rscreen variable.
The "r" stands for R600.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2014-01-14 00:07:14 +01:00
Andreas Hartmetz
8662e66bf2 radeonsi: Rename the commonly occurring rctx/r600 variables.
The "r" stands for R600.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2014-01-14 00:07:14 +01:00
Andreas Hartmetz
44d27ce2b2 radeonsi: Rename r600_trace_emit->si_trace_emit.
I had previously considered that unsafe.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2014-01-14 00:07:13 +01:00
Andreas Hartmetz
0b57fc15e1 radeonsi: Rename R600->SI in some remaining defines.
I had previously considered that unsafe.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2014-01-14 00:07:13 +01:00
Andreas Hartmetz
1b79764f49 radeonsi: Rename radeonsi->si remaining identifiers in si_uvd.c.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2014-01-14 00:07:13 +01:00
Andreas Hartmetz
b902298615 radeonsi: Rename r600->si remaining identifiers in si_state_draw.c.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2014-01-14 00:07:13 +01:00