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Author SHA1 Message Date
Christian König
9c353ea293 radeon/uvd: fix some MPEG4 artifacts 
Still not perfect, but a step in the right direction.

Signed-off-by: Christian König <christian.koenig@amd.com>
 2013-05-03 11:00:20 +02:00
Chia-I Wu
7346ab3b43 ilo: use u_reduced_prims_for_vertices() 
We do not need our own prim_count() anymore.
 2013-05-03 11:59:10 +08:00
Tom Stellard
156bcca62c r600g: Don't set the dest cache bits on surface sync for R600_CONTEXT_FLUSH_AND_INV 
We are already emitting a EVENT_TYPE_CACHE_FLUSH_AND_INV_EVENT packet
when this flush flag is set, so flushing the dest caches with a
SURFACE_SYNC should not be necessary.

The motivation for this change is that emitting a SURFACE_SYNC packet with
the CB bits set was causing compute shaders to hang on Cayman.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
 2013-05-02 09:00:37 -07:00
Tom Stellard
5752be0cb7 r600g/compute: Fix build error in debug code 
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
 2013-05-02 09:00:37 -07:00
Armin K
cd84353d57 radeon: Fix build with LLVM 3.3 
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
 2013-05-02 09:00:37 -07:00
Lauri Kasanen
35c5b95b94 r600/sb: Fix build failure with non-standard libdrm installation prefix 
Just like radeon/uvd, r600/sb fails to find the libdrm includes.

Signed-off-by: Lauri Kasanen <cand@gmx.com>
 2013-05-02 14:57:00 +02:00
Lauri Kasanen
e2b985dc0f radeon/uvd: Fix build failure with non-standard libdrm installation prefix 
Without this patch, radeon_uvd failed to find the libdrm includes:

In file included from radeon_uvd.c:48:
../../winsys/radeon/drm/radeon_winsys.h:44:35: error:
libdrm/radeon_surface.h: No such file or directory

Signed-off-by: Lauri Kasanen <cand@gmx.com>
 2013-05-02 14:54:03 +02:00
Christian König
163b4da874 radeon/uvd: fix quant scan order for mpeg2 
Signed-off-by: Christian König <christian.koenig@amd.com>
 2013-05-01 13:33:46 +02:00
Christian König
7d2f2a0c89 vl/buffer: use 2D_ARRAY instead of 3D textures 
Signed-off-by: Christian König <christian.koenig@amd.com>
 2013-05-01 13:33:46 +02:00
Chia-I Wu
22c5e048bd ilo: fix PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS 
On GEN7+, is->dev.has_gen7_sol_reset is required.
 2013-05-01 17:41:39 +08:00
Chia-I Wu
16f81fcf1e ilo: enable SO support on GEN7 2013-05-01 17:36:44 +08:00
Chia-I Wu
d26f70e208 ilo: reset SO write offsets for new SO targets 
When the SO targets are changed and no appending is requested, we need to send
SOL_RESET on GEN7+.
 2013-05-01 17:36:44 +08:00
Chia-I Wu
68e1f76e46 ilo: correctly program SO states for GEN7 
With the commands supported by GPE, we can finally program the states.
 2013-05-01 17:36:44 +08:00
Chia-I Wu
9557cd39e2 ilo: implement GEN7 SO GPE functions 
They were just stubs before.
 2013-05-01 17:36:09 +08:00
Chia-I Wu
9069a3b065 ilo: add gen6_pipeline_update_max_svbi() 
Move max_svbi calculation to a helper function and make it available for other
GENs.
 2013-05-01 17:35:43 +08:00
Chia-I Wu
252a21c2cc ilo: expose register indices of OUTs in ilo_shader 
pipe_stream_output_info tells us which of OUT[i] needs to be written out.
We need the info to map OUT[i] to VUE offset.
 2013-05-01 17:34:49 +08:00
Chia-I Wu
440557db4e ilo: allow one-off flags to be specified for CP 
It will be used for SOL_RESET on GEN7.
 2013-05-01 16:03:44 +08:00
Chia-I Wu
dd62e7bc02 ilo: fix tiling/size for special-purpose resources 
We do not allocate such resources yet though.
 2013-05-01 12:00:32 +08:00
Chia-I Wu
7726e9500c ilo: use UMS layout for render targets 
As we do not advertise MSAA support, this change should not make any
difference yet.
 2013-05-01 11:56:43 +08:00
Chia-I Wu
334abed828 ilo: support and prefer compact array spacing 
There is no reason to waste the memory when the HW can support compact array
spacing (ARYSPC_LOD0).
 2013-05-01 11:31:15 +08:00
Chia-I Wu
ce188bb252 ilo: move device limits to ilo_dev_info or to GPEs 
It seems a bit weird to have device limits in a context.
 2013-05-01 11:23:11 +08:00
Chia-I Wu
bef98f9c3a ilo: use ilo_dev_info in toy compiler 
We need only dev->gen, but it makes sense to expose other information to the
compiler.
 2013-05-01 11:22:57 +08:00
Chia-I Wu
51d749e7e2 ilo: use ilo_dev_info in GPE and 3D pipeline 
We need only dev->gen and dev->gt, but it makes sense to expose other
information to the pipeline.
 2013-05-01 11:22:20 +08:00
Chia-I Wu
bb1f635dcc ilo: add ilo_dev_info shared by the screen and contexts 
The struct is used to describe the device information, such as PCI ID, GEN,
GT, and etc.
 2013-05-01 11:20:41 +08:00
Chia-I Wu
355f3f7ab5 ilo: fix indentation of ilo_gpe_gen*.h 2013-05-01 11:20:32 +08:00
Vadim Girlin
fb1eed9ec5 r600g/sb: remove unused code 
Signed-off-by: Vadim Girlin <vadimgirlin@gmail.com>
 2013-04-30 21:50:48 +04:00
Vadim Girlin
3f18dd818f r600g/sb: collect shader statistics 
Collects various statistical information for each shader
and total stats for contexts.

Printed with R600_DEBUG=sb,sbstat

Signed-off-by: Vadim Girlin <vadimgirlin@gmail.com>
 2013-04-30 21:50:48 +04:00
Vadim Girlin
6ba7a162b6 r600g/sb: don't propagate dead values in GVN pass 
In some cases we use value::gvn_source field to link values that
are known to be equal before gvn pass (e.g. results of DOT4 in different
slots of the same alu group), but then source value may become dead later
and this confuses further passes.

This patch resets value::gvn_source to NULL in the dce_cleanup pass
if it points to dead value.

Fixes segfault during shader optimization with ETQW.

Signed-off-by: Vadim Girlin <vadimgirlin@gmail.com>
 2013-04-30 21:50:48 +04:00
Vadim Girlin
3e476c311f r600g/sb: use simple heuristic to limit register pressure 
It's not a complete register pressure tracking, yet it helps to prevent
register allocation problems in some cases where they were observed.

The problems are uncovered by false dependencies between fetch instructions
introduced by some recent changes in TGSI and/or default backend.
Sometimes we have code like this:

...
SAMPLE R5.xyzw, R5.xyzw
... store R5.xyzw somewhere
MOV R5.x, <next x coord>
MOV R5.y, <next y coord>
SAMPLE R5.xyzw, R5.xyzw
... <may be repeated a lot of times>

With 2D resources, z and w in SAMPLE src reg aren't used and can be simply
masked, but shader backend doesn't have this information, so it's
considered as data dependency by optimization algorithms.
 2013-04-30 21:50:48 +04:00
Vadim Girlin
6d6c8c88a3 r600g/sb: improve error checking in ra_coalesce pass 2013-04-30 21:50:47 +04:00
Vadim Girlin
188c893e65 r600g/sb: use source bytecode in case of optimization errors 2013-04-30 21:50:47 +04:00
Vadim Girlin
ad1df471d0 r600g: plug in optimizing backend 
Optimization is enabled with "R600_DEBUG=sb".

Signed-off-by: Vadim Girlin <vadimgirlin@gmail.com>
 2013-04-30 21:50:47 +04:00
Vadim Girlin
2cd7691793 r600g/sb: initial commit of the optimizing shader backend 2013-04-30 21:50:47 +04:00
Vadim Girlin
fbb065d629 r600g: use enum type for domains field in struct r600_resource 
This prevents the problems when the header is included in C++ code.
 2013-04-30 21:50:47 +04:00
Vadim Girlin
d5b30fd036 r600g: add new flags to isa instruction tables 2013-04-30 21:50:47 +04:00
Vadim Girlin
a919424215 r600g: always create reverse lookup isa tables 2013-04-30 21:50:47 +04:00
Vadim Girlin
7d555f2f4c r600g: mask unused source components for SAMPLE 
This results in more clean shader code and may improve the quality of
optimized code produced by r600-sb due to eliminated false dependencies
in some cases.

Signed-off-by: Vadim Girlin <vadimgirlin@gmail.com>
 2013-04-30 21:50:47 +04:00
Vincent Lejeune
a6a4b70e2d r600g/llvm: Fix opencl build 2013-04-30 16:38:47 +02:00
Vincent Lejeune
51e9bfdc48 r600g/llvm: get use_kill from compiler shader 2013-04-30 02:17:18 +02:00
José Fonseca
220ef8295c llvmpipe: Fix queries when screen->num_threads == 0. 
That is, when llvmpipe is run in single-threaded mode.

Trivial.

Tested with

  LP_NUM_THREADS=0 glean --run results --overwrite --quick --tests occluQry
 2013-04-29 15:40:06 +01:00
Jerome Glisse
c7a13dc5f5 r600g: force full cache for hyperz 
Seems that in some case allowing half cache usage confuse the gpu
and trigger lockup. Force full cache use.

Should fix :
https://bugs.freedesktop.org/show_bug.cgi?id=59592
https://bugs.freedesktop.org/show_bug.cgi?id=60848
https://bugs.freedesktop.org/show_bug.cgi?id=60969
https://bugs.freedesktop.org/show_bug.cgi?id=61747
https://bugs.freedesktop.org/show_bug.cgi?id=62466
https://bugs.freedesktop.org/show_bug.cgi?id=62669
https://bugs.freedesktop.org/show_bug.cgi?id=62721
https://bugs.freedesktop.org/show_bug.cgi?id=63124

Signed-off-by: Jerome Glisse <jglisse@redhat.com>
 2013-04-29 10:06:29 -04:00
Rob Clark
3900a0e4df freedreno: fix rebase screw-up 
Add back 2nd arg to emit_vertexbufs() which got lost in rebase.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
 2013-04-29 07:36:27 -04:00
Zack Rusin
3bba787879 llvmpipe: stop crashing when one of the so targets is null 
Fixes a crash when one of the so targets is null.

Signed-off-by: Zack Rusin <zackr@vmware.com>
Reviewed-by: José Fonseca <jfonseca@vmware.com>
 2013-04-27 01:19:12 -04:00
Zack Rusin
562835bcdf llvmpipe: implement so_overflow query 
Signed-off-by: Zack Rusin <zackr@vmware.com>
Reviewed-by: José Fonseca <jfonseca@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
 2013-04-26 22:58:54 -04:00
Brian Paul
ff74cf62b1 llvmpipe: replace LP_MAX_THREADS with screen->num_threads in query code 
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
 2013-04-26 16:22:24 -06:00
Brian Paul
38a751cbe8 llvmpipe: bump LP_MAX_THREADS to 16 
On the mesa-users list, Burlen Loring reported a speed-up with 16 cores
and his test/app.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
 2013-04-26 16:22:12 -06:00
Christian König
e3ac293daa r600/uvd: stop advertising MPEG4 on UVD 2.x chips v2 
That is just not supported by the hardware.

v2: fix compare

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
 2013-04-26 15:35:36 +02:00
Christian König
2c2c54b819 radeon/uvd: stop using anonymous unions 
Signed-off-by: Christian König <christian.koenig@amd.com>
 2013-04-26 15:35:36 +02:00
Chia-I Wu
5816a471af ilo: add the driver to the build system 
Add ilo to targets/egl-static and add a new target dri-ilo.  Update autoconf
and automake rules.
 2013-04-26 16:20:52 +08:00
Chia-I Wu
825aa60707 ilo: compile VS/GS/FS with the toy compiler 2013-04-26 16:20:52 +08:00