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36 commits

Author SHA1 Message Date
Antonio Ospite
ddf2aa3a4d build: avoid redefining unreachable() which is standard in C23
In the C23 standard unreachable() is now a predefined function-like
macro in <stddef.h>

See https://android.googlesource.com/platform/bionic/+/HEAD/docs/c23.md#is-now-a-predefined-function_like-macro-in

And this causes build errors when building for C23:

-----------------------------------------------------------------------
In file included from ../src/util/log.h:30,
                 from ../src/util/log.c:30:
../src/util/macros.h:123:9: warning: "unreachable" redefined
  123 | #define unreachable(str)    \
      |         ^~~~~~~~~~~
In file included from ../src/util/macros.h:31:
/usr/lib/gcc/x86_64-linux-gnu/14/include/stddef.h:456:9: note: this is the location of the previous definition
  456 | #define unreachable() (__builtin_unreachable ())
      |         ^~~~~~~~~~~
-----------------------------------------------------------------------

So don't redefine it with the same name, but use the name UNREACHABLE()
to also signify it's a macro.

Using a different name also makes sense because the behavior of the
macro was extending the one of __builtin_unreachable() anyway, and it
also had a different signature, accepting one argument, compared to the
standard unreachable() with no arguments.

This change improves the chances of building mesa with the C23 standard,
which for instance is the default in recent AOSP versions.

All the instances of the macro, including the definition, were updated
with the following command line:

  git grep -l '[^_]unreachable(' -- "src/**" | sort | uniq | \
  while read file; \
  do \
    sed -e 's/\([^_]\)unreachable(/\1UNREACHABLE(/g' -i "$file"; \
  done && \
  sed -e 's/#undef unreachable/#undef UNREACHABLE/g' -i src/intel/isl/isl_aux_info.c

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36437>
2025-07-31 17:49:42 +00:00
Emma Anholt
cd981e27f7 intel/elk: Move wpos_w setup right into nir_intrinsic_load_frag_w.
Some checks are pending
macOS-CI / macOS-CI (dri) (push) Waiting to run
macOS-CI / macOS-CI (xlib) (push) Waiting to run
Given that the intrinsic will be CSEed at the NIR level, we don't need to
preemptively set it up at the top of the shader.  No change in HSW shader-db.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25190>
2025-06-18 23:11:43 +00:00
Emma Anholt
269fbcb144 intel/elk: Use pixel_z for gl_FragCoord.z on pre-gen6.
Unless I've seriously missed something, we have the Z in the payload
(which we can always request if we need access to it and it's not already
passed to us due other WM IZ settings).

total instructions in shared programs: 4408303 -> 4408186 (<.01%)
instructions in affected programs: 1164 -> 1047 (-10.05%)
total cycles in shared programs: 142485036 -> 142484566 (<.01%)
cycles in affected programs: 26820 -> 26350 (-1.75%)

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25190>
2025-06-18 23:11:43 +00:00
Emma Anholt
dc55b47a58 intel/elk: Move pre-gen6 smooth interpolation 1/w multiply to NIR.
NIR catches that if you're just doing something like adding two smooth
inputs, we can do the multiply once on the result instead of on each
input.  BRW shader-db results:

total instructions in shared programs: 4409146 -> 4408303 (-0.02%)
instructions in affected programs: 800761 -> 799918 (-0.11%)
total cycles in shared programs: 143203198 -> 142485036 (-0.50%)
cycles in affected programs: 79081682 -> 78363520 (-0.91%)
total sends in shared programs: 363044 -> 363042 (<.01%)
sends in affected programs: 33 -> 31 (-6.06%)

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25190>
2025-06-18 23:11:42 +00:00
Emma Anholt
fb9b2261a1 intel/elk: Move pre-gen6 gl_FragCoord.w -> interpolation lowering to NIR.
BRW shader-db:
total instructions in shared programs: 4409143 -> 4409146 (<.01%)
instructions in affected programs: 330 -> 333 (0.91%)

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25190>
2025-06-18 23:11:41 +00:00
Emma Anholt
241bc5da70 intel/elk: Use the pixel_coord UW x/y values for noncoherent FB reads.
No need to force generating the float cast just to turn it back to an int.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25190>
2025-06-18 23:11:39 +00:00
Emma Anholt
1134cdc198 intel/elk: Lower load_frag_coord to load_{pixel_coord,frag_coord_z/w} in NIR.
This moves some conversions to NIR that may get eliminated, and also
distinguishes gl_FragCoord.z/w loads at the shader info level so we don't
need to flag uses_src_depth/uses_src_w when only gl_FragCoord.xy get used
(as is typical).  This reduces thread payload setup on many shaders.
Also, interestingly, blorp shaders stop reserving space for z/w despite
not putting them in the payload (since PS_EXTRA isn't filled out for z/w).

HSW shader-db is noise:

total instructions in shared programs: 9942649 -> 9942997 (<.01%)
instructions in affected programs: 143167 -> 143515 (0.24%)

total cycles in shared programs: 314768862 -> 314299112 (-0.15%)
cycles in affected programs: 62951452 -> 62481702 (-0.75%)

LOST:   44
GAINED: 26

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25190>
2025-06-18 23:11:39 +00:00
Emma Anholt
0bf114736a intel: Use the common NIR lowering for fquantize2f16.
This generates one extra instruction to set the rounding mode to RTE due
to f2f16_rtne in the lowering.  This changes the result for
fquantize2f16(65505.0) from 65536 to 65504, which fixes SPIR-V
conformance for this value:

    If Value is positive with a magnitude too large to represent as a
    16-bit floating-point value, the result is positive infinity. If Value
    is negative with a magnitude too large to represent as a 16-bit
    floating-point value, the result is negative infinity.

SPIR-V doesn't specify whether this overflow check is before or after
rounding, but IEEE specifies rounding first, which is what produces our
65504.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25552>
2025-06-18 22:45:08 +00:00
Dave Airlie
870b8717b2 Revert "hasvk/elk: stop turning load_push_constants into load_uniform"
Some checks are pending
macOS-CI / macOS-CI (dri) (push) Waiting to run
macOS-CI / macOS-CI (xlib) (push) Waiting to run
This reverts commit b036d2ded2.

This seems to break gtk4 and other stuff.

Cc: mesa-stable
(taking ack from Lionel saying we should revert)

Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35407>
2025-06-09 09:20:19 +10:00
Lionel Landwerlin
b036d2ded2 hasvk/elk: stop turning load_push_constants into load_uniform
Those intrinsics have different semantics in particular with regards
to divergence. Turning one into the other without invalidating the
divergence information breaks NIR validation. But also the conversion
means we get artificially less convergent values in the shaders.

So just handle load_push_constants in the backend and stop changing
things in Hasvk.

Fixes a bunch of tests in
   dEQP-VK.descriptor_indexing.*
   dEQP-VK.pipeline.*.push_constant.graphics_pipeline.dynamic_index_*

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34546>
2025-05-22 07:49:20 +00:00
Lionel Landwerlin
608d521086 elk: Don't apply discard_if condition opt if it can change results
Replicates the change from 57344052b6 ("intel/brw: Don't apply
discard_if condition opt if it can change results")

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 0ba9497e66 ("intel/fs: Improve discard_if code generation")
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31604>
2024-10-18 01:57:58 +00:00
Lionel Landwerlin
fbafa9cabd intel/nir: remove load_global_const_block_intel intrinsic
load_global_constant_uniform_block_intel is equivalent in terms of
loading, then for the predicate we just do a bcsel afterward in places
where that is required.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30659>
2024-08-16 11:12:39 +00:00
Alyssa Rosenzweig
5f437aa24d elk: fix compute shader derivatives
derivatives are not fs only so move to be with the rest of subgroup ops.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11674
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30634>
2024-08-13 12:19:30 +00:00
Alyssa Rosenzweig
bf9a17e2d5 elk: switch to derivative intrinsics
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30566>
2024-08-09 17:07:59 +00:00
Marek Olšák
b2d32ae246 nir: add nir_intrinsic_load_per_primitive_input, split from io_semantics flag
Instead of having 1 bit in nir_io_semantics indicating a per-primitive
FS input, add a dedicated intrinsic for it.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29895>
2024-07-23 16:13:16 +00:00
Daniel Schürmann
9b1a748b5e nir: remove nir_intrinsic_discard
The semantics of discard differ between GLSL and HLSL and
their various implementations. Subsequently, numerous application
bugs occurred and SPV_EXT_demote_to_helper_invocation was written
in order to clarify the behavior. In NIR, we now have 3 different
intrinsics for 2 things, and while demote and terminate have clear
semantics, discard still doesn't and can mean either of the two.

This patch entirely removes nir_intrinsic_discard and
nir_intrinsic_discard_if and replaces all occurences either with
nir_intrinsic_terminate{_if} or nir_intrinsic_demote{_if} in the
case that the NIR option 'discard_is_demote' is being set.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27617>
2024-06-17 19:37:16 +00:00
Georg Lehmann
dcab408a6c nir: remove unpack_half_flush_to_zero
It doesn't make sense to have two sets of opcodes for this when all backends
that support the flush_to_zero variant just rely on the global floating point
mode anyway.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29433>
2024-05-31 09:46:35 +00:00
Ian Romanick
11c6b6c102 intel/elk: Remove dsign optimization
This bit from the comment should have been a big red flag:

    There are currently zero instances of fsign(double(x))*IMM in
    shader-db or any test suite, so it is hard to care at this time.

The implementation of that path was incorrect. The XOR instructions
should be predicated like the OR instruction in the non-multiplication
path. As a result, dsign(zero_value) * x will not produce the correct
result.

Instead of fixing this code that is never exercised by anything, replace
it with the simple lowering in NIR.

Ironically, the vec4 implementation is correct. The odds of encountering
an application that is performace limited by dsign performance in vertex
processing stages on Ivy Bridge or Haswell is infinitesimal.

No shader-db changes on any Intel platform.

v2: Delete 's' in emit_fsign as it is now unused.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> [v1]
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29095>
2024-05-14 01:28:20 +00:00
Ian Romanick
0fa17962d6 intel/elk: Fix optimize_extract_to_float for i2f of unsigned extract
Fixes fs-uint-to-float-of-extract-int8.shader_test and
fs-uint-to-float-of-extract-int16.shader_test added by piglit!883.

v2: Expand the comment explaining the potential problem. Suggested by
Caio.

Fixes: e6022281f2 ("intel/elk: Rename files to use elk prefix")
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27891>
2024-05-03 15:01:43 -07:00
Karol Herbst
d22f936019 nir: remove workgroup_id_zero_base
This removes the need for drivers to handle both versions. The base will
get added once in nir_lower_system_values when converting from deref to
intrinsic and will be replaced by a zero for users not supporting it.

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26800>
2024-04-24 20:18:49 +00:00
Caio Oliveira
7a038cc097 intel/elk: Clean up unused code in elk_compiler.h
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27629>
2024-03-07 15:53:19 +00:00
Caio Oliveira
ea12b38602 intel/elk: Remove uses of intel_device_info_is_9lp()
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27629>
2024-03-07 15:53:18 +00:00
Caio Oliveira
3d867e2fc7 intel/elk: Remove coarse pixel handling
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27629>
2024-03-07 15:53:18 +00:00
Caio Oliveira
cb2d96af6a intel/elk: Remove Gfx9+ from nir conversion
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27629>
2024-03-07 15:53:18 +00:00
Caio Oliveira
a3f67c2d3a intel/elk: Remove FB_READ opcodes
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27629>
2024-03-07 15:53:18 +00:00
Caio Oliveira
77ba6f5dcd intel/elk: Remove Gfx9+ dataport messages
Note GFX9_DATAPORT_DC_PORT1_A64_SCATTERED_READ is marked as Gfx9 but
it is in the bspec and the PRM does mention it (although not in the
list), so keep it around since we've been using it for a while now.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27629>
2024-03-07 15:53:18 +00:00
Caio Oliveira
9b709e31cb intel/elk: Remove Gfx12 SFIDs and related LSC code
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27629>
2024-03-07 15:53:18 +00:00
Caio Oliveira
43b2261ab5 intel/elk: Remove SYNC opcode and SWSB annotations
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27629>
2024-03-07 15:53:18 +00:00
Caio Oliveira
e8c4104362 intel/elk: Remove IADD3 opcode
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27629>
2024-03-07 15:53:17 +00:00
Caio Oliveira
d1049408b5 intel/elk: Remove ROR and ROL opcodes
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27629>
2024-03-07 15:53:17 +00:00
Caio Oliveira
28a7265b10 intel/elk: Remove DP4A opcode
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27629>
2024-03-07 15:53:17 +00:00
Caio Oliveira
24569b8079 intel/elk: Remove DPAS opcode
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27629>
2024-03-07 15:53:17 +00:00
Caio Oliveira
77f52417c5 intel/elk: Don't include elk_eu_defines.h in elk_nir.h
Those definitions are not needed by the drivers (client code), so
reduce the exposure.  This will help when using both brw and elk in
Iris later.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27563>
2024-02-24 00:24:31 +00:00
Caio Oliveira
6648e0ebd3 intel/elk: Rename symbols
Either replace the BRW prefix with ELK or add an extra ELK prefix.  Used
the following sed script to perform the renames in this patch:

```
    # Simple prefix changes.
    s/\<BRW_/ELK_/g
    s/\<brw_/elk_/g
    s/nir_to_brw/nir_to_elk/g
    s/\<as_brw_reg\>/as_elk_reg/g
    s/\<_brw_/_elk_/g

    # Add prefix to various symbols.
    #
    # Initially I've considered using C++ namespaces here, but in various
    # cases the structs or functions had to be also visible from C code.
    # So added explicit prefix instead.
    s/\<backend_instruction/elk_\0/g
    s/\<backend_reg/elk_\0/g
    s/\<backend_shader/elk_\0/g
    s/\<bblock_t\>/elk_\0/g
    s/\<bblock_link\>/elk_\0/g
    s/\<cfg_t\>/elk_\0/g
    s/\<fs_visitor\>/elk_\0/g
    s/\<fs_reg\>/elk_\0/g
    s/\<fs_instruction_scheduler\>/elk_\0/g
    s/\<vec4_instruction_scheduler\>/elk_\0/g
    s/\<instruction_scheduler\>/elk_\0/g
    s/\<schedule_node\>/elk_\0/g
    s/\<schedule_node_child\>/elk_\0/g
    s/\<\([a-z]*_\)\?thread_payload\>/elk_\1thread_payload/g
    s/\<fs_generator\>/elk_\0/g
    s/\<fs_inst\>/elk_\0/g
    s/\<fs_reg_alloc\>/elk_\0/g
    s/\<disasm_info\>/elk_\0/g
    s/\<gfx._math\>/elk_\0/g
    s/\<gfx7_block_read_scratch\>/elk_\0/g
    s/\<gfx6_IF\>/elk_\0/g
    s/\<gfx9_fb_READ\>/elk_\0/g
    s/\<gfx6_resolve_implied_move\>/elk_\0/g

    # Opcodes.
    s/\<opcode op\>/elk_\0/g
    s/\<opcode mov_op\>/elk_\0/g
    s/\<opcode opcode\>/elk_\0/g
    s/enum opcode\>/enum elk_opcode/g
    s/static opcode\>/static elk_opcode/g
    s/\<opcode elk_op/elk_opcode elk_op/g
    s/struct opcode_desc/struct elk_opcode_desc/g
    s/NUM_BRW_OPCODES/NUM_ELK_OPCODES/g
    s/\<.._OPCODE_/ELK_\0/g
    s/\<T.._OPCODE_/ELK_\0/g
    s/\<VEC4_OPCODE_/ELK_\0/g
    s/\<VEC4_...\?_OPCODE_/ELK_\0/g
    s/\<SHADER_OPCODE_/ELK_\0/g

    # Remaining specific cases.
    s/\<wm_prog_data_barycentric_modes\>/elk_\0/g
    s/\<encode_slm_size\>/elk_\0/g
    s/\<intel_calculate_slm_size\>/elk_\0/g
    s/\<gfx6_gather_sampler_wa\>/elk_\0/g
    s/\<is_3src\>/elk_\0/g
    s/\<WA_/ELK_\0/g
    s/\<conditional_modifier\>/elk_\0/g
    s/\<pred_ctrl_align16\>/elk_\0/g
    s/\<shuffle_from_32bit_read\>/elk_\0/g
    s/\<shuffle_src_to_dst\>/elk_\0/g
    s/\<setup_imm_..\?\>/elk_\0/g

    s/\<opt_predicated_break\>/elk_\0/g
    s/\<has_bank_conflict\>/elk_\0/g
    s/\<dead_control_flow_eliminate\>/elk_\0/g

    s/\<disasm_new_inst_group\>/elk_\0/g
    s/\<disasm_initialize\>/elk_\0/g
    s/\<dump_assembly\>/elk_\0/g
    s/\<disasm_insert_error\>/elk_\0/g
    s/\<disasm_annotate\>/elk_\0/g

    s/\<enum lsc_opcode\>/enum elk_lsc_opcode/g
    s/\<lsc_opcode_/elk_lsc_opcode_/g
    s/\<lsc_aop_[a-z_]\+\>/elk_\0/g

    s/\<type_size_vec4\>/elk_\0/g
    s/\<type_size_dvec4\>/elk_\0/g
    s/\<type_size_xvec4\>/elk_\0/g
    s/\<type_size_[a-z4]\+_bytes\>/elk_\0/g

    s/\<gfx12_systolic_depth\>/elk_\0/g
```

Acked-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27563>
2024-02-24 00:24:31 +00:00
Caio Oliveira
f677485ad4 intel/elk: Rename C++ namespace
Acked-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27563>
2024-02-24 00:24:31 +00:00
Caio Oliveira
e6022281f2 intel/elk: Rename files to use elk prefix
Acked-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27563>
2024-02-24 00:24:31 +00:00
Renamed from src/intel/compiler/elk/brw_fs_nir.cpp (Browse further)