Commit graph

73755 commits

Author SHA1 Message Date
Matt Turner
9e17c36b8b i965: Extract can_change_source_types() functions.
Make them members of fs_inst/vec4_instruction for use elsewhere.

Also fix the fs version to check that dst.type == src[1].type and for
!saturate.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-10-19 10:19:32 -07:00
Jason Ekstrand
41c474df53 i965/vs: Move URB entry_size and read_length calculations to compile_vs
Reviewed-By: Eduardo Lima Mitev <elima@igalia.com>
2015-10-19 08:47:03 -07:00
Jason Ekstrand
6980372010 i965: Move the entire compiler API into a single file
At this point, the compiler API has been substantially simplified.  In the
spirit of Kristian's making a compiler library, this commit makes a single
header file that contains, more-or-less, the entire compiler API.

There's still a bit of cleanup to do particularly in the area of geometry
shaders.  However, this gets us much closer to having a separate compiler.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2015-10-19 08:47:03 -07:00
Jason Ekstrand
4467344c82 i965: Rename brw_foo_emit to brw_compile_foo
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2015-10-19 08:47:03 -07:00
Jason Ekstrand
67db9072b9 i965/fs: Move some of the prog_data setup into brw_wm_emit
This commit moves the common/modern stuff.  Some legacy stuff such as
setting use_alt_mode was left because it needs to know whether or not we're
an ARB program.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2015-10-19 08:47:03 -07:00
Jason Ekstrand
4e711872d0 i965/cs: Rework cs_emit to take a nir_shader and a brw_compiler
This commit removes all dependence on GL state by getting rid of the
brw_context parameter and the GL data structures.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2015-10-19 08:47:03 -07:00
Jason Ekstrand
657863bb5c i965/gs: Rework gs_emit to take a nir_shader and a brw_compiler
This commit removes all dependence on GL state by getting rid of the
brw_context parameter and the GL data structures.  Unfortunately, we still
have to pass in the gl_shader_program for gen6 because it's needed for
transform feedback.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2015-10-19 08:47:03 -07:00
Jason Ekstrand
5d8bf6de61 i965/vs: Rework vs_emit to take a nir_shader and a brw_compiler
This commit removes all dependence on GL state by getting rid of the
brw_context parameter and the GL data structures.

v2 (Jason Ekstrand):
   - Patch use_legacy_snorm_formula through as a function argument rather
     than trying to go through the shader key.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2015-10-19 08:47:03 -07:00
Jason Ekstrand
22ad44910e i965/fs: Rework wm_fs_emit to take a nir_shader and a brw_compiler
This commit removes all dependence on GL state by getting rid of the
brw_context parameter and the GL data structures.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2015-10-19 08:47:03 -07:00
Jason Ekstrand
0ca401327e i965: Use a const nir_shader in backend_shader
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2015-10-19 08:47:03 -07:00
Jason Ekstrand
8f1d968704 i965/vec4: Remove gl_program and gl_shader_program from the generator
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2015-10-19 08:47:03 -07:00
Jason Ekstrand
5e86f5b3d2 i965/fs: Remove the gl_program from the generator
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2015-10-19 08:47:03 -07:00
Jason Ekstrand
688d2e4585 nir/info: Add a few bits of info for fragment shaders
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2015-10-19 08:47:03 -07:00
Jason Ekstrand
4889c73dd1 nir/info: Add compute shader local size to nir_shader_info
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2015-10-19 08:47:03 -07:00
Jason Ekstrand
fe399f3a69 nir/info: Move the GS info into a stage-specific info union
This way we can have other stage-specific info without consuming too much
extra space.  While we're at it, we make sure that the geometry info is
only set if we're actually a goemetry shader.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2015-10-19 08:47:03 -07:00
Jason Ekstrand
16619477bc mesa: Move gl_frag_depth_layout from mtypes.h to shader_enums.h
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2015-10-19 08:47:03 -07:00
Jason Ekstrand
5d4bc5ec13 nir: Add a label to nir_shader_info
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2015-10-19 08:45:14 -07:00
Jason Ekstrand
e00314bc57 i965/asm: Explicitly use a nir_instr for IR annotations
Now that everything goes through NIR, we don't need this to be a void
pointer anymore.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2015-10-19 08:45:14 -07:00
Jose Fonseca
b23a4859f4 scons: Build nir/glsl_types.cpp once.
Undoes early hacks, and ensures nir/glsl_types.cpp is built once, and
only once.

The root problem is that SCons doesn't know about NIR nor any source
file in the NIR_FILES source list.

Tested with libgl-gdi and libgl-xlib scons targets.

Reviewed-by: Brian Paul <brianp@vmware.com>
2015-10-19 15:59:59 +01:00
Brian Paul
530eb39c71 svga: fix incorrect round-down arithmetic
Spotted by Roland.  Luckily, this code should never really be hit
since the const buffer size and offset should already be multiples
of 16.  I could probably add more assertions to that effect, but
let's just fix the arithmetic for now.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2015-10-19 08:54:42 -06:00
Samuel Iglesias Gonsalvez
6f3954618b glsl: fix segfault when indirect indexing a buffer variable which is an array
Fixes a regression added by bb5aeb8549.

Signed-off-by: Samuel Iglesias Gonsalvez <siglesias@igalia.com>
Reviewed-by: Timothy Arceri <t_arceri@yahoo.com.au>
2015-10-19 11:16:50 +02:00
Indrajit Das
b0a44f1017 st/va: Added support for NV12 to IYUV conversion in vlVaGetImage
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-10-19 09:47:33 +02:00
Indrajit Das
381c17d695 st/va: Used correct parameter to derive the value of the "h" variable in vlVaCreateImage
Cc: "11.0" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-10-19 09:47:24 +02:00
Iago Toral Quiroga
36c93e9659 glsl_to_tgsi: Use {Num}UniformBlocks instead of {Num}BufferInterfaceBlocks
The latter holds both UBOs and SSBOs, but here we only want UBOs.

Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2015-10-19 08:20:40 +02:00
Iago Toral Quiroga
5a9ff87d0f st/mesa: Use {Num}UniformBlocks instead of {Num}BufferInterfaceBlocks
The latter holds both UBOs and SSBOs, but here we only want UBOs.

Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2015-10-19 08:20:40 +02:00
Iago Toral Quiroga
55403665b6 i965: Do not use NumBufferInterfaceBlocks
This is the only place in the driver where we use this. Since we now work
with separate index spaces, always use NumUniformBlocks and
NumShaderStorageBlocks instead of NumBufferInterfaceBlocks to be more
consistent with the rest of the code.

Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2015-10-19 08:20:40 +02:00
Iago Toral Quiroga
14c3db7bc5 main: GL_ACTIVE_UNIFORM_BLOCK_MAX_NAME_LENGTH is about UBOS, not SSBOs
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2015-10-19 08:20:40 +02:00
Iago Toral Quiroga
fba582efc7 main: Use NumUniformBlocks to count UBOs
Now that we have separate index spaces for UBOs and SSBOs we do not need
to iterate through BufferInterfaceBlocks any more, we can just take the
UBO count directly from NumUniformBlocks.

Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2015-10-19 08:20:40 +02:00
Chia-I Wu
86ccb2a16f ilo: set VME for 3DSTATE_PS
When the bit is not set, we can see sampling artifacts on triangle edges when
the mip filter is not GEN6_MIPFILTER_NONE.
2015-10-18 21:35:16 +08:00
Chia-I Wu
d04126a773 ilo: ignore prefer_linear_threshold when zero
This was the intended behavior but it did not work as intended until now.
2015-10-18 21:04:52 +08:00
Chia-I Wu
a445e0f7ef ilo: remove some unused kernel params 2015-10-18 21:04:52 +08:00
Chia-I Wu
6e132f4730 ilo: remove unused ilo_shader_get_type() 2015-10-18 21:04:52 +08:00
Chia-I Wu
29a0f7479d ilo: remove u_debug.h inclusion from ilo_core.h
Move it to ilo_debug.h.
2015-10-18 21:04:52 +08:00
Chia-I Wu
3fe568e2a4 ilo: remove u_memory.h inclusion from ilo_core.h
We do not make allocations generally in the core.
2015-10-18 21:04:52 +08:00
Samuel Pitoiset
fc5ae0c13f nvc0: do not bind input params at compute state init on Fermi
It looks like binding a constant buffer on compute overwrites the 3D
state. To avoid that, we already re-bind all the 3D constant buffers
after launching a compute grid but this is not enough.

Binding the constant buffer of input parameters for the compute state at
initialization corrupts the 3D constant buffers, and it's just useless
to bind it because this is not needed until we really launch a grid.

This fixes some piglit regressions related to interpolation tests
introduced in "nvc0: enable compute support by default on Fermi".

Fixes: 00d6186 (nvc0: enable compute support by default on Fermi)

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-10-18 14:25:05 +02:00
Kenneth Graunke
ca2b807ca3 i965/vs: Drop hack that created NIR for fixed function vertex programs.
Marek made core Mesa call ProgramStringNotify(), which solves this
properly.  The hack is no longer needed.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-10-17 17:26:11 -07:00
Kenneth Graunke
dbac0a6352 i965/nir: Switch on shader stage in nir_lower_outputs().
VS, GS, and FS continue doing the same thing they did before.  We can
simplify the FS code a bit because it is always scalar.

Compute shaders now assert that there are no outputs instead of doing
a loop over 0 outputs.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-10-17 17:26:11 -07:00
Marek Olšák
7c10af6425 radeonsi: don't use the AMDGPU intrinsic for CMP
No difference according to shader-db.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
2015-10-17 21:40:04 +02:00
Marek Olšák
f2cdb68c8b radeonsi: use LRP from gallivm
Totals:
SGPRS: 344552 -> 344368 (-0.05 %)
VGPRS: 197132 -> 197552 (0.21 %)
Code Size: 7375376 -> 7366304 (-0.12 %) bytes
LDS: 91 -> 91 (0.00 %) blocks
Scratch: 1679360 -> 1615872 (-3.78 %) bytes per wave

Totals from affected shaders:
SGPRS: 47736 -> 47552 (-0.39 %)
VGPRS: 27952 -> 28372 (1.50 %)
Code Size: 1392724 -> 1383652 (-0.65 %) bytes
LDS: 39 -> 39 (0.00 %) blocks
Scratch: 513024 -> 449536 (-12.38 %) bytes per wave

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-10-17 21:40:04 +02:00
Marek Olšák
eb11efc989 radeonsi: don't emit AMDGPU intrinsics for integer abs, min, max
No difference according to shader-db. (with the new S_ABS_I32 pattern)

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
2015-10-17 21:40:04 +02:00
Marek Olšák
d72a26ec5d radeonsi: don't emit AMDGPU intrinsics for EX2, ROUND, TRUNC
No difference according to shader-db.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
2015-10-17 21:40:04 +02:00
Marek Olšák
6660ca7121 radeonsi: initialize output, temp, and address registers to "undef"
This removes "v_mov v0, 0" which typically occurs before exports.

Totals:
SGPRS: 345216 -> 344552 (-0.19 %)
VGPRS: 197684 -> 197132 (-0.28 %)
Code Size: 7390408 -> 7375376 (-0.20 %) bytes
LDS: 91 -> 91 (0.00 %) blocks
Scratch: 1842176 -> 1679360 (-8.84 %) bytes per wave

Totals from affected shaders:
SGPRS: 101336 -> 100672 (-0.66 %)
VGPRS: 53920 -> 53368 (-1.02 %)
Code Size: 2170176 -> 2155144 (-0.69 %) bytes
LDS: 2 -> 2 (0.00 %) blocks
Scratch: 1015808 -> 852992 (-16.03 %) bytes per wave

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
2015-10-17 21:40:03 +02:00
Marek Olšák
529c5e7740 gallivm: implement the correct version of LRP
The previous version has precision issues. This can be a problem
with tessellation. Sadly, I can't find the article where I read it
anymore. I'm not sure if the unsafe-fp-math flag would be enough to revert
this.

v2: added the comment
2015-10-17 21:40:03 +02:00
Marek Olšák
a2197cac7f gallivm: set correct opcode info from unary/binary/ternary emits
and clear the emit_data structure.

The new radeonsi min/max opcode implementation requires this.

(it looks good according to Roland S.)
2015-10-17 21:40:03 +02:00
Marek Olšák
5bc871a4ca radeonsi: implement vertex color clamping
This is only supported in the compatibility profile (without GS and tess).

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-10-17 21:40:03 +02:00
Marek Olšák
208d1ed38d radeonsi: implement fragment color clamping
using the shader key for now.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-10-17 21:40:03 +02:00
Marek Olšák
acc6a07874 radeonsi: clean up other scratch buffer functions
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-10-17 21:40:03 +02:00
Marek Olšák
9098d7e9bd radeonsi: clean up copy-pasted scratch buffer updates
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-10-17 21:40:03 +02:00
Marek Olšák
938a1bee34 radeonsi: unify shader create functions
The shader specifies the processor type, so use that instead.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-10-17 21:40:03 +02:00
Marek Olšák
b0167809f1 radeonsi: unify shader delete functions
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-10-17 21:40:03 +02:00