Commit graph

182048 commits

Author SHA1 Message Date
Daniel Stone
400694c7c6 ci: Disable trace jobs using old Wine
The radv-raven and lavapipe trace jobs were using Wine installed from
Debian. lavapipe had a single post-merge trace running, and raven had
all but one trace disabled due to being flaky.

b2c is using Proton instead, and it makes absolutely no sense to have
two parallel versions of Wine installed. These should be brought back at
some point running on the same version of Wine as the newer b2c jobs.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31595>
2024-10-16 22:52:44 +00:00
Job Noorman
dd6ac7055f ir3: optimize subgroup shuffles using shfl
One quirk of the shfl instruction is that it only works with dynamically
uniform indices. This commit adds a pass to lower shuffles to the
ir3-specific ones using a loop that iterates all distinct indices one by
one. This is based on the blob's sequence.

Signed-off-by: Job Noorman <jnoorman@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31501>
2024-10-16 22:05:10 +00:00
Job Noorman
0919d0f694 ir3: add helper to get glsl type for nir_def
Signed-off-by: Job Noorman <jnoorman@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31501>
2024-10-16 22:05:10 +00:00
Job Noorman
575c89a73c ir3: add codegen for shuffle_{xor,up,down}_uniform_ir3
Signed-off-by: Job Noorman <jnoorman@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31501>
2024-10-16 22:05:10 +00:00
Job Noorman
4556b18f51 nir: add shuffle_{xor,up,down}_uniform_ir3 intrinsics
These are like shuffle_{xor,up,down} except they expect a dynamically
uniform index. This is necessary since the ir3 shfl instruction does not
work with a divergent index.

Signed-off-by: Job Noorman <jnoorman@igalia.com>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31501>
2024-10-16 22:05:10 +00:00
Eric Engestrom
9f58d0b0e7 nvk/ci: document more flakes seen
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31691>
2024-10-16 20:40:18 +00:00
Eric Engestrom
6c88251167 zink+radv/ci: document more flakes seen
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31691>
2024-10-16 20:40:18 +00:00
Eric Engestrom
f53deeda9d zink+nvk/ci: document more flakes seen
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31691>
2024-10-16 20:40:18 +00:00
Eric Engestrom
078cbfb076 zink+nvk/ci: document regression
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31691>
2024-10-16 20:40:18 +00:00
Eric Engestrom
01285a1da4 ci: drop spec@egl_ext_surface_compression@create from the rest of the expected fails
Fixes: 68aa78a858 ("Uprev Piglit to 7ce69da1199d12ed0ddaa251ed489750523798fb")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31691>
2024-10-16 20:40:18 +00:00
Dylan Baker
bf3b1d8ea9 anv: when handling descriptor sets, layout cannot be NULL if dynamic_offets are used
We have no cases where we intentionally pass a NULL layout when dynamic
offsets, and doing so would cause a null dereference. Le't asd an assert
for that.

CID: 1620447
Fixes: f39cd30f4f ("anv: Track all the descriptor sets")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31638>
2024-10-16 19:54:07 +00:00
Dylan Baker
0714fbff8f anv: assert that we don't read off the end color_att array
Coverity notices that we've insured that index index is < MAX_RTS in one
case, but that it must be greater in one case. Since `color_att_count`
is a uint32_t, it can easily exceed MAX_RTS (8), and would thus create
an out-of-bounds read situation. While the type system would allow this,
the actually implementation shouldn't, so an assert should make Coverity
happy and help us check our assumption.

CID: 1620440
Fixes: d2f7b6d5a7 ("anv: implement VK_KHR_dynamic_rendering_local_read")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31640>
2024-10-16 19:09:25 +00:00
Samuel Pitoiset
17dc91709d radv: use radv_normalize_blend_factor() more
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31688>
2024-10-16 18:24:22 +00:00
Samuel Pitoiset
38e12dd53c radv: optimize breaking batch when CB_TARGET_MASK change
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31688>
2024-10-16 18:24:22 +00:00
Chia-I Wu
7f4f20c811 panvk: advertise VK_KHR_external_{fence,semaphore}_fd
Remove panvk_GetPhysicalDeviceExternal{Fence,Semaphore}Properties and
let vk_common_GetPhysicalDeviceExternal{Fence,Semaphore}Properties
handle them.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31647>
2024-10-16 16:48:09 +00:00
Samuel Pitoiset
fc52c6358c radv: stop recomputing the viewport xform for guarband/viewport
It's already computed when viewports are bound.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31680>
2024-10-16 16:10:12 +00:00
Chia-I Wu
da80d7dc86 panvk: advertise VK_EXT_external_memory_dma_buf
It is already supported.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31649>
2024-10-16 15:19:25 +00:00
Chia-I Wu
a78b7d3c52 panvk: advertise VK_KHR_external_memory_fd
It is already supported.

Also remove an outdated TODO because pan_kmod_bo_import supports
reference counting.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31649>
2024-10-16 15:19:25 +00:00
Chia-I Wu
21f6ec9e8e panvk: remove panvk_GetPhysicalDeviceImageFormatProperties
Let vk_common_GetPhysicalDeviceImageFormatProperties handle it.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31649>
2024-10-16 15:19:25 +00:00
Chia-I Wu
95db0250e6 panvk: fill in VkExternalImageFormatProperties
Opaque fds are internally dma-bufs.  We also support both export and
import.  But for dma-bufs, we additonally require the image tiling
allows vkGetImageSubresourceLayout for export and
VkImageDrmFormatModifierExplicitCreateInfoEXT for import.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31649>
2024-10-16 15:19:25 +00:00
Chia-I Wu
75f833ca82 panvk: fill in VkExternalBufferProperties
Opaque fds are internally dma-bufs.  We also support both export and
import.

Fixes: 17b81d1fdc ("panvk: expose KHR_external_memory and KHR_external_memory_capabilities")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31649>
2024-10-16 15:19:25 +00:00
Valentine Burley
50a9d1b987 vulkan/format: Update vk_format_from_pipe_format with additional formats
This has been neglected.

Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Signed-off-by: Valentine Burley <valentine.burley@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30821>
2024-10-16 14:30:16 +00:00
Valentine Burley
aa01a8c018 vulkan/format: Properly translate 10-bit and 12-bit formats
Some hardware have native 10-bit and 12-bit formats. In order to be able to support these, we need
to translate these VK_FORMATs to new padded pipe formats instead of regular 16-bit formats.

Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Signed-off-by: Valentine Burley <valentine.burley@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30821>
2024-10-16 14:30:16 +00:00
Valentine Burley
af338d2d2e tu: Fix incorrect bpcs value for padded formats
This doesn't make a difference for now as we don't expose any padded formats yet,
but will be needed for VK_FORMAT_G10X6_B10X6R10X6_2PLANE_420_UNORM_3PACK16.

Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Signed-off-by: Valentine Burley <valentine.burley@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30821>
2024-10-16 14:30:15 +00:00
Valentine Burley
c8a8543af7 vulkan: Fix incorrect bpcs value for padded formats
Skip padding channels and only consider valid color channels.
Add and use a common helper for this.

Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Signed-off-by: Valentine Burley <valentine.burley@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30821>
2024-10-16 14:30:15 +00:00
Valentine Burley
9eb315ff98 hk: Remap 10 and 12 bit formats to 16 bit formats
Preserves the previous behavior while handling the new formats.

Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Signed-off-by: Valentine Burley <valentine.burley@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30821>
2024-10-16 14:30:15 +00:00
Valentine Burley
a33538cb9f nvk: Remap 10 and 12 bit formats to 16 bit formats
Preserves the previous behavior while handling the new formats.

Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Signed-off-by: Valentine Burley <valentine.burley@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30821>
2024-10-16 14:30:15 +00:00
Valentine Burley
ab298b9c3a lavapipe: Remap 10 and 12 bit formats to 16 bit formats
Preserves the previous behavior while handling the new formats.

Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Signed-off-by: Valentine Burley <valentine.burley@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30821>
2024-10-16 14:30:15 +00:00
Konstantin Seurer
0098f8ef35 radv: Remap 10 and 12 bit formats to 16 bit formats
Preserves the previous behavior while handling the new formats.

Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30821>
2024-10-16 14:30:15 +00:00
Valentine Burley
81ebd6ea8d util/format: Add new 12-bit P012 RGB/planar formats
Introduce three 12-bit formats: X4R12_UNORM, X4R12X4G12_UNORM, and X4G12_X4B12X4R12_420_UNORM.
These formats allocate 12 bits for each color channel with 4 bits of padding to align with Vulkan's P012
and related planar formats.

Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Signed-off-by: Valentine Burley <valentine.burley@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30821>
2024-10-16 14:30:15 +00:00
Valentine Burley
1134ad8799 util/format: Add new 10-bit P010 RGB/planar formats
Introduce three 10-bit formats: X6R10_UNORM, X6R10X6G10_UNORM, and X6G10_X6B10X6R10_420_UNORM.
These formats allocate 10 bits for each color channel with 6 bits of padding to align with Vulkan's P010
and related planar formats.

Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Signed-off-by: Valentine Burley <valentine.burley@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30821>
2024-10-16 14:30:15 +00:00
Boris Brezillon
ad13268c72 panvk: Fix the ZStencil descriptor initialization in the preload logic
We're not expected to write stencil/depth if the preload draw is reloading
color attachments.

Fixes: 0bc3502ca3 ("panvk: Implement a custom FB preload logic")
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31678>
2024-10-16 13:20:56 +00:00
Boris Brezillon
2806ff022d panvk: Set .is_blit=true when compiling preload shaders
Preload shaders are blit shaders.

Fixes: 0bc3502ca3 ("panvk: Implement a custom FB preload logic")
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31678>
2024-10-16 13:20:56 +00:00
Boris Brezillon
9f099ca6e0 pan/util: Discard depth/stencil writes when early fragment test is forced
Writing depth/stencil when update/kill is set to force-early seems to
trip out Valhall GPUs. Since depth/stencil writes are supposed to be
ignored in that case anyway, drop them from shader.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31678>
2024-10-16 13:20:56 +00:00
Christian Gmeiner
8dc8fa88ed etnaviv: nir: Switch to derivative intrinsics
Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31034>
2024-10-16 12:32:07 +00:00
Christian Gmeiner
5a15b36a64 etnaviv: nir: Enforce stricter swizzle for virtual scalar x register
This change enforces stricter swizzle behavior for the virtual scalar x
register, addressing a regression encountered in piglit's
spec@glsl-1.10@execution@derivatives@glsl-derivs-abs-sign test.
The regression occurred after switching to derivative intrinsics.

CC: mesa-stable
Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31034>
2024-10-16 12:32:07 +00:00
Danylo Piliaiev
7b09fc98fb nir/opt_16b_tex_image: Sign extension should matter for texel buffer txf
Texel buffer could be arbitrary large, so the assumption being made in
the following comment is wrong:

 "Zero-extension (u16) and sign-extension (i16) have
  the same behavior here - txf returns 0 if bit 15 is set
  because it's out of bounds and the higher bits don't matter."

Sign extension should matter for GLSL_SAMPLER_DIM_BUF.

This fixes the case of doing texelFetch with u16 offset:

  uniform itextureBuffer s1;
  uint16_t offset = some_ssbo.offset;
  value = texelFetch(s1, offset).x;

If the offset is higher than s16 optimization incorrectly
left it as 16b.

In spirv the above glsl is translated into:

  %22 = OpLoad %ushort %21
  %23 = OpUConvert %uint %22
  %24 = OpBitcast %int %23
  %26 = OpImageFetch %v4int %16 %24

Cc: mesa-stable

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31664>
2024-10-16 10:10:00 +00:00
Benjamin Lee
49e9cd5211 panvk: don't dirty preloaded tiles for writeback
Tiles that are only touched by the preload shader don't need to be
written back, because their contents will be the same. The comment
suggests that this was the original intent, and that the value of
clean_fragment_write was just swapped by accident.

Signed-off-by: Benjamin Lee <benjamin.lee@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31652>
2024-10-16 07:00:29 +00:00
Timothy Arceri
aa7c59e02c nir/glsl: set deref cast mode for blocks during function inlining
More cast fixes this time for UBO and SSBO. Which were missing testing
previously.

Fixes: d681cf96fb ("nir/glsl: set deref cast mode during function inlining")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11587

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31668>
2024-10-16 06:25:57 +00:00
Leder, Brendan Steve
bd6f3e30f2 amd/vpelib: Fix output_ctx gamma curve cache bug
[Why]
Reprogramming gamma curve unnecessary and wastes power/time.

[How]
Bool array checked instead of bool inside said array, add index.

[Testing]
Tested with corresponding test cases.

Reviewed-by: Roy Chan <Roy.Chan@amd.com>
Reviewed-by: Krunoslav Kovac <Krunoslav.Kovac@amd.com>
Acked-by: Chih-Wei Chien <Chih-Wei.Chien@amd.com>
Signed-off-by: Brendan Leder <breleder@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31605>
2024-10-16 02:30:17 +00:00
Jude Shih
259b44d97b amd/vpelib: Restructure CDC FE/BE
[Why]
CDC has two separate functionalities : backend and frontend.
split them into two for better resource management.

Reviewed-by: Roy Chan <Roy.Chan@amd.com>
Acked-by: Chih-Wei Chien <Chih-Wei.Chien@amd.com>
Signed-off-by: Jude Shih <shenshih@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31605>
2024-10-16 02:30:17 +00:00
Roy Chan
0d7f51724b amd/vpelib: Add documentation
Reviewed-by: Navid Assadian <navid.assadian@amd.com>
Acked-by: Chih-Wei Chien <Chih-Wei.Chien@amd.com>
Signed-off-by: Roy Chan <roy.chan@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31605>
2024-10-16 02:30:17 +00:00
Brendan
5826ef5e44 amd/vpelib: Visual confirm on input
[Why]
The gap pointer should advance if it is used.
Not a functional bug fix but a nice-to-have change.

[How]
Advancing the pointer once the memory is used

Reviewed-by: Jesse Agate <Jesse.Agate@amd.com>
Acked-by: Chih-Wei Chien <Chih-Wei.Chien@amd.com>
Signed-off-by: Brendan <brendanSteve.leder@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31605>
2024-10-16 02:30:17 +00:00
Assadian, Navid
a0d2f074cd amd/vpelib: Add mirror & rotation capability check function for vpe1.1
Reviewed-by: Roy Chan <Roy.Chan@amd.com>
Acked-by: Chih-Wei Chien <Chih-Wei.Chien@amd.com>
Signed-off-by: Navid Assadian <navid.assadian@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31605>
2024-10-16 02:30:16 +00:00
Brendan
af01d7a181 amd/vpelib: Update configs to be per-pipe specific
[Why]
config settings should be per pipe in concept

[How]
update the framework to store configs per pipe

Reviewed-by: Roy Chan <Roy.Chan@amd.com>
Acked-by: Chih-Wei Chien <Chih-Wei.Chien@amd.com>
Signed-off-by: Brendan <brendanSteve.leder@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31605>
2024-10-16 02:30:16 +00:00
Assadian, Navid
6a68af7d21 amd/vpelib: Add better rotation and mirror capability check
Add a general rotation and mirror support check support.

Reviewed-by: Roy Chan <Roy.Chan@amd.com>
Acked-by: Chih-Wei Chien <Chih-Wei.Chien@amd.com>
Signed-off-by: Navid Assadian <navid.assadian@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31605>
2024-10-16 02:30:16 +00:00
Evan
3ef8e6a6ae amd/vpelib: Luma AND Color Keyer Full Support
[New]
- Added new vpe_stream params for color keying
- Added new struct in dpp to capture keying params
- Added new capability for color keying
- Added keying support in vpe1.0

[Updated]
- Updated capability check
- Updated Luma and Color Keying functions to better implement the entire feature
- Updated resource to map stream params -> dpp keyer param

Reviewed-by: Roy Chan <Roy.Chan@amd.com>
Acked-by: Chih-Wei Chien <Chih-Wei.Chien@amd.com>
Signed-off-by: Evan <evan.damphousse@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31605>
2024-10-16 02:30:16 +00:00
Assadian, Navid
338760d9b5 amd/vpelib: Document public API structures
Doxygen style inline comments are added to the public API functions and
structures.

Reviewed-by: Roy Chan <Roy.Chan@amd.com>
Acked-by: Chih-Wei Chien <Chih-Wei.Chien@amd.com>
Signed-off-by: Navid Assadian <navid.assadian@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31605>
2024-10-16 02:30:16 +00:00
Brendan
ded1a2b3f0 amd/vpelib: Multiple instance support in caching framework
Generalize the caching to work with multiple instances of objects.
Change some static functions to public functions to maximize function
re-use possibilities.

Reviewed-by: Roy Chan <Roy.Chan@amd.com>
Acked-by: Chih-Wei Chien <Chih-Wei.Chien@amd.com>
Signed-off-by: Brendan <brendanSteve.leder@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31605>
2024-10-16 02:30:16 +00:00
Evan
7a293a812a amd/vpelib: Color Keyer Implementation
[New] - New color keyer function. Take input from VPE_STREAM and FORMAT, program - Added color keyer call in Front end - Hard code Alpha Keyer Range to be entire range - Added vpe_is_yuv() to determine if input format is any YUV format. Combines existing functions - Set Per-pixel Alpha in vpelib when stream.enable_luma_key=1

[Updated]
- Updated the macros to include the luma_key field
- Updated vpe10 and resource calls to have mathching function calls
- removed unused data structure for keying mode since hard code keyer mode to 0x3 in real world
- Updated Luma Key enum to properly represent reg spec

[Removed]
- Removed unused alpha keyer struct. Opted to take in directly from stream_ctx

Reviewed-by: Brendan Steve Leder <brendanSteve.leder@amd.com>
Acked-by: Chih-Wei Chien <Chih-Wei.Chien@amd.com>
Signed-off-by: Evan <evan.damphousse@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31605>
2024-10-16 02:30:16 +00:00