Previously, meta would pass null shaders in for the VS when it intended to
disable the VS. However, this meant that we didn't know what inputs we had
and would dead-code things in the FS. In order to solve this, we
hard-coded a number. Now meta passes in a VS even if it plans to disable
the stage so this is no longer needed.
Don't validate the baseArrayLayer and layerCount of cube images. This
allows us to remove a bloated lookup table and an unneeded struct
definition (anv_image_view_info).
Similar to anv_cmd_buffer_push_constants, but handles the compute
pipeline, which requires different setup from the other stages.
This also handles initializing the compute shader local IDs.
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Replace
anv_image_create_info::force_tiling
anv_image_create_info::tiling
with the bitmask
anv_image_create_info::isl_tiling_flags
This allows us to drop the function
anv_image.c:choose_isl_tiling_flags().
Fixes assertion in vkCreateImage when VkFormat is combined depthstencil.
Fixed many vulkancts tests that use combined depthstencil. For example,
fixes dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.compare_ops.\
not_equal_less_or_equal_not_equal_greater.
We're required to expose a host-visible, coherent memory type. On big
core GPUs that share, LLC, we can expose one such memory type that's
also cached. However, on non-LLC GPUs we can't both be cached and
coherent. Thus, we expose both the required coherent type and the cached
but non-coherent combination.
Regular objects are created I915_CACHING_CACHED on LLC platforms and
I915_CACHING_NONE on non-LLC platforms. However, userptr objects are
always created as I915_CACHING_CACHED, which on non-LLC means
snooped. That can be useful but comes with a bit of overheard. Since
we're eplicitly clflushing and don't want the overhead we need to turn
it off.
Pre-Skylake, RENDER_SUFFACE_STATE.SurfaceVerticalAlignment is in units
of surface samples. A surface sample is equivalent to a pixel in all
surfaces except interleaved multisample surfaces.
In Skylake, it is in units of surface elements. A surface element is
equivalent to a surface sample except for compressed formats, in which
case the element is a compression block.
In anv_image_create(), stop asserting that VkImageCreateInfo::extent
does not exceed the hardware limits for the given SURFTYPE. The
assertions were incorrect because they did not take into account the
hardware gen. Anyways, these types of assertions belong in isl, not
anvil.
Remove the surface layout calculations in anv_image_make_surface(). Let
isl_surf_init() do the heavy lifting.
Fixes 8 Crucible tests and regresses none. (hw=Broadwell and
crucible@33d91ec).
This is a big code push. The patch is about 3000 lines.
Function isl_surf_init() calculates the physical layout of a surface.
The implementation is "complete" (but untested) for all 1D, 2D, 3D, and
cube surfaces for gen4 through gen9, except:
* gen9 1D surfaces
* gen9 Ys multisampled surfaces
* auxiliary surfaces (such as hiz, mcs, ccs)
Rename legacy Y tiling from ISL_TILING_Y to ISL_TILING_Y0 in order to
clearly distinguish it from Yf and Ys. Using ISL_TILING_Y to denote
legacy Y tiling would lead to confusion with i965, because i965 uses
I195_TILE_Y to denote *any* Y tiling.
This allows us to filter based on preprocessor directives. We could build
a partial preprocessor into the generator, but we would likely get it
wrong. This allows us to filter out, for instance, windows-specific WSI
stuff.
