Commit graph

4326 commits

Author SHA1 Message Date
Samuel Pitoiset
0cfeb93751 radv: add support for more HTILE clear codes
The HTILE clear code is now computed based on the floating point value.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10035>
2021-07-02 13:23:32 +02:00
Samuel Pitoiset
764960e16d radv: advertise VK_EXT_color_write_enable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11530>
2021-07-02 10:02:02 +00:00
Samuel Pitoiset
9a95aba377 radv: implement VK_EXT_color_write_enable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11530>
2021-07-02 10:02:02 +00:00
Samuel Pitoiset
28e1b02a6f radv: disable DCC for DOOM 2016 and Wolfenstein II
Both games perform two image layout transitions with the same image
in the same pipeline barrier with UNDEFINED and this re-initializes
DCC to the uncompressed state. No ideal solution sadly. Note that
both games declare all images as CONCURRENT.

This fixes rendering issues on GFX10+ because DCC for stores is
supported and this implicitly enables DCC for concurrent.

Fixes: da166f648f ("radv: enable DCC for concurrent images on GFX10")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4927
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4607
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11656>
2021-07-01 11:09:22 +00:00
Rhys Perry
ed123a03be radv: enable VK_KHR_shader_subgroup_uniform_control_flow
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11626>
2021-07-01 10:01:52 +00:00
Mike Blumenkrantz
c0397a42ce radv: pre-calc vertex buffer descriptor size on pipeline object
util_bitcount has a nonzero cost, and calling it like this in a hotpath
generates unnecessary overhead

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11525>
2021-06-30 13:42:42 +00:00
Samuel Pitoiset
2019014df9 radv: fix fd leak in vkAcquireImageANDROID()
Copied from ANV.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4915
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11518>
2021-06-30 08:14:03 +02:00
Samuel Pitoiset
4a031a01ba radv: fix RADV_FORCE_VRS for 2x1 and 1x2
The rates were inverted.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11578>
2021-06-29 12:47:49 +02:00
Ishi Tatsuyuki
4f959e368c radv: ignore redundant variable descriptor counts (v2)
The Vulkan specification says: "If VkDescriptorSetAllocateInfo::pSetLayouts[i]
does not include a variable count descriptor binding, then
pDescriptorCounts[i] is ignored". The previous code triggered an assertion
in such cases, and this patch fixes it.

v2: removed the offending assertion that is now always satisfied and
    reworded the commit message with a reference to Vulkan spec.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4992
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11576>
2021-06-29 09:29:40 +00:00
Matt Turner
ed77bf3c4e ci: Unify on MESA_VK_IGNORE_CONFORMANCE_WARNING
Move and rename warn_non_conformant_implementation() to common location
of src/vulkan/util/vk_util.c as vk_warn_non_conformant_implementation().

In freedreno/ci,  move MESA_VK_IGNORE_CONFORMANCE_WARNING to common
location of .baremetal-deqp-test-freedreno-vk.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11563>
2021-06-25 19:45:38 +00:00
Simon Zeni
2fe2eb1911 radv: Implement VK_EXT_acquire_drm_display
Signed-off-by: Simon Zeni <simon@bl4ckb0ne.ca>
Reviewed-by: Simon Ser <contact@emersion.fr>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11014>
2021-06-24 15:48:38 +00:00
Samuel Pitoiset
8c968b8301 radv: advertise extendedDynamicState2LogicOp
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10880>
2021-06-22 15:32:31 +00:00
Samuel Pitoiset
8efa897168 radv: implement dynamic logic op
This is part of VK_EXT_extended_dynamic_state2.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10880>
2021-06-22 15:32:31 +00:00
Timur Kristóf
25314996d0 radv/llvm: Emit s_barrier at the beginning of NGG non-GS shaders.
This is to fix a hang that can potentially happen when not every
wave had launched when a gs_alloc_req is executed.

Cc: mesa-stable
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10837>
2021-06-22 14:32:27 +00:00
Simon Ser
7aaa54feb5 radv: implement VK_EXT_physical_device_drm
This adds support for the Vulkan extension introduced in [1]. The
extension allows to get a VkPhysicalDevice's DRM node device IDs.

[1]: https://github.com/KhronosGroup/Vulkan-Docs/pull/1356

Signed-off-by: Simon Ser <contact@emersion.fr>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8390>
2021-06-22 13:18:18 +00:00
Charlie Turner
e9991d5ff1 radv: Provide a toggle to avoid warnings about unsupported devices.
In the CI, we have such devices, and this message is printed many
hundreds of times. This results in a useless spam which makes it
difficult to see real issues.

v2 from Martin:
 - Reword the commit message a bit
 - Add a SoB

Signed-off-by: Martin Peres <martin.peres@mupuf.org>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Acked-by: Andres Gomez <agomez@igalia.com>
Acked-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11491>
2021-06-22 13:59:43 +03:00
Rhys Perry
1e508777b4 radv: allow VK_FORMAT_R8G8_SRGB sampling
No reason why we can't do this. AMDVLK also allows this.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11317>
2021-06-21 18:17:09 +00:00
Rhys Perry
ea68d4a676 nir/propagate_invariant: add invariant_prim option
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11035>
2021-06-21 15:13:05 +00:00
Bas Nieuwenhuizen
a99474fae5 radv: Add -Wpointer-arith.
Gives earlier indications of MSVC issues.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11478>
2021-06-21 09:32:00 +00:00
Bas Nieuwenhuizen
82de184c3a radv: Enable VK_KHR_acceleration_structure with RADV_PERFTEST=rt.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11078>
2021-06-18 22:16:27 +00:00
Bas Nieuwenhuizen
c27e3a6248 radv: Add rt perftest flag.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11078>
2021-06-18 22:16:27 +00:00
Bas Nieuwenhuizen
438cb7f9a3 radv: Expose formats for acceleration structure.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11078>
2021-06-18 22:16:27 +00:00
Bas Nieuwenhuizen
9920eadf83 radv: Implement load_vulkan_descriptor for acceleration structures.
It always uses nir_address_format_64bit_global.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11078>
2021-06-18 22:16:27 +00:00
Bas Nieuwenhuizen
85e39cb325 radv: Convert lower_intrinsics to a switch statement
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11078>
2021-06-18 22:16:27 +00:00
Bas Nieuwenhuizen
a4b3ce5d56 radv: Add acceleration structure descriptor set support.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11078>
2021-06-18 22:16:27 +00:00
Bas Nieuwenhuizen
0dad88b469 radv: Implement device-side BVH building.
Same naive algorithm as the host build.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11078>
2021-06-18 22:16:27 +00:00
Bas Nieuwenhuizen
d51a4b4c4b radv: Add initial CPU BVH building.
The algorithm used for the BVH:

1) first create 1 leaf per primitive (triangle/aabb/instance)
2) Then create internal layers from the bottom up until we are left with
   1 node in the top layer. Node i in the layer will have children
   (i*4+0) ... (i*4+3) in the previous layer.

This results in a very naive algorithm but it is also very simple to implement.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11078>
2021-06-18 22:16:27 +00:00
Bas Nieuwenhuizen
67e949a8f8 radv: Use the global BO list for acceleration structures.
We have nested structures so tracking this from the descriptor
set is going to be a mess.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11078>
2021-06-18 22:16:27 +00:00
Samuel Pitoiset
977355c6e5 radv: fix dynamic culling and depth/stencil related dynamic states
To avoid overwriting previous dynamic state with default state from
the pipeline.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4926
Cc: 21.1 mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11375>
2021-06-18 16:27:57 +00:00
Mike Blumenkrantz
651c6b16ff radv: move pipe_misaligned and l2_coherent image checks to flags set on init
this should save 4-5% cpu in some cases

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11462>
2021-06-18 16:02:26 +00:00
Samuel Pitoiset
60348360a2 radv: create only one pipeline for decompressing depth/stencil images
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11263>
2021-06-18 14:15:30 +02:00
Samuel Pitoiset
213c4c5f44 radv: always decompress both aspects of a depth/stencil image
If compressed rendering is only used for the depth aspect of a
depth/stencil image, stencil might also be compressed and it needs
to be decompressed. This only happens for non-TC compatible images.

As long as the driver needs to decompress the depth aspect, I don't
think that decompressing the stencil aspect introduces extra cost.

Fixes dEQP-VK.renderpass*late_fragment_tests*.d32_sfloat_s8_uint for
chips that don't support TC-compat HTILE.

Cc: 21.1 mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11263>
2021-06-18 14:15:30 +02:00
Samuel Pitoiset
50233d0daa radv: reject binding buffer/image when the device memory is too small
From the Vulkan spec 1.2.181:
    "The difference of the size of memory and memoryOffset must be
     greater than or equal to the size member of the
     VkMemoryRequirements structure returned from a call to
     vkGetImageMemoryRequirements with the same image"

This is invalid usage but adding a check in the driver is safe and
might avoid spurious failures.

This is a workaround for the inventory GPU hang with Cyberpunk 2077
which is actually a game bug. Luckily the game handles this error
gracefully.

Since the addrlib change from March, addrlib now selects a better
swizzle mode (4KB instead of 64KB) which reduces image size. Though,
the game assumes that an image with 2 mips is always smaller than the
same image but with 6 mips. This is not always true if the swizzle mode
is different. Then, it creates a D312 heap that is too small for the 2
mips image and the GPU hang with a memory violation, ugh...

Note that next vkd3d-proton release should also reject this but
fixing both sides is fine.

Cc: 21.1 mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4823
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4593
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11448>
2021-06-18 08:04:29 +00:00
Yiwei Zhang
ec1968dcc9 radv: fix build errors after commit 8b7ff784
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Reviewed-by: Roman Stratiienko <r.stratiienko@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11373>
2021-06-16 19:55:48 +00:00
Samuel Pitoiset
16d5939ff5 radv: fix dynamic rasterizer discard enable state
If a pipeline enables rasterizerDiscardEnable statically we have to
properly initialize the value, otherwise it won't be updated when a
new pipeline is bound.

Fixes few dEQP-VK.pipeline.extended_dynamic_state.*disable_raster.

Fixes: dd19bf9d7d ("radv: implement dynamic rasterizer discard enable")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11242>
2021-06-14 16:31:14 +00:00
Samuel Pitoiset
44e7057304 radv/winsys: remove useless errno.h includes
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11269>
2021-06-14 15:52:48 +02:00
Samuel Pitoiset
ec7f7a7e33 radv/winsys: adjust some error messages
Report the return code from libdrm instead of errno. While we are at it,
fix the function name in radv_amdgpu_wait_timeline_syncobj().

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11269>
2021-06-14 15:52:45 +02:00
Bas Nieuwenhuizen
720ee494e5 radv: Allow DCC images to be compressed with foreign queues.
Otherwise we would always decompress when transitioning to the
foreign queue.

Fixes: 8b9033ad0a ("radv: Support DCC modifiers fully.")
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10802>
2021-06-14 11:20:59 +00:00
Bas Nieuwenhuizen
f44a6c6a54 radv: Actually return correct value for read-only DCC compressedness.
Most stuff that depends on the value wouldn't be triggered anyway but
...

Fixes: b5ecf0748a ("radv: Ensure we never decompress or FCE read-only textures.")
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10802>
2021-06-14 11:20:59 +00:00
Bas Nieuwenhuizen
f7c622307d radv: Don't skip barriers that only change queues.
We depend on the queue mask for some decisions ...

CC: mesa-stable
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10802>
2021-06-14 11:20:59 +00:00
Rhys Perry
91f8f82806 radv,aco: use all attributes in a binding to obtain an alignment for fetch
Instead of assuming scalar alignment for an attribute, we can use the
required alignment of other attributes in a binding to expect a higher
one.

This uses the alignment of all attributes in the pipeline, not just the
ones loaded. This can create slightly better code, but could break
pipelines which relied on unused (and unaligned) attributes no being
loaded. I don't think such pipelines are allowed by the spec.

fossil-db (Sienna Cichlid):
Totals from 44350 (30.32% of 146267) affected shaders:
VGPRs: 1694464 -> 1700616 (+0.36%); split: -0.08%, +0.44%
CodeSize: 60207184 -> 58093836 (-3.51%); split: -3.51%, +0.00%
MaxWaves: 1175998 -> 1174948 (-0.09%); split: +0.02%, -0.11%
Instrs: 11763444 -> 11458952 (-2.59%); split: -2.60%, +0.01%
Latency: 70679612 -> 67062215 (-5.12%); split: -5.27%, +0.15%
InvThroughput: 11482495 -> 11362911 (-1.04%); split: -1.20%, +0.16%
VClause: 359459 -> 343248 (-4.51%); split: -6.36%, +1.85%
SClause: 422404 -> 419229 (-0.75%); split: -1.17%, +0.42%
Copies: 754384 -> 764368 (+1.32%); split: -1.74%, +3.06%
Branches: 197472 -> 197474 (+0.00%); split: -0.03%, +0.03%
PreVGPRs: 1215348 -> 1215503 (+0.01%)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9007>
2021-06-14 09:48:32 +00:00
Samuel Pitoiset
4026a07e74 radv: fix aligning the image offset by using align64()
This doesn't fix anything known. Found by inspection.

Cc: 21.1 mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11302>
2021-06-11 07:35:32 +02:00
Rhys Perry
6204e17b44 radv: increase maxComputeSharedMemorySize
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11262>
2021-06-10 12:55:53 +00:00
Samuel Pitoiset
cfe7e81214 radv/winsys: add a small comment explaining the CHAIN bit
Without it the hardware launches an IB2 which might hang in some
rare situations.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11214>
2021-06-10 08:31:11 +02:00
Samuel Pitoiset
a234840e60 radv: do not launch an IB2 for secondary cmdbuf with INDIRECT_MULTI on GFX7
It's illegal to emit DRAW_{INDEX}_INDIRECT_MULTI from an IB2 on GFX7.

PAL applies this workaround for indirect dispatches and also on
GFX8-9 but it doesn't seem needed.

This fixes various GPU hangs on Bonaire (GFX7).

Cc: 21.1 mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11214>
2021-06-10 08:31:08 +02:00
Rhys Perry
d2b9c7e982 radv: improve LDS alignment check for load/store vectorization
Previously, this could vectorize two scalar 16-bit loads into a u8vec4
load.

No fossil-db changes.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11113>
2021-06-09 12:06:50 +00:00
Samuel Pitoiset
13efad3086 radv: dump SPIR-V instead of using spirv-dis when generating a hang report
Useful when spirv-dis isn't found.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11034>
2021-06-09 10:07:17 +00:00
Georg Lehmann
3149eccc1c radv: Implement VK_EXT_global_priority_query.
Signed-off-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11215>
2021-06-09 08:25:25 +00:00
Caio Marcelo de Oliveira Filho
8af6766062 nir: Move workgroup_size and workgroup_variable_size into common shader_info
Move it out the "cs" sub-struct, since these will be used for other
shader stages in the future.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11225>
2021-06-08 09:23:55 -07:00
Caio Marcelo de Oliveira Filho
b5f6fc442c nir: Move zero_initialize_shared_memory into common shader_info
Move it out the "cs" sub-struct, since the bit will be used for other
shader stages in the future.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11225>
2021-06-08 09:23:55 -07:00