Commit graph

168685 commits

Author SHA1 Message Date
Alyssa Rosenzweig
0cdd82a892 pan/bi: Split out early preprocessing from late
To prepare for the new compile flow, where this will be called by the driver
instead of internally in the compiler.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20906>
2023-03-23 23:53:46 +00:00
Alyssa Rosenzweig
924f68fe4b pan/mdg: Only lower once
Nothing in the optimization loop should remat the lowered instructions, so
there's no need to do it inside the loop.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Italo Nicola <italonicola@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20906>
2023-03-23 23:53:46 +00:00
Alyssa Rosenzweig
02f570e33d pan/bi: Only lower once
Nothing in the optimization loop should remat the lowered instructions, so
there's no need to do it inside the loop.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20906>
2023-03-23 23:53:46 +00:00
Alyssa Rosenzweig
c333c0ea57 panfrost: Remove unused inputs.nr_cbufs
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20906>
2023-03-23 23:53:46 +00:00
Alyssa Rosenzweig
da0815fb9b panfrost: Remove inputs->blend.rt
This sideband input is now unused, as the information is available locally
within the NIR as it should be.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20906>
2023-03-23 23:53:45 +00:00
Alyssa Rosenzweig
edf24f1887 pan/mdg: Use I/O semantics for MRT blend stores
This avoids the silly reliance on the sideband.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Italo Nicola <italonicola@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20906>
2023-03-23 23:53:45 +00:00
Alyssa Rosenzweig
f2b56c8dd8 pan/bi: Remove bi_load_sysval
It is unused and should stay unused, as any use is a violation of Ekstrand's
rule.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20906>
2023-03-23 23:53:45 +00:00
Alyssa Rosenzweig
91ffd10351 pan/bi: Lower gl_VertexID in NIR
This gets rid of the hidden gl_BaseVertex system value which violates Ekstrand's
rule.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20906>
2023-03-23 23:53:45 +00:00
Alyssa Rosenzweig
540d556a8f pan/bi: Allow specializing bifrost_nir_options by arch
We need different settings for Bifrost and Valhall. Keeping everything static
simplifies lifetimes.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20906>
2023-03-23 23:53:45 +00:00
Alyssa Rosenzweig
8db30010dc pan/bi: Lower load_output to make sysval explicit
See previous commits for justification. Later, we'll split up NIR processing in
a few steps to give the caller a chance to lower the sysval, at which point the
goofy inputs here will go away.

v2: Only lower in fragment shaders. Likely harmless to run elsewhere but still
wrong because the location enum is defined per-stage.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> [v1]
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20906>
2023-03-23 23:53:45 +00:00
Alyssa Rosenzweig
5c9ffaad8f pan/bi: Lower sample mask writes in NIR
This uses the new NIR sysvals to avoid materializing magic sysvals in the
driver, getting us closer to the Ekstrand Rule.

v2: Only lower for fragment shaders. Lowering in vertex shaders should be a
no-op, except that FRAG_RESULT_SAMPLE_MASK shadows a VARYING_SLOT for fog
coords, causing v1 of this patch to regress fog. Caught by the G52 piglit job in
CI. Thank you, Marge.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> [v1]
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20906>
2023-03-23 23:53:45 +00:00
Alyssa Rosenzweig
6f3a761e81 pan/bi: Don't duplicate texture op cases
These two switches are redundant.

Furthermore, bi_tex_op could previously assume its input was a supported texop,
so it returned undefined values for unsupported texops. Now, without the guard
in front of it, bi_tex_op should check for supported texops, so we need to drop
the unsupported texops from the switch.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20906>
2023-03-23 23:53:45 +00:00
Alyssa Rosenzweig
f247f57f52 panfrost: Use 0/~0 boolean for MSAA sysval
For consistency with NIR.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20906>
2023-03-23 23:53:45 +00:00
Alyssa Rosenzweig
47ed0b41be nir: Add Mali load_output taking converison
Mali's LD_TILE instruction (mapping to NIR's load_output) requires a "conversion
descriptor" specifying how to convert from the register foramt to the tilebuffer
format. To implement framebuffer fetch on OpenGL without shader variants, we
generate these descriptors in the driver and pass them in a uniform. However, to
comply with the Ekstrand Rule, we can't have magically materialized system
values -- they should come only from the NIR where the driver can lower as it
pleases (e.g. PanVK can lower to a constant because it knows the framebuffer
format at pipeline create time). Add intrinsics to model this.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20906>
2023-03-23 23:53:45 +00:00
Alyssa Rosenzweig
60bfc4deb9 nir: Add Panfrost intrinsics to lower sample mask
We want to lower this in NIR instead of the backend IR to give the driver a
chance to lower the "is multisampled?" system value, which makes more sense to
do in NIR. This gets rid of one of the magic compiler materialized sysvals.

Plus, this will let us constant fold away the lowering in Vulkan when we know
that the pipeline is single-sampled / multi-sampled.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20906>
2023-03-23 23:53:45 +00:00
Mark Janes
8eceff48cd intel/dev: use GFX_VERx10 to detect genX compilation
Depending on the ordering of includes, GFX_VER may not defined for
intel_device_info.h.  The failure mode of this case is silent:
BITSET_TEST will be called when it could be compiled out.

GFX_VERx10 should be used in place of GFX_VER.  GFX_VERx10 is defined
by a compiler flag, and is always present for genX compilation units.

Fixes: 3c9a8f7a6d ("intel/dev: generate helpers to identify platform workarounds")
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21908>
2023-03-23 23:23:52 +00:00
Mark Janes
8c78dd6320 intel/dev: fix macro naming convention in gen_wa_helpers.py
intel_device_info.h tests macros in the form `INTEL_WA_{id}_GFX_VER`.
gen_wa_helpers.py produced macros in the form `INTEL_GFX_VER_WA_{id}`

Change the generated code to follow intel_device_info.h

Fixes: 3c9a8f7a6d ("intel/dev: generate helpers to identify platform workarounds")
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21908>
2023-03-23 23:23:52 +00:00
Mark Janes
52c71cf959 intel/dev: fix macro string concatenation for INTEL_WA_{id}_GFX_VER
`INTEL_WA_##id_GFX_VER` evaluates to `INTEL_WA_id_GFX_VER`
instead of numbered identifiers like `INTEL_WA_220579888_GFX_VER`.

Fixes: 3c9a8f7a6d ("intel/dev: generate helpers to identify platform workarounds")
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21908>
2023-03-23 23:23:52 +00:00
Jesse Natalie
4d48fc6fe5 dzn: Use mesa_loge for DXIL validation errors
This allows them to be printed to OutputDebugString

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21913>
2023-03-23 21:48:44 +00:00
Jesse Natalie
7750e23c7f dzn: Enable variable size bindings
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21913>
2023-03-23 21:48:44 +00:00
Jesse Natalie
19818ecc37 dzn: Support descriptor indexing via bindless
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21913>
2023-03-23 21:48:44 +00:00
Jesse Natalie
c93dda6bee dzn: Add a debug option for enabling bindless mode
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21913>
2023-03-23 21:48:44 +00:00
Jesse Natalie
ebc8a86df1 dzn: Apply bindless lowering when compiling pipelines
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21913>
2023-03-23 21:48:44 +00:00
Jesse Natalie
35a789dbb7 dzn: Only bind descriptor sets up to the used amount of the current layout
Prevents setting a root SRV into a slot that's not declared as an SRV
in the root signature if a set is bound into a higher slot from a previous
draw/dispatch op.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21913>
2023-03-23 21:48:44 +00:00
Jesse Natalie
a227ef2983 dzn: Ensure root signatures are re-bound after a meta op
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21913>
2023-03-23 21:48:44 +00:00
Jesse Natalie
7edff267cc dzn: When binding a bindless root signature, bind descriptor heaps first
The D3D spec says it must be so, and not doing this causes problems
on some hardware.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21913>
2023-03-23 21:48:44 +00:00
Jesse Natalie
8d52a480fe dzn: Add a binding classification in the pipeline layout remapping
This is needed so that we can handle two special cases:
* Dynamic buffer data is allocated out of a command-buffer-owned buffer,
  rather than a descriptor-set-owned buffer, so the remapping puts them
  in their own register space.
* Static samplers should be left alone and not converted to bindless.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21913>
2023-03-23 21:48:44 +00:00
Jesse Natalie
8bd5fbf8ed dzn: Bind buffers for bindless descriptor sets
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21913>
2023-03-23 21:48:44 +00:00
Jesse Natalie
5f61e66024 dzn: Use separate dirty bits for descriptor sets/dynamic buffers
We'll be able to take advantage of this granularity in bindless mode

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21913>
2023-03-23 21:48:44 +00:00
Jesse Natalie
1846426195 dzn: Don't dirty bindings if root signature doesn't change
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21913>
2023-03-23 21:48:44 +00:00
Jesse Natalie
5d2b4ee4f4 dzn: Allocate descriptor sets in buffers for bindless mode
Modify the root signature stored in the pipeline layout too.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21913>
2023-03-23 21:48:44 +00:00
Jesse Natalie
a1881bc7ee dzn: Delete unused function
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21913>
2023-03-23 21:48:44 +00:00
Jesse Natalie
ac0b0731ea dzn: Remove defragmenting of descriptor pools
Rather than trying to perfectly defrag, let's just allow re-use.
When a set is allocated for the first time, it locks in its range of
the heap that it'll use. If the last set in the heap is used, then
those descriptors go back to being free, but if a set in the middle
of the heap is freed, those descriptors remain assigned to that set.
A later allocation attempt can reclaim them, as long as the new set
fits.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21913>
2023-03-23 21:48:44 +00:00
Jesse Natalie
079f3deafb dzn: When bindless, only allocate one descriptor per layout entry
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21913>
2023-03-23 21:48:44 +00:00
Jesse Natalie
4c4431b674 dzn: Add initial bindless infrastructure
When operating in "bindless" mode, the device will own 2 descriptor
heaps, one for views, and one for samplers. Every time a view is
created (image view, buffer view), a slot is allocated for it out
of the device view heap for each usage type (sampled vs storage).

Then, in a future change, descriptor sets will just contain view/
sampler indices instead of actual descriptors. Instead of copying
these to a cmdbuf-owned descriptor heap, we can directly bind the
descriptor set as a buffer. We'll also modify shaders to perform
an indirection and index into the device heap.

Buffers also get views set up on creation. In a perfect world, we
could just put addresses/sizes in the descriptor set, but DXIL
doesn't support loading from addresses, we need descriptors. When
robust buffer access is disabled *or* descriptor set buffer views
reference the remainder of the buffer, we can just re-use a view
from the buffer and use an offset.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21913>
2023-03-23 21:48:44 +00:00
Jesse Natalie
f977c10f3c dzn: Skip setting up UAVs for depth resources
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21913>
2023-03-23 21:48:44 +00:00
Jesse Natalie
60b3637e76 dzn: Set up SRV descs for 3D textures correctly
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21913>
2023-03-23 21:48:44 +00:00
Jesse Natalie
0bf1a43601 dzn: Don't use plane slice 1 for depth+stencil SRVs
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21913>
2023-03-23 21:48:44 +00:00
Jesse Natalie
442d456b28 dzn: Consistently order depth formats before stencil
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21913>
2023-03-23 21:48:43 +00:00
Jesse Natalie
4c5100f94a dzn: Put UAVs first for storage images/buffers in descriptor tables
When running in a bindless mode, we won't ever be using SRVs for these.
Change terminology for determining descriptor offsets from "writable"
to "alt" to match naming already used elsewhere.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21913>
2023-03-23 21:48:43 +00:00
Jesse Natalie
8887852d20 dzn: Add some docs around descriptor sets and remove redundant/unused data
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21913>
2023-03-23 21:48:43 +00:00
Jesse Natalie
492d61cfbb dzn: Fix a leak in descriptor set layout creation
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21913>
2023-03-23 21:48:43 +00:00
Jesse Natalie
3f2e13eaf8 dzn: Remove descriptor heap type from descriptor heap wrapper
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21913>
2023-03-23 21:48:43 +00:00
Jesse Natalie
599abf5b1a dzn: Remove device pointers from descriptor heaps
A future change is going to add descriptor heaps *to* the dzn_device,
and having 3x ID3D12Device pointers in a single object just seems
wrong. All of the callers already had a device, so just pass it
along where needed.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21913>
2023-03-23 21:48:43 +00:00
Jesse Natalie
79ef6e4e8f spirv2dxil: Support descriptor indexing capabilities
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21913>
2023-03-23 21:48:43 +00:00
Jesse Natalie
e0a090adfd spirv2dxil: Only lower readonly images to SRVs when the option is set
This handles the case where readonly is explicitly marked in the shader,
rather than just inferred based on opt_access.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21913>
2023-03-23 21:48:43 +00:00
Jesse Natalie
b125575f95 spirv2dxil: Add a pass to lower deref tex/image and vulkan ubo/ssbo to bindless
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21913>
2023-03-23 21:48:43 +00:00
Jesse Natalie
4f31d1a7e0 microsoft/compiler: Update header docs for binding modes supported by compiler
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21913>
2023-03-23 21:48:43 +00:00
Jesse Natalie
4fc7d2480a microsoft/compiler: Use store_dest instead of store_dest_value more
The 16bit SSBO load support missed setting the 16bit shader flag.
Make it harder to miss that by only using store_dest_value for things
that don't have a type.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21913>
2023-03-23 21:48:43 +00:00
Jesse Natalie
ce004e6391 microsoft/compiler: Support descriptor heap indexing for UBO/SSBO
Treat load_vulkan_descriptor on an input that didn't come from
vulkan_resource_index as a descriptor heap index instead of a
binding index.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21913>
2023-03-23 21:48:43 +00:00