Fixes KHR-GL46.multi_bind.dispatch_bind_image_textures which decides
max_image_samples==1 means that MSAA image load/store is supported.
Switch the condition to > 0, which matches what zink does.
Fixes: e277b13182 ("freedreno: Stop exposing MSAA image load/store on desktop GL.")
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31857>
For instance, this issue is triggered on redeonsi with
"piglit/bin/shader_runner tests/spec/glsl-1.50/linker/interface-blocks-multiple-vs-member-count-mismatch.shader_test -auto -fbo":
Indirect leak of 176 byte(s) in 1 object(s) allocated from:
#0 0x7f894b5cd7ef in __interceptor_malloc (/usr/lib64/libasan.so.6+0xb17ef)
#1 0x7f894183aebf in ralloc_size ../src/util/ralloc.c:118
#2 0x7f894183b36e in rzalloc_size ../src/util/ralloc.c:152
#3 0x7f894183b36e in rzalloc_array_size ../src/util/ralloc.c:232
#4 0x7f894182da67 in _mesa_hash_table_init ../src/util/hash_table.c:163
#5 0x7f894182da67 in _mesa_hash_table_create ../src/util/hash_table.c:186
#6 0x7f894169af03 in gl_nir_validate_intrastage_interface_blocks ../src/compiler/glsl/gl_nir_link_interface_blocks.c:533
#7 0x7f89414464a4 in link_intrastage_shaders ../src/compiler/glsl/gl_nir_linker.c:2750
#8 0x7f894144bad2 in gl_nir_link_glsl ../src/compiler/glsl/gl_nir_linker.c:3785
#9 0x7f894128977e in st_link_glsl_to_nir ../src/mesa/state_tracker/st_glsl_to_nir.cpp:515
#10 0x7f894128977e in st_link_shader ../src/mesa/state_tracker/st_glsl_to_nir.cpp:1008
#11 0x7f894113c7b5 in link_program ../src/mesa/main/shaderapi.c:1317
#12 0x7f894113c7b5 in link_program_error ../src/mesa/main/shaderapi.c:1426
#13 0x7f8940afb1bb in _mesa_unmarshal_LinkProgram src/mapi/glapi/gen/marshal_generated2.c:1627
#14 0x7f894063319b in glthread_unmarshal_batch ../src/mesa/main/glthread.c:141
#15 0x7f894184e658 in util_queue_thread_func ../src/util/u_queue.c:294
#16 0x7f89418d220a in impl_thrd_routine ../src/c11/impl/threads_posix.c:67
#17 0x7f894a66a7c3 (/lib64/libc.so.6+0x867c3)
...
SUMMARY: AddressSanitizer: 1392 byte(s) leaked in 11 allocation(s).
Fixes: ffbd763586 ("glsl: add gl_nir_validate_intrastage_interface_blocks()")
Signed-off-by: Patrick Lerda <patrick9876@free.fr>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31871>
intel_device_info_update_after_hwconfig() updates max_cs_threads
based on max_eus_per_subslice and num_thread_per_eu but in some
platforms simulator the hwconfig don't have the
INTEL_HWCONFIG_MAX_NUM_EU_PER_DSS value, causing max_cs_threads to
be set to a wrong value and then causing issues when programing
CFE_STATE with a invalid value.
Fortunately we can also get max_eus_per_subslice from topology query,
so here moving the hwconfig query and
intel_device_info_update_after_hwconfig() call to after topology.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31850>
CRCs don't become valid if the GPU omits pushing clean tiles to memory.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Louis-Francis Ratté-Boulianne <lfrb@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31771>
CRC values are prefetched in 32x32 regions so we need to round up
the framebuffer size to account for that.
Signed-off-by: Louis-Francis Ratté-Boulianne <lfrb@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31771>
This shouldn't affect current behavior as CRC values are only used
when using a resource as render target and it's impossible to render
to a AFBC-P texture. However, it now properly updates the
CRC-related properties for debugging and future usage.
Signed-off-by: Louis-Francis Ratté-Boulianne <lfrb@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31771>
Only the slices' size was correctly set. Also, disable packing for
array resources as it's not currently implemented.
Signed-off-by: Louis-Francis Ratté-Boulianne <lfrb@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31771>
When the tiler heap is exhausted while running an IDVS job, the
out-of-memory exception handler is gonna be executed. If that
happens, we start fragment shading for all the polygons that have
been generated until then and recycle the tiler heap memory to
continue the tiling job.
The framebuffer descriptor used for the fragment job depends on the
current pass:
- FIRST_PASS: Used the first time the OOM handler is called. We
want to preload/clear just like configured for the draw but
don't want to discard the result.
- MIDDLE_PASS: Used the subsequent times the OOM handler is
called. We want to preload the content rendered from previous
rendering passes and still don't want to discard the result.
- LAST_PASS: Used for the fragment job run when back in normal
operation. We want to preload the content from the rendering
passes that occurred in the OOM handler and want to deal with
the result just like it was configured initially for the draw.
If incremental rendering is not triggered by an OOM exception, the
fragment job is using the default framebuffer descriptor.
Signed-off-by: Louis-Francis Ratté-Boulianne <lfrb@collabora.com>
Signed-off-by: antonino <antonino.maniscalco@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31174>
For now, the flag enables these checks for CSF-based GPUs:
- registers are not used as a source after being loaded without a
WAIT() in the middle
- registers are not reused (used as a destination) after they
served as a STORE() source without a WAIT() in the middle
Signed-off-by: Louis-Francis Ratté-Boulianne <lfrb@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31174>
When using CSF backend, we might want to create multiple versions of
the framebuffer descriptor to support incremental rendering.
Signed-off-by: Louis-Francis Ratté-Boulianne <lfrb@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31174>
It's gonna be used to save and restore registers content when an
exception handler is executed as to not interfere with normal
operation.
Signed-off-by: Louis-Francis Ratté-Boulianne <lfrb@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31174>
It is only needed for pending `if` block as it's the only block
we don't end normally and where instructions are only flushed when
we are certain that no `else` branch is gonna be added.
It also collide with scenarios where we want to add a preamble
before inserting a block.
Signed-off-by: Louis-Francis Ratté-Boulianne <lfrb@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31174>
There is nothing amdgpu specific here so this does not need to be
abstracted away. max_alignment also is not used in winsys code.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31643>
Older HW versions of the svga device will only support older versions of
DefineGBSurface command.
Add support for v3 and v2 of the DefineGBSurface command when making
userspace managed surfaces. The first version of the command is not
supported since it is only used for pre-vgpu10 hardware.
This change was tested with all piglit tests under spec@arb_copy_buffer@*
on VMs with older hw versions, with userspace surfaces turned on.
Signed-off-by: Maaz Mombasawala <maaz.mombasawala@broadcom.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31744>
Surfaces are currently managed by the vmwgfx kernel driver, and userspace
interacts with surfaces through DRM_VMW_*_SURFACE ioctls.
We would like to move to userspace managed surfaces to simplify surface
and buffer management across mesa and kernel driver.
This change introduces such surfaces, in which the userspace manages surface
id's and submits the create and destroy commands.
Userspace managed surfaces can be enabled with VMW_SVGA_USERSPACE_SURFACE
environment variable.
This change is tested with all piglit tests under spec@arb_copy_buffer@*
with userspace surfaces turned on.
Signed-off-by: Maaz Mombasawala <maaz.mombasawala@broadcom.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31744>
We would like to move to surfaces that are managed by userspace instead of the
vmwgfx kernel driver. This requires an active context to be present during the
lifetime of a vmw_screen so that the screen can submit the appropriate surface
create and destroy commands.
This patch adds that context to a vmw_screen. An application may submit a
context destroy command before the surfaces have been destroyed by the
vmw_screen so it is refcounted so that an active context is available for the
lifetime of the vmw_screen.
Signed-off-by: Maaz Mombasawala <maaz.mombasawala@broadcom.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31744>
If a render area covers an area that is smaller than an attachment's
extent and is not aligned to the CCS block size, we must load the clear
color so that the pixels outside of that area are decompressed with the
right clear color.
Prevents the next patch from causing the following test failure on gfx9:
dEQP-VK.renderpass.suballocation.load_store_op_none.color_load_op_none_store_op_none
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31743>
Store an array of clear values, one for each view format of the image.
Load the clear value based on the view format.
anv_image_msaa_resolve() may override the source or destination with
ISL_FORMAT_UNSUPPORTED, so make anv_image_get_clear_color_addr() handle
that format.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31743>
In later commits, we'll rely on the number of view formats used by an
image to determine the size allocated for an array of clear colors in
the aux-state tracking buffer. Having a single view format for dmabufs
with clear color support allows anv to transparently handle this case.
Restrict the number of view formats by explicitly setting the image
format list to incomplete. Secondly, loosen the non-zero clear color
restriction on clear color supporting dmabufs. Those images can support
any clear color even with an incomplete list because we restrict
problematic accesses for the clear color during the negotiation phase.
Lastly, update add_all_surfaces_explicit_layout() to assert that the
sizing of the imported clear color struct meets expectations.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31743>
The major differences compared to the NV extensions are:
- support for the sequence index as push constants
- support for draw with count tokens (note that DrawID is zero for
normal draws)
- support for raytracing
- support for IES (only compute is supported for now)
- improved preprocessing support with the state command buffer param
The NV DGC extensions were only enabled for vkd3d-proton and it will
maintain both paths for a while, so they can be replaced by the EXT.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31383>
