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Author SHA1 Message Date
Konstantin Seurer
1bba4cf21b vulkan/meta: Remove object types from vk_meta_object_key_type 
Most values are used for multiple object types. It also is not
necessary, because the object type is already included in the key.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32881>
 2025-02-03 16:03:49 +01:00
Konstantin Seurer
3319e496f7 vulkan: Stop using strings for BVH build pipeline keys 
The intended use is to pass a keys struct with vk_meta_object_key_type
as its first member.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32881>
 2025-02-03 16:03:49 +01:00
Iago Toral Quiroga
5572e274e2 v3dv: serialize jobs after any barrier when debug sync is set 
This will ensure we always generate a new job after a barrier and
that the new job is setup to be serialized against all previous jobs.

Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33350>
 2025-02-03 13:06:59 +00:00
Iago Toral Quiroga
8d9f5dfd1d v3dv: implement sync debug option 
This makes it so all jobs submitted to the queue are automatically serialized
against all other jobs.

Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33350>
 2025-02-03 13:06:59 +00:00
Sergi Blanch Torne
d36e97c774 Revert "ci: disable Collabora's farm due to maintenance" 
This reverts commit 5b04337ba0.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33349>
 2025-02-03 12:24:07 +00:00
Sil Vilerino
5c26f165ba d3d12: Enable warnings C4056, C4305, C4351, C4756, C4800, C4291, C4020, C4624, C4309, C5105, C4024, C4189 
Reviewed-By: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Jesse Natalie <None>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33332>
 2025-02-03 11:06:59 +00:00
Sil Vilerino
15b2486a09 d3d12: Fix warning C4800 forcing value to bool 'true' or 'false' 
Reviewed-By: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Jesse Natalie <None>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33332>
 2025-02-03 11:06:59 +00:00
Sil Vilerino
d67980140c u_thread.h: Fix warning C4800 forcing value to bool 'true' or 'false' 
Reviewed-By: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Jesse Natalie <None>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33332>
 2025-02-03 11:06:59 +00:00
Sil Vilerino
1e869b3750 nir.h: Fix warning C4800 forcing value to bool 'true' or 'false' 
Reviewed-By: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Jesse Natalie <None>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33332>
 2025-02-03 11:06:59 +00:00
Sil Vilerino
e272c98f5d d3d12: Fix warning 4305 truncation from type1 to type2 
Reviewed-By: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Jesse Natalie <None>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33332>
 2025-02-03 11:06:59 +00:00
Valentine Burley
a5765d7659 khronos-update: Update ANDROID guards in vk_android_native_buffer.h 
This file was modified in commit bcc1950886 ("vulkan: fix glibc AOSP build")
without realizing it is imported code.

Update it to prevent the need to revert this modification after every
header update.

Signed-off-by: Valentine Burley <valentine.burley@collabora.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33272>
 2025-02-03 10:21:23 +00:00
Sergi Blanch Torne
5b04337ba0 ci: disable Collabora's farm due to maintenance 
Planned downtime in the farm:
* Start: 2025-02-03 08:00 UTC
* End: 2025-02-03 14:00 UTC

Signed-off-by: Sergi Blanch Torne <sergi.blanch.torne@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33095>
 2025-02-03 08:38:59 +01:00
José Roberto de Souza
bb31287d24 intel: Initialize upper 32bits of drm_xe_sync.handle 
Some compiles don't initialize the upper 32bits of the union that has
u64 addr and u32 handle.
Similar to previous patches but doing that for code in intel/misc.

Cc: stable
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Juston Li <justonli@google.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33172>
 2025-02-02 21:34:45 -08:00
Juston Li
d3adc33175 iris: xe: fully initialize drm_xe_sync addr/handle union 
Make sure the upper 32 bits of the addr/handle union are initialized
as that behavior is compiler-specific.

See the previous anv patch for more details.

Cc: stable
Signed-off-by: Juston Li <justonli@google.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33172>
 2025-02-02 21:34:45 -08:00
Juston Li
9afe29153d anv: xe: fully initialize drm_xe_sync addr/handle union 
The handle and addr fields of drm_xe_sync is defined as the union:

union {
   __u32 handle;
   __u64 addr;
};

When initialized on the stack on certain implementations, setting
.handle will leave the upper bits of .addr/the overall union
uninitialized causing exec calls to fail with:

[drm:xe_sync_entry_parse [xe]] Ioctl argument check failed at drivers/gpu/drm/xe/xe_sync.c:136: upper_32_bits(sync_in.addr)

Somewhat awkward but init .addr first to 0 and then set the handle after
the struct init.

Cc: stable
Signed-off-by: Juston Li <justonli@google.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33172>
 2025-02-02 21:34:45 -08:00
Pavel Ondračka
f7e5daaedd i915/ci: use debian-build-testing instead of debian-testing 
Signed-off-by: Pavel Ondračka <pavel.ondracka@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33345>
 2025-02-02 18:01:41 +01:00
Tim Keller
4ecd183c56 dril: Check for null config in dril_target.c 
fixes: 06d417af

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33336>
 2025-02-01 23:33:26 +00:00
Ernst Persson
c64871accc intel/vulkan: Add bvh build dependency 
Fixes: 41baeb3810 ("anv: Implement acceleration structure API")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/12558
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33333>
 2025-02-01 20:11:28 +01:00
Lionel Landwerlin
98ddfd040a spirv: remove spirv_library_to_nir_builder 
Now unused

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33329>
 2025-02-01 07:54:37 +00:00
Lionel Landwerlin
41aa22a6b5 intel_clc: remove NIR output support 
Now unused

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33329>
 2025-02-01 07:54:37 +00:00
Lionel Landwerlin
6d5375017a compiler: drop vtn_bindgen 
Now unused

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33329>
 2025-02-01 07:54:37 +00:00
Lionel Landwerlin
4f9eace864 intel: move internal shader compile to vtn_bindgen2 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33329>
 2025-02-01 07:54:37 +00:00
Lionel Landwerlin
fdeb05c907 anv: fixup missing compiler dependency on tests 
Pull in anv_deps to solve this.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33329>
 2025-02-01 07:54:37 +00:00
Marek Olšák
e621bafa9a ci/debian-ppc64el: don't build AMD drivers due to having only LLVM 15 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33211>
 2025-02-01 04:22:30 +00:00
Marek Olšák
82047fa82f amd: drop support for LLVM 15, 16, 17 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33211>
 2025-02-01 04:22:30 +00:00
Caio Oliveira
5ca23eff0b intel/brw: Remove brw_gs_compile struct 
There were 4 fields:

- key: now will be passed explicitly, so we can reuse the existing
  more general fs_visitor constructor;

- input_vue_map: used only by the client code brw_compile_gs, so
  create it separatedly as a local variable;

- two unsigned parameters: just put them inside a nested struct in the
  shader.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33228>
 2025-02-01 02:44:29 +00:00
Vasily Khoruzhick
3983e88c27 lima: ppir: handle ffma in the backend 
ppir doesn't do a good job in fusing ffma, so allow nir to do it and
handle ffma in backend.

shader-db:

total instructions in shared programs: 29485 -> 29066 (-1.42%)
instructions in affected programs: 10362 -> 9943 (-4.04%)
helped: 114
HURT: 5
helped stats (abs) min: 1 max: 30 x̄: 3.72 x̃: 2
helped stats (rel) min: 0.78% max: 20.00% x̄: 5.66% x̃: 4.31%
HURT stats (abs)   min: 1 max: 1 x̄: 1.00 x̃: 1
HURT stats (rel)   min: 0.52% max: 1.09% x̄: 0.85% x̃: 0.98%
95% mean confidence interval for instructions value: -4.37 -2.67
95% mean confidence interval for instructions %-change: -6.10% -4.68%
Instructions are helped.

total loops in shared programs: 2 -> 2 (0.00%)
loops in affected programs: 0 -> 0
helped: 0
HURT: 0

total spills in shared programs: 369 -> 367 (-0.54%)
spills in affected programs: 199 -> 197 (-1.01%)
helped: 8
HURT: 9

total fills in shared programs: 1265 -> 1208 (-4.51%)
fills in affected programs: 758 -> 701 (-7.52%)
helped: 11
HURT: 9

Reviewed-by: Erico Nunes <nunes.erico@gmail.com>
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33313>
 2025-02-01 02:21:19 +00:00
Jesse Natalie
a4b1924b22 CI/Windows: Update container deps 
Acked-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33294>
 2025-02-01 01:20:52 +00:00
Jesse Natalie
049015a7b8 meson: Enable /Zc:preprocessor for MSVC 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33294>
 2025-02-01 01:20:52 +00:00
Karol Herbst
3129fd8dcf rusticl/queue: check device error status 
If the underlying GPU context hit any execution errors (e.g. it times out
or something) we want to report it to the application as well.

Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32929>
 2025-02-01 00:17:03 +00:00
Karol Herbst
2c52ddd1a6 rusticl/mesa: add PipeContext::device_reset_status 
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32929>
 2025-02-01 00:17:03 +00:00
Karol Herbst
46454f01d3 rusticl/mem: set bind flags for gl imports 
We have to tell the driver how we want to use the resource.

Fixes: 2645003bdc ("rusticl: Create CL mem objects from GL")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33325>
 2025-01-31 23:38:21 +00:00
Sil Vilerino
0e94a14900 d3d12: Fix array of texture DPB cap detection 
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed by: Pohsiang (John) Hsu <pohhsu@microsoft.com>

Reviewed-by: Jesse Natalie <None>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33312>
 2025-01-31 21:36:17 +00:00
Sil Vilerino
b68ddd98d8 d3d12: Increase DPB video texture array pool size for async queue depth 
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed by: Pohsiang (John) Hsu <pohhsu@microsoft.com>

Reviewed-by: Jesse Natalie <None>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33312>
 2025-01-31 21:36:17 +00:00
Sil Vilerino
d9f9129210 d3d12: Add some missing members initialization for d3d12_video_buffer 
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed by: Pohsiang (John) Hsu <pohhsu@microsoft.com>

Reviewed-by: Jesse Natalie <None>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33312>
 2025-01-31 21:36:17 +00:00
Sil Vilerino
fcbadd77a8 d3d12: Add NULL initialization for d3d12_video_enc::m_pVideoTexArrayDPBPool 
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed by: Pohsiang (John) Hsu <pohhsu@microsoft.com>

Reviewed-by: Jesse Natalie <None>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33312>
 2025-01-31 21:36:17 +00:00
Sil Vilerino
123374c1d7 d3d12: Add support for Y210, Y410, YUY2 and HEVC 422 8/10b, HEVC 444 10b profiles 
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed by: Pohsiang (John) Hsu <pohhsu@microsoft.com>

Reviewed-by: Jesse Natalie <None>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33312>
 2025-01-31 21:36:17 +00:00
Sil Vilerino
df27e09267 pipe: Add profiles for HEVC 422 8/10b and 444 10b 
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed by: Pohsiang (John) Hsu <pohhsu@microsoft.com>

Reviewed-by: Jesse Natalie <None>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33312>
 2025-01-31 21:36:17 +00:00
Sil Vilerino
a1e15f561f d3d12: Fix HEVC range extension pic params validation 
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed by: Pohsiang (John) Hsu <pohhsu@microsoft.com>

Reviewed-by: Jesse Natalie <None>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33312>
 2025-01-31 21:36:17 +00:00
Pohsiang (John) Hsu
81869c70f0 d3d12: use log2_max_pic_order_cnt_lsb_minus4 from upper layer for h264 
This workaround is no longer necessary since now the frontends
manage the DPB and the params such as log2_max_pic_order_cnt_lsb_minus4
are passed by the app/pipe interface to the gallium drivers

Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed by: Pohsiang (John) Hsu <pohhsu@microsoft.com>

Reviewed-by: Jesse Natalie <None>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33312>
 2025-01-31 21:36:17 +00:00
Pohsiang (John) Hsu
5b834e1666 d3d12: use log2_max_pic_order_cnt_lsb_minus from upper layer 
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed by: Pohsiang (John) Hsu <pohhsu@microsoft.com>

Reviewed-by: Jesse Natalie <None>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33312>
 2025-01-31 21:36:17 +00:00
Pohsiang (John) Hsu
7cd9de460b d3d12: fix d3d12_video_nalu_writer_h264::write_slice_svc_prefix 
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed by: Pohsiang (John) Hsu <pohhsu@microsoft.com>

Reviewed-by: Jesse Natalie <None>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33312>
 2025-01-31 21:36:17 +00:00
Pohsiang (John) Hsu
bf7edb9a2d d3d12: fix start code prevention in write_sei_nalu() 
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed by: Pohsiang (John) Hsu <pohhsu@microsoft.com>

Reviewed-by: Jesse Natalie <None>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33312>
 2025-01-31 21:36:17 +00:00
Pohsiang (John) Hsu
e8499f69a4 d3d12: initialize ReconstructedPicTexture 
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed by: Pohsiang (John) Hsu <pohhsu@microsoft.com>

Reviewed-by: Jesse Natalie <None>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33312>
 2025-01-31 21:36:17 +00:00
Pohsiang (John) Hsu
0fcef5168b d3d12: log all the field of dpb buffer for better diagnostic, cosmetic space removal 
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed by: Pohsiang (John) Hsu <pohhsu@microsoft.com>

Reviewed-by: Jesse Natalie <None>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33312>
 2025-01-31 21:36:17 +00:00
Pohsiang (John) Hsu
ad66315a67 d3d12: fix incorrect IsRefUsedByCurrentPic marking for P Frame 
- On P Frame, we were looking at L1 list to determine IsRefUsedByCurrentPic.

Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed by: Pohsiang (John) Hsu <pohhsu@microsoft.com>

Reviewed-by: Jesse Natalie <None>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33312>
 2025-01-31 21:36:16 +00:00
Collabora's Gfx CI Team
e026f40b5f Uprev Piglit to fc8179d319046f45346bcbcc5aaeabebdf151f03 
631b72944f...fc8179d319

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33151>
 2025-01-31 20:36:33 +00:00
Job Noorman
1d3b6aa8d6 freedreno/drm-shim: enable raytracing 
Just enable it unconditionally, the ir3 compiler info will disable it
when not supported.

Signed-off-by: Job Noorman <jnoorman@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33320>
 2025-01-31 20:19:24 +00:00
Boris Brezillon
438652654b pan/decode: Fix the blend_count mask 
The blend count field is 4 bits not 3 bits.

Fixes: f2740ac69c ("pan/decode: Add support for decoding CSF")
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33321>
 2025-01-31 19:08:23 +00:00
Boris Brezillon
127af6f38a panvk: Don't clobber registers if the render pass was suspended 
Commit 2d3c50d484 ("panvk: Fix barriers in secondary cmdbufs w/o rp's")
started resetting the render flags we were relying on to decide to
clobber registers or not. Introduce a new field to restore that check.

Fixes: 2d3c50d484 ("panvk: Fix barriers in secondary cmdbufs w/o rp's")
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33321>
 2025-01-31 19:08:23 +00:00