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Author SHA1 Message Date
Pierre-Eric Pelloux-Prayer
721ccd0292 radeonsi/sqtt: use XXH64_update 
No functional change, but this is the way the XXH API is meant
to be used.

Also avoid setting the pipeline_code_hash twice.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31171>
 2024-09-16 08:50:32 +00:00
Pierre-Eric Pelloux-Prayer
3ab34c5ffe radeonsi/sqtt: don't store the offsets in the pipeline 
We can pass them to si_sqtt_register_pipeline / si_sqtt_add_code_object
directly instead.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31171>
 2024-09-16 08:50:32 +00:00
Pierre-Eric Pelloux-Prayer
bda9e1f856 radeonsi: check the pointer before adding an offset 
Otherwise callers can't detect errors.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31171>
 2024-09-16 08:50:32 +00:00
Pierre-Eric Pelloux-Prayer
7fedd7e178 radeonsi: include the shader key in the sqtt pipeline hash 
Otherwise we'll use the wrong shader if the key changed.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31171>
 2024-09-16 08:50:32 +00:00
Pierre-Eric Pelloux-Prayer
27644af79b radeonsi/tests: allow to run radeonsi-run-tests.py with AMD_DEBUG 
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31171>
 2024-09-16 08:50:32 +00:00
Samuel Pitoiset
ba7e3be425 radv: merge radv_emit_epilog() with radv_emit_ps_epilog_state() 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31150>
 2024-09-16 07:53:00 +00:00
Samuel Pitoiset
26d8f1a306 aco,radv,radeonsi: move has_epilog to the fragment shader info 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31150>
 2024-09-16 07:53:00 +00:00
Samuel Pitoiset
b377ddfd04 radv,radeonsi: remove remaining occurrences of TCS epilog 
TCS epilog has been removed few months ago.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31150>
 2024-09-16 07:53:00 +00:00
David Rosca
e27eeff95d frontends/va: Remove fallback if app doesn't enable packed headers 
This was only a best effort fallback and it doesn't always work.
Driver is expected to only output slice NALs when packed headers
are not enabled, so let's just do that.

Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31126>
 2024-09-16 06:35:32 +00:00
David Rosca
d3429a7e00 radeonsi: Fix reported minimum width for video encode 
Some apps would default to smaller resolutions than we currently report
as supported, despite the hardware being able to encode it. It's also
common for test apps/suites to use small resolutions.
libva-utils/h264encode uses 176x144 resolution by default and vulkan cts
have video clips with the same resolution too which would previously
fail to encode.

Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31109>
 2024-09-15 14:22:29 +00:00
Marek Olšák
46b561b7cd radeonsi: fold si_improve_sync_flags logic into si_barrier_before_internal_op 
This also implements the same thing for images.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31168>
 2024-09-14 11:03:45 -04:00
Marek Olšák
961c72d666 radeonsi: remove SI_OP_SYNC_CPDMA_BEFORE, always sync CP DMA 
We want barriers to only consider compute as a possibility, and CP DMA
has to work with that, which means barriers can't have code specific
to CP DMA.

Always executing the CP DMA sync seems acceptable because CP DMA operations
are usually small, and CP DMA is almost never used on GFX10+.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31168>
 2024-09-14 11:03:45 -04:00
Marek Olšák
88eb1be2fc radeonsi: use si_barrier_{before,after}_internal_op for CP DMA 
This makes the CP DMA code simpler and reuses the logic we use for internal
compute shaders.

The only thing that can't be handled in the barrier functions is
"!cp_dma_has_L2 -> SI_CONTEXT_INV_L2" because the barrier functions should
assume that only compute shader coherency is required to make them usable
everywhere, and the CP DMA code has to deal with it.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31168>
 2024-09-14 11:03:45 -04:00
Marek Olšák
0526ea067d radeonsi: remove CP DMA code for GDS & L2 prefetch in the clear/copy_buffer path 
We don't need to access GDS with CP DMA, and L2 prefetches don't use this
codepath.

Some local variables are also moved closer to their use.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31168>
 2024-09-14 11:03:45 -04:00
Marek Olšák
0124527569 radeonsi: don't flag both VS and PS partial flush in si_barrier_before_internal_op 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31168>
 2024-09-14 11:03:45 -04:00
Marek Olšák
b73ba7b710 radeonsi: do init/deinit for multi-dispatch compute blits only once 
Do it outside the loop, which is more optimal.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31168>
 2024-09-14 11:03:45 -04:00
Marek Olšák
4d6a90ddac radeonsi: split image saving/binding/restoring from si_launch_grid_internal_images 
Since the compute blit can execute multiple dispatches in a loop,
we shouldn't save/bind/restore images for every single dispatch.
This will help move that out of the loop.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31168>
 2024-09-14 11:03:45 -04:00
Marek Olšák
69ad0fc61e radeonsi: only set need_check_render_feedback if binding textures for PS 
Other shader stages can't realistically read and render to the same
pixel of the same texture simultaneously.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31168>
 2024-09-14 11:03:45 -04:00
Marek Olšák
d4178e58f7 radeonsi: skip no-op si_compute_blit() 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31168>
 2024-09-14 11:03:45 -04:00
Marek Olšák
ef136ab94e radeonsi: move barrier code out of si_launch_grid_internal_ssbos/images 
and into the new si_barrier functions.

The new barrier function parameters might be excessive for now, but they
will be used later, hopefully.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31168>
 2024-09-14 11:03:45 -04:00
Marek Olšák
fd04919f4e radeonsi: move compute barrier calls up one level 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31168>
 2024-09-14 11:03:45 -04:00
Marek Olšák
797112d1e2 radeonsi: split si_launch_grid_internal to start preparing for barrier rework 
This moves code from si_launch_grid_internal into 4 new functions:
- si_barrier_before_internal_op
- si_barrier_after_internal_op
- si_compute_begin_internal
- si_compute_end_internal

The goal is to move setting the flush flags into callers, which will
eventually become proper memory barriers.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31168>
 2024-09-14 11:03:45 -04:00
Marek Olšák
465f42e907 radeonsi: inline si_get_flush_flags 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31168>
 2024-09-14 11:03:45 -04:00
Marek Olšák
bf77786b79 radeonsi: replace enum si_cache_policy with cp_dma_has_L2() 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31168>
 2024-09-14 11:03:45 -04:00
Marek Olšák
1ce9729cce radeonsi: remove L2_STREAM enum 
never used

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31168>
 2024-09-14 11:03:45 -04:00
Marek Olšák
9ed0530413 radeonsi: move enum si_cache_policy and si_get_flush_flags into si_cp_dma.c 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31168>
 2024-09-14 11:03:45 -04:00
Marek Olšák
b0ee7b0b8f radeonsi: don't use si_get_flush_flags in si_launch_grid_internal_ssbos 
It didn't do anything. It only set INV_SCACHE and INV_VCACHE, which are
already set optimally by si_launch_grid_internal.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31168>
 2024-09-14 11:03:45 -04:00
Marek Olšák
cfe1f2b841 radeonsi: remove enum si_coherency 
SI_COHERENCY_SHADER is the only one that's used.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31168>
 2024-09-14 11:03:45 -04:00
Marek Olšák
a009aa7365 radeonsi: remove all SI_COHERENCY_* flags except SI_COHERENCY_SHADER 
it will be simplified in the next commit

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31168>
 2024-09-14 11:03:44 -04:00
Marek Olšák
eb52b774e1 radeonsi: don't use SI_COHERENCY_CP 
It only skips flushing SMEM and VMEM caches.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31168>
 2024-09-14 11:03:44 -04:00
Marek Olšák
d9bfe075a5 radeonsi: don't use SI_COHERENCY_CB_META 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31168>
 2024-09-14 11:03:44 -04:00
Marek Olšák
413bdcd7c3 radeonsi: don't use SI_COHERENCY_NONE in si_compute_shorten_ubyte_buffer 
This removes the last non-AMD_TEST use of SI_COHERENCY_NONE.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31168>
 2024-09-14 11:03:44 -04:00
Marek Olšák
68adac4d28 radeonsi: move get_cache_policy into si_cp_dma.c 
it's the only user

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31168>
 2024-09-14 11:03:44 -04:00
Marek Olšák
8c872d46a8 radeonsi: don't use get_cache_policy in si_launch_grid_internal_ssbos 
This is more correct.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31168>
 2024-09-14 11:03:44 -04:00
Marek Olšák
d04150965b radeonsi: remove unused size parameter from get_cache_policy 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31168>
 2024-09-14 11:03:44 -04:00
Marek Olšák
fe18c09703 radeonsi: add si_cp_pfp_sync_me 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31168>
 2024-09-14 11:03:44 -04:00
Marek Olšák
2d64e8d333 radeonsi: use the correct cs for SQTT barriers for gfx9 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31168>
 2024-09-14 11:03:44 -04:00
Marek Olšák
862a5f7abe radeonsi: add gfx10+ support into si_cp_acquire_mem 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31168>
 2024-09-14 11:03:44 -04:00
Marek Olšák
a42d9db1b6 radeonsi: add si_cp_acquire_mem helper and clean up its usage for gfx6-9 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31168>
 2024-09-14 11:03:44 -04:00
Marek Olšák
1d5ffb13d6 radeonsi: add ACQUIRE_MEM, RELEASE_MEM PWS packet helpers 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31168>
 2024-09-14 11:03:44 -04:00
Marek Olšák
9690481535 radeonsi: remove SI_CONTEXT_VGT_STREAMOUT_SYNC, emit it directly 
It has only 1 use.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31168>
 2024-09-14 11:03:44 -04:00
Marek Olšák
1a1138817c radeonsi: add a new PM4 helper radeon_event_write 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31168>
 2024-09-14 11:03:44 -04:00
Marek Olšák
434eddd422 radeonsi: tweak si_test_dma_perf for better experience 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31168>
 2024-09-14 11:03:44 -04:00
Marek Olšák
05353cfd4f radeonsi: use better OREO_MODE programming 
We have been told to do this instead.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31168>
 2024-09-14 11:03:44 -04:00
Marek Olšák
0c734722a1 radeonsi/gfx11: disable RB+ when blending 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31168>
 2024-09-14 11:03:44 -04:00
Marek Olšák
3de719045a radeonsi/gfx12: disallow DCC for protected content 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31168>
 2024-09-14 11:03:44 -04:00
Marek Olšák
c90d4e0d57 radeonsi/gfx12: remove CP DMA workarounds because CP DMA is never used on gfx12 
except for cache prefetches.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31168>
 2024-09-14 11:03:44 -04:00
David Heidelberg
c5ee7ca4d6 ci/freedreno: mark jobs to be retested with patched 6.11 kernel 
Signed-off-by: David Heidelberg <david@ixit.cz>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31177>
 2024-09-14 15:24:04 +09:00
David Heidelberg
52c014a453 ci/freedreno: move disabled a530 entries back to main gitlab-ci.yml 
Fixes: 9442571664 ("ci: separate hiden jobs to -inc.yml files")
Signed-off-by: David Heidelberg <david@ixit.cz>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31177>
 2024-09-14 15:20:47 +09:00
Jami Kettunen
849a496b33 nouveau/headers: Fix build without rustfmt 
This is optional elsewhere and seemingly the intention was already to
ignore failures, but it didn't catch FileNotFoundError when rustfmt
isn't even available.

Fixes: 591b5da49b ("nouveau/headers: Run rustfmt on generated files")
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30970>
 2024-09-14 04:34:46 +00:00