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radeonsi: remove SI_OP_SYNC_CPDMA_BEFORE, always sync CP DMA

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We want barriers to only consider compute as a possibility, and CP DMA
has to work with that, which means barriers can't have code specific
to CP DMA.

Always executing the CP DMA sync seems acceptable because CP DMA operations
are usually small, and CP DMA is almost never used on GFX10+.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31168>
This commit is contained in:
Marek Olšák 2024-08-22 15:47:57 -04:00
parent 88eb1be2fc
commit 961c72d666
3 changed files with 4 additions and 6 deletions
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3
src/gallium/drivers/radeonsi/si_compute_blit.c
View file

@ -28,8 +28,7 @@ static void si_improve_sync_flags(struct si_context *sctx, struct pipe_resource
if (si_is_buffer_idle(sctx, si_resource(dst), RADEON_USAGE_READWRITE) &&
(!src || si_is_buffer_idle(sctx, si_resource(src), RADEON_USAGE_WRITE))) {
/* Idle buffers don't have to sync. */
*flags &= ~(SI_OP_SYNC_GE_BEFORE | SI_OP_SYNC_PS_BEFORE | SI_OP_SYNC_CS_BEFORE |
SI_OP_SYNC_CPDMA_BEFORE);
*flags &= ~(SI_OP_SYNC_GE_BEFORE | SI_OP_SYNC_PS_BEFORE | SI_OP_SYNC_CS_BEFORE);
return;
}

2
src/gallium/drivers/radeonsi/si_cp_dma.c
View file

@ -128,7 +128,7 @@ static void si_cp_dma_prepare(struct si_context *sctx, struct pipe_resource *dst
if (*is_first && sctx->flags)
si_emit_cache_flush_direct(sctx);
if (user_flags & SI_OP_SYNC_CPDMA_BEFORE && *is_first && !(*packet_flags & CP_DMA_CLEAR))
if (*is_first && !(*packet_flags & CP_DMA_CLEAR))
*packet_flags |= CP_DMA_RAW_WAIT;
*is_first = false;

5
src/gallium/drivers/radeonsi/si_pipe.h
View file

@ -1461,15 +1461,14 @@ void si_destroy_compute(struct si_compute *program);
/* si_compute_blit.c */
#define SI_OP_SYNC_CS_BEFORE (1 << 0)
#define SI_OP_SYNC_PS_BEFORE (1 << 1)
#define SI_OP_SYNC_CPDMA_BEFORE (1 << 2) /* only affects CP DMA calls */
#define SI_OP_SYNC_BEFORE (SI_OP_SYNC_CS_BEFORE | SI_OP_SYNC_PS_BEFORE | SI_OP_SYNC_CPDMA_BEFORE)
#define SI_OP_SYNC_GE_BEFORE (1 << 2) /* only sync VS, TCS, TES, GS */
#define SI_OP_SYNC_BEFORE (SI_OP_SYNC_CS_BEFORE | SI_OP_SYNC_PS_BEFORE)
#define SI_OP_SYNC_AFTER (1 << 3)
#define SI_OP_SYNC_BEFORE_AFTER (SI_OP_SYNC_BEFORE | SI_OP_SYNC_AFTER)
#define SI_OP_SKIP_CACHE_INV_BEFORE (1 << 4) /* don't invalidate caches */
#define SI_OP_CS_IMAGE (1 << 5)
#define SI_OP_CS_RENDER_COND_ENABLE (1 << 6)
/* gap */
#define SI_OP_SYNC_GE_BEFORE (1 << 8) /* only sync VS, TCS, TES, GS */
/* Only for si_compute_blit: */
#define SI_OP_FAIL_IF_SLOW (1 << 9)
#define SI_OP_IS_NESTED (1 << 10)